1 # See LICENSE for license details.
3 #*****************************************************************************
5 #-----------------------------------------------------------------------------
7 # Test CSRRx and CSRRxI instructions.
10 #include "riscv_test.h"
11 #include "test_macros.h"
17 #define sscratch mscratch
18 #define sstatus mstatus
22 #define stvec_handler mtvec_handler
24 #define SSTATUS_SPP MSTATUS_MPP
27 # For RV64, make sure UXL encodes RV64. (UXL does not exist for RV32.)
28 #if __riscv_xlen == 64
29 # If running in M mode, use mstatus.MPP to check existence of U mode.
30 # Otherwise, if in S mode, then U mode must exist and we don't need to check.
38 # If U mode is present, UXL should be 2 (XLEN = 64-bit)
39 TEST_CASE(13, a0, SSTATUS_UXL & (SSTATUS_UXL << 1), csrr a0, sstatus; li a1, SSTATUS_UXL; and a0, a0, a1)
43 # If U mode is not present, UXL should be 0
44 TEST_CASE(14, a0, 0, csrr a0, sstatus; li a1, SSTATUS_UXL; and a0, a0, a1)
50 TEST_CASE( 2, a0, 3, csrr a0, sscratch);
51 TEST_CASE( 3, a1, 3, csrrci a1, sscratch, 1);
52 TEST_CASE( 4, a2, 2, csrrsi a2, sscratch, 4);
53 TEST_CASE( 5, a3, 6, csrrwi a3, sscratch, 2);
54 TEST_CASE( 6, a1, 2, li a0, 0xbad1dea; csrrw a1, sscratch, a0);
55 TEST_CASE( 7, a0, 0xbad1dea, li a0, 0x0001dea; csrrc a0, sscratch, a0);
56 TEST_CASE( 8, a0, 0xbad0000, li a0, 0x000beef; csrrs a0, sscratch, a0);
57 TEST_CASE( 9, a0, 0xbadbeef, csrr a0, sscratch);
60 # Is F extension present?
62 andi a0, a0, (1 << ('F' - 'A'))
64 # If so, make sure FP stores have no effect when mstatus.FS is off.
71 TEST_CASE(10, a0, 1, fsw f0, (a1); lw a0, (a1));
73 # Fail if this test is compiled without F but executed on a core with F.
74 TEST_CASE(10, zero, 1)
78 # Figure out if 'U' is set in misa
79 csrr a0, misa # a0 = csr(misa)
80 srli a0, a0, 20 # a0 = a0 >> 20
81 andi a0, a0, 1 # a0 = a0 & 1
82 beqz a0, finish # if no user mode, skip the rest of these checks
84 srli t0, t0, PMP_SHIFT
89 li t0, (PMP_R | PMP_W | PMP_X) # giving read, write and execute permissions
90 or t0, t0, PMP_TOR # setting mode to TOR
97 #endif /* __MACHINE_MODE */
107 # Make sure writing the cycle counter causes an exception.
108 # Don't run in supervisor, as we don't delegate illegal instruction traps.
109 #ifdef __MACHINE_MODE
110 TEST_CASE(11, a0, 255, li a0, 255; csrrw a0, cycle, x0);
113 # Make sure reading status in user mode causes an exception.
114 # Don't run in supervisor, as we don't delegate illegal instruction traps.
115 #ifdef __MACHINE_MODE
116 TEST_CASE(12, a0, 255, li a0, 255; csrr a0, sstatus)
118 TEST_CASE(12, x0, 0, nop)
125 .global user_mode_end
129 # We should only fall through to this if scall failed.
133 .global stvec_handler
135 # Trapping on tests 10-12 is good news.
136 # Note that since the test didn't complete, TESTNUM is smaller by 1.
140 bleu TESTNUM, t0, privileged
143 # catch RVTEST_PASS and kick it up to M-mode
145 li t1, CAUSE_USER_ECALL
150 # Make sure scause indicates a lack of privilege.
152 li t1, CAUSE_ILLEGAL_INSTRUCTION
154 # Return to user mode, but skip the trapping instruction.