1 # See LICENSE for license details.
3 #*****************************************************************************
5 #-----------------------------------------------------------------------------
7 # Test VM referenced and dirty bits.
10 #include "riscv_test.h"
11 #include "test_macros.h"
16 # Turn on VM with superpage identity mapping
18 srl a1, a1, RISCV_PGSHIFT
20 srl a2, a2, RISCV_PGSHIFT
23 li a1, ((MSTATUS_VM & ~(MSTATUS_VM<<1)) * VM_SV39) | ((MSTATUS_MPP & ~(MSTATUS_MPP<<1)) * PRV_S)
27 la a1, stvec_handler - DRAM_BASE
32 # Try a faulting store to make sure dirty bit is not set
42 # Try a non-faulting store to make sure dirty bit is set
45 # Make sure R and D bits are set
60 # Make sure R bit is set
66 # Make sure D bit is clear
88 page_table_1: .dword (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_U | PTE_R | PTE_X
91 page_table_2: .dword (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_U | PTE_R | PTE_X | PTE_W