1 #*****************************************************************************
3 #-----------------------------------------------------------------------------
5 # Test illegal vt instruction trap.
8 #include "riscv_test.h"
9 #include "test_macros.h"
18 csrw evec,a3 # set exception handler
22 slli a4,a4,SR_IM_SHIFT
23 or a3,a3,a4 # enable IM[COP]
55 li a4,HWACHA_CAUSE_VF_ILLEGAL_INSTRUCTION
63 # make sure vector unit has cleared out
112 .dword 0xdeadbeefcafebabe
113 .dword 0xdeadbeefcafebabe
114 .dword 0xdeadbeefcafebabe
115 .dword 0xdeadbeefcafebabe