initial commit
[riscv-tests.git] / isa / rv64uf / ldst.S
1 #*****************************************************************************
2 # ldst.S
3 #-----------------------------------------------------------------------------
4 #
5 # This test verifies that flw, fld, fsw, and fsd work properly.
6 #
7
8 #include "riscv_test.h"
9 #include "test_macros.h"
10
11 RVTEST_RV64U
12 RVTEST_CODE_BEGIN
13
14 TEST_CASE(2, a0, 0x4000000040400000, la a1, tdat; flw f1, 4(a1); fsw f1, 12(a1); ld a0, 8(a1))
15 TEST_CASE(3, a0, 0x400000003f800000, la a1, tdat; fld f2, 0(a1); fsd f2, 8(a1); ld a0, 8(a1))
16
17 TEST_PASSFAIL
18
19 .data
20 RVTEST_DATA_BEGIN
21
22 TEST_DATA
23
24 tdat:
25 .word 0x3f800000
26 .word 0x40000000
27 .word 0x40400000
28 .word 0x40800000
29
30 RVTEST_DATA_END