1 #include "riscv_test.h"
2 #include "sv_test_macros.h"
4 RVTEST_RV64UF # Define TVM used by program.
6 #define SV_ELWIDTH_TEST( inst, vl, elwidth, wid1, wid2, \
10 la x13, (testdata+elwidth); \
11 la x14, (testdata+elwidth*2); \
12 la x15, (testdata+elwidth*3); \
13 la x16, (testdata+elwidth*4); \
14 la x17, (testdata+elwidth*5); \
16 li x1, 0xa5a5a5a5a5a5a5a5; \
22 SET_SV_2CSRS( SV_REG_CSR( 1, 12, wid1, 12, 1), \
23 SV_REG_CSR( 0, 28, wid2, 28, 1)); \
32 TEST_SV_FD(0, f28, ans, 0); \
33 TEST_SV_FD(0, f29, ans, 8); \
34 TEST_SV_FD(0, f30, ans, 16);
36 # SV test: vector-vector add
38 # sets up x3 and x4 with data, sets VL to 2, and carries out
39 # an "add 1 to x3". which actually means "add 1 to x3 *AND* add 1 to x4"
42 RVTEST_CODE_BEGIN # Start of test code.
44 SV_ELWIDTH_TEST( fld , 2, 8, SV_W_DFLT, SV_W_DFLT, testdata1, answer1 )
45 SV_ELWIDTH_TEST( fld , 3, 8, SV_W_DFLT, SV_W_DFLT, testdata1, answer2 )
46 SV_ELWIDTH_TEST( fld , 3, 8, SV_W_16BIT, SV_W_DFLT, testdata3, answer3)
47 SV_ELWIDTH_TEST( fld , 5, 8, SV_W_16BIT, SV_W_32BIT, testdata3, answer4)
48 SV_ELWIDTH_TEST( fld , 3, 8, SV_W_32BIT, SV_W_16BIT, testdata4, answer5)
50 SV_ELWIDTH_TEST( ld , 5, 8, SV_W_32BIT, SV_W_16BIT, testdata1,
51 0x6757271769592919, 0xa5a5a5a5a5a52616, 0xa5a5a5a5a5a5a5a5 )
52 SV_ELWIDTH_TEST( ld , 7, 8, SV_W_16BIT, SV_W_8BIT, testdata1,
53 0xa557371779593919, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5 )
54 SV_ELWIDTH_TEST( ld , 11, 8, SV_W_8BIT, SV_W_16BIT, testdata1,
55 0x0049003900290019, 0xff89007900690059, 0xa5a5003700270017 )
57 RVTEST_PASS # Signal success.
60 RVTEST_CODE_END # End of test code.
63 # This section is optional, and this data is NOT saved in the output.
67 .dword 0x8979695949392919
68 .dword 0x8777675747372717
69 .dword 0x8676665646362616
70 .dword 0x8272625242322212
71 .dword 0x8171615141312111
72 .dword 0x8373635343332313
75 .dword 0x8979695949392919
76 .dword 0x8777675747372717
77 .dword 0xa5a5a5a5a5a5a5a5
81 .dword 0x8979695949392919
82 .dword 0x8777675747372717
83 .dword 0x8676665646362616
86 .dword 0x63d03c0051805140
87 .dword 0x000000000000E480
88 .dword 0x8676665646362616
89 .dword 0x8272625242322212
90 .dword 0x8171615141312111
91 .dword 0x8373635343332313
119 .dword 0xa5a53c0051805140
120 .dword 0xa5a5a5a5a5a5a5a5
121 .dword 0xa5a5a5a5a5a5a5a5
123 # Output data section.
124 RVTEST_DATA_BEGIN # Start of test output data region.
130 RVTEST_DATA_END # End of test output data region.