nix/verilog.nix

   1 { version }:
   2
   3 { stdenv, python3Packages, python2, yosys }:
   4
   5 stdenv.mkDerivation {
   6   pname = "libresoc.v";
   7   inherit version;
   8
   9   src = ../.;
  10
  11   strictDeps = true;
  12
  13   nativeBuildInputs = (with python3Packages; [
  14     c4m-jtag nmigen-soc python libresoc-ieee754fpu libresoc-openpower-isa
  15   ]) ++ [ yosys ];
  16
  17   configurePhase = "true";
  18
  19   buildPhase = ''
  20     runHook preBuild
  21     env -C pinmux ${python2}/bin/python src/pinmux_generator.py -v -s ls180 -o ls180
  22     cp pinmux/ls180/ls180_pins.py src/soc/debug
  23     cp pinmux/ls180/ls180_pins.py src/soc/litex/florent/libresoc
  24     cd src
  25     export PYTHONPATH="$PWD:$PYTHONPATH"
  26     python3 soc/simple/issuer_verilog.py \
  27       --debug=jtag --enable-core --enable-pll \
  28       --enable-xics --enable-sram4x4kblock --disable-svp64 \
  29       libresoc.v
  30     runHook postBuild
  31   '';
  32
  33   installPhase = ''
  34     runHook preInstall
  35     mv libresoc.v $out
  36     runHook postInstall
  37   '';
  38
  39   fixupPhase = "true";
  40 }