3 #include "debug_module.h"
4 #include "debug_defines.h"
8 #include "debug_rom/debug_rom.h"
16 debug_module_t::debug_module_t(sim_t
*sim
) : sim(sim
)
19 dmcontrol
.version
= 1;
21 for (unsigned i
= 0; i
< 1024; i
++) {
22 write32(debug_rom_entry
, i
, jal(0, 0));
26 for (unsigned i
= 0; i
< datacount
; i
++) {
30 for (unsigned i
= 0; i
< progsize
; i
++) {
36 void debug_module_t::reset()
38 for (unsigned i
= 0; i
< sim
->nprocs(); i
++) {
39 processor_t
*proc
= sim
->get_core(i
);
41 proc
->halt_request
= false;
44 dmcontrol
.haltreq
= 0;
46 dmcontrol
.dmactive
= 0;
47 dmcontrol
.hartsel
= 0;
48 dmcontrol
.authenticated
= 1;
49 dmcontrol
.version
= 1;
50 dmcontrol
.authbusy
= 0;
51 dmcontrol
.authtype
= dmcontrol
.AUTHTYPE_NOAUTH
;
52 abstractcs
= datacount
<< DMI_ABSTRACTCS_DATACOUNT_OFFSET
;
55 bool debug_module_t::load(reg_t addr
, size_t len
, uint8_t* bytes
)
57 addr
= DEBUG_START
+ addr
;
59 if (addr
>= DEBUG_ROM_ENTRY
&& addr
<= DEBUG_ROM_CODE
) {
60 halted
[(addr
- DEBUG_ROM_ENTRY
) / 4] = true;
61 memcpy(bytes
, debug_rom_entry
+ addr
- DEBUG_ROM_ENTRY
, len
);
65 fprintf(stderr
, "ERROR: invalid load from debug module: %zd bytes at 0x%016"
66 PRIx64
"\n", len
, addr
);
71 bool debug_module_t::store(reg_t addr
, size_t len
, const uint8_t* bytes
)
73 addr
= DEBUG_START
+ addr
;
76 fprintf(stderr
, "ERROR: unaligned store to debug module: %zd bytes at 0x%016"
77 PRIx64
"\n", len
, addr
);
81 // memcpy(debug_ram + addr - DEBUG_RAM_START, bytes, len);
83 fprintf(stderr
, "ERROR: invalid store to debug module: %zd bytes at 0x%016"
84 PRIx64
"\n", len
, addr
);
88 void debug_module_t::write32(uint8_t *memory
, unsigned int index
, uint32_t value
)
90 uint8_t* base
= memory
+ index
* 4;
91 base
[0] = value
& 0xff;
92 base
[1] = (value
>> 8) & 0xff;
93 base
[2] = (value
>> 16) & 0xff;
94 base
[3] = (value
>> 24) & 0xff;
97 uint32_t debug_module_t::read32(uint8_t *memory
, unsigned int index
)
99 uint8_t* base
= memory
+ index
* 4;
100 uint32_t value
= ((uint32_t) base
[0]) |
101 (((uint32_t) base
[1]) << 8) |
102 (((uint32_t) base
[2]) << 16) |
103 (((uint32_t) base
[3]) << 24);
107 processor_t
*debug_module_t::current_proc() const
109 processor_t
*proc
= NULL
;
111 proc
= sim
->get_core(dmcontrol
.hartsel
);
112 } catch (const std::out_of_range
&) {
117 bool debug_module_t::dmi_read(unsigned address
, uint32_t *value
)
120 D(fprintf(stderr
, "dmi_read(0x%x) -> ", address
));
121 if (address
>= DMI_DATA0
&& address
< DMI_DATA0
+ datacount
) {
122 result
= data
[address
- DMI_DATA0
];
123 } else if (address
>= DMI_IBUF0
&& address
< DMI_IBUF0
+ progsize
) {
124 result
= ibuf
[address
- DMI_IBUF0
];
129 processor_t
*proc
= current_proc();
131 if (halted
[dmcontrol
.hartsel
]) {
132 dmcontrol
.hartstatus
= dmcontrol
.HARTSTATUS_HALTED
;
134 dmcontrol
.hartstatus
= dmcontrol
.HARTSTATUS_RUNNING
;
136 dmcontrol
.haltreq
= proc
->halt_request
;
138 dmcontrol
.hartstatus
= dmcontrol
.HARTSTATUS_NOTEXIST
;
140 result
= set_field(result
, DMI_DMCONTROL_HALTREQ
, dmcontrol
.haltreq
);
141 result
= set_field(result
, DMI_DMCONTROL_RESET
, dmcontrol
.reset
);
142 result
= set_field(result
, DMI_DMCONTROL_DMACTIVE
, dmcontrol
.dmactive
);
143 result
= set_field(result
, DMI_DMCONTROL_HARTSTATUS
, dmcontrol
.hartstatus
);
144 result
= set_field(result
, DMI_DMCONTROL_HARTSEL
, dmcontrol
.hartsel
);
145 result
= set_field(result
, DMI_DMCONTROL_AUTHENTICATED
, dmcontrol
.authenticated
);
146 result
= set_field(result
, DMI_DMCONTROL_AUTHBUSY
, dmcontrol
.authbusy
);
147 result
= set_field(result
, DMI_DMCONTROL_AUTHTYPE
, dmcontrol
.authtype
);
148 result
= set_field(result
, DMI_DMCONTROL_VERSION
, dmcontrol
.version
);
155 result
= progsize
<< DMI_ACCESSCS_PROGSIZE_OFFSET
;
158 D(fprintf(stderr
, "error\n"));
162 D(fprintf(stderr
, "0x%x\n", result
));
167 bool debug_module_t::perform_abstract_command(uint32_t command
)
172 bool debug_module_t::dmi_write(unsigned address
, uint32_t value
)
174 D(fprintf(stderr
, "dmi_write(0x%x, 0x%x)\n", address
, value
));
175 if (address
>= DMI_DATA0
&& address
< DMI_DATA0
+ datacount
) {
176 data
[address
- DMI_DATA0
] = value
;
178 } else if (address
>= DMI_IBUF0
&& address
< DMI_IBUF0
+ progsize
) {
179 ibuf
[address
- DMI_IBUF0
] = value
;
185 dmcontrol
.dmactive
= get_field(value
, DMI_DMCONTROL_DMACTIVE
);
186 if (dmcontrol
.dmactive
) {
187 dmcontrol
.haltreq
= get_field(value
, DMI_DMCONTROL_HALTREQ
);
188 dmcontrol
.reset
= get_field(value
, DMI_DMCONTROL_RESET
);
189 dmcontrol
.hartsel
= get_field(value
, DMI_DMCONTROL_HARTSEL
);
193 processor_t
*proc
= current_proc();
195 proc
->halt_request
= dmcontrol
.haltreq
;
201 return perform_abstract_command(value
);