riscv/gdbserver.cc

   1 #include <arpa/inet.h>
   2 #include <errno.h>
   3 #include <fcntl.h>
   4 #include <stdlib.h>
   5 #include <string.h>
   6 #include <sys/socket.h>
   7 #include <sys/types.h>
   8 #include <unistd.h>
   9
  10 #include <algorithm>
  11 #include <cassert>
  12 #include <cinttypes>
  13 #include <cstdio>
  14 #include <vector>
  15
  16 #include "disasm.h"
  17 #include "sim.h"
  18 #include "gdbserver.h"
  19 #include "mmu.h"
  20
  21 #define C_EBREAK        0x9002
  22 #define EBREAK          0x00100073
  23
  24 //////////////////////////////////////// Utility Functions
  25
  26 #undef DEBUG
  27 #ifdef DEBUG
  28 #  define D(x) x
  29 #else
  30 #  define D(x)
  31 #endif // DEBUG
  32
  33 void die(const char* msg)
  34 {
  35   fprintf(stderr, "gdbserver code died: %s\n", msg);
  36   abort();
  37 }
  38
  39 // gdb's register list is defined in riscv_gdb_reg_names gdb/riscv-tdep.c in
  40 // its source tree. We must interpret the numbers the same here.
  41 enum {
  42   REG_XPR0 = 0,
  43   REG_XPR31 = 31,
  44   REG_PC = 32,
  45   REG_FPR0 = 33,
  46   REG_FPR31 = 64,
  47   REG_CSR0 = 65,
  48   REG_CSR4095 = 4160,
  49   REG_PRIV = 4161
  50 };
  51
  52 //////////////////////////////////////// Functions to generate RISC-V opcodes.
  53
  54 // TODO: Does this already exist somewhere?
  55
  56 #define ZERO    0
  57 // Using regnames.cc as source. The RVG Calling Convention of the 2.0 RISC-V
  58 // spec says it should be 2 and 3.
  59 #define S0      8
  60 #define S1      9
  61 static uint32_t bits(uint32_t value, unsigned int hi, unsigned int lo) {
  62   return (value >> lo) & ((1 << (hi+1-lo)) - 1);
  63 }
  64
  65 static uint32_t bit(uint32_t value, unsigned int b) {
  66   return (value >> b) & 1;
  67 }
  68
  69 static uint32_t jal(unsigned int rd, uint32_t imm) {
  70   return (bit(imm, 20) << 31) |
  71     (bits(imm, 10, 1) << 21) |
  72     (bit(imm, 11) << 20) |
  73     (bits(imm, 19, 12) << 12) |
  74     (rd << 7) |
  75     MATCH_JAL;
  76 }
  77
  78 static uint32_t csrsi(unsigned int csr, uint16_t imm) {
  79   return (csr << 20) |
  80     (bits(imm, 4, 0) << 15) |
  81     MATCH_CSRRSI;
  82 }
  83
  84 static uint32_t csrci(unsigned int csr, uint16_t imm) {
  85   return (csr << 20) |
  86     (bits(imm, 4, 0) << 15) |
  87     MATCH_CSRRCI;
  88 }
  89
  90 static uint32_t csrr(unsigned int rd, unsigned int csr) {
  91   return (csr << 20) | (rd << 7) | MATCH_CSRRS;
  92 }
  93
  94 static uint32_t csrw(unsigned int source, unsigned int csr) {
  95   return (csr << 20) | (source << 15) | MATCH_CSRRW;
  96 }
  97
  98 static uint32_t fence_i()
  99 {
 100   return MATCH_FENCE_I;
 101 }
 102
 103 static uint32_t sb(unsigned int src, unsigned int base, uint16_t offset)
 104 {
 105   return (bits(offset, 11, 5) << 25) |
 106     (src << 20) |
 107     (base << 15) |
 108     (bits(offset, 4, 0) << 7) |
 109     MATCH_SB;
 110 }
 111
 112 static uint32_t sh(unsigned int src, unsigned int base, uint16_t offset)
 113 {
 114   return (bits(offset, 11, 5) << 25) |
 115     (src << 20) |
 116     (base << 15) |
 117     (bits(offset, 4, 0) << 7) |
 118     MATCH_SH;
 119 }
 120
 121 static uint32_t sw(unsigned int src, unsigned int base, uint16_t offset)
 122 {
 123   return (bits(offset, 11, 5) << 25) |
 124     (src << 20) |
 125     (base << 15) |
 126     (bits(offset, 4, 0) << 7) |
 127     MATCH_SW;
 128 }
 129
 130 static uint32_t sd(unsigned int src, unsigned int base, uint16_t offset)
 131 {
 132   return (bits(offset, 11, 5) << 25) |
 133     (bits(src, 4, 0) << 20) |
 134     (base << 15) |
 135     (bits(offset, 4, 0) << 7) |
 136     MATCH_SD;
 137 }
 138
 139 static uint32_t sq(unsigned int src, unsigned int base, uint16_t offset)
 140 {
 141 #if 0
 142   return (bits(offset, 11, 5) << 25) |
 143     (bits(src, 4, 0) << 20) |
 144     (base << 15) |
 145     (bits(offset, 4, 0) << 7) |
 146     MATCH_SQ;
 147 #else
 148   abort();
 149 #endif
 150 }
 151
 152 static uint32_t lq(unsigned int rd, unsigned int base, uint16_t offset)
 153 {
 154 #if 0
 155   return (bits(offset, 11, 0) << 20) |
 156     (base << 15) |
 157     (bits(rd, 4, 0) << 7) |
 158     MATCH_LQ;
 159 #else
 160   abort();
 161 #endif
 162 }
 163
 164 static uint32_t ld(unsigned int rd, unsigned int base, uint16_t offset)
 165 {
 166   return (bits(offset, 11, 0) << 20) |
 167     (base << 15) |
 168     (bits(rd, 4, 0) << 7) |
 169     MATCH_LD;
 170 }
 171
 172 static uint32_t lw(unsigned int rd, unsigned int base, uint16_t offset)
 173 {
 174   return (bits(offset, 11, 0) << 20) |
 175     (base << 15) |
 176     (bits(rd, 4, 0) << 7) |
 177     MATCH_LW;
 178 }
 179
 180 static uint32_t lh(unsigned int rd, unsigned int base, uint16_t offset)
 181 {
 182   return (bits(offset, 11, 0) << 20) |
 183     (base << 15) |
 184     (bits(rd, 4, 0) << 7) |
 185     MATCH_LH;
 186 }
 187
 188 static uint32_t lb(unsigned int rd, unsigned int base, uint16_t offset)
 189 {
 190   return (bits(offset, 11, 0) << 20) |
 191     (base << 15) |
 192     (bits(rd, 4, 0) << 7) |
 193     MATCH_LB;
 194 }
 195
 196 static uint32_t fsw(unsigned int src, unsigned int base, uint16_t offset)
 197 {
 198   return (bits(offset, 11, 5) << 25) |
 199     (bits(src, 4, 0) << 20) |
 200     (base << 15) |
 201     (bits(offset, 4, 0) << 7) |
 202     MATCH_FSW;
 203 }
 204
 205 static uint32_t fsd(unsigned int src, unsigned int base, uint16_t offset)
 206 {
 207   return (bits(offset, 11, 5) << 25) |
 208     (bits(src, 4, 0) << 20) |
 209     (base << 15) |
 210     (bits(offset, 4, 0) << 7) |
 211     MATCH_FSD;
 212 }
 213
 214 static uint32_t flw(unsigned int src, unsigned int base, uint16_t offset)
 215 {
 216   return (bits(offset, 11, 5) << 25) |
 217     (bits(src, 4, 0) << 20) |
 218     (base << 15) |
 219     (bits(offset, 4, 0) << 7) |
 220     MATCH_FLW;
 221 }
 222
 223 static uint32_t fld(unsigned int src, unsigned int base, uint16_t offset)
 224 {
 225   return (bits(offset, 11, 5) << 25) |
 226     (bits(src, 4, 0) << 20) |
 227     (base << 15) |
 228     (bits(offset, 4, 0) << 7) |
 229     MATCH_FLD;
 230 }
 231
 232 static uint32_t addi(unsigned int dest, unsigned int src, uint16_t imm)
 233 {
 234   return (bits(imm, 11, 0) << 20) |
 235     (src << 15) |
 236     (dest << 7) |
 237     MATCH_ADDI;
 238 }
 239
 240 static uint32_t ori(unsigned int dest, unsigned int src, uint16_t imm)
 241 {
 242   return (bits(imm, 11, 0) << 20) |
 243     (src << 15) |
 244     (dest << 7) |
 245     MATCH_ORI;
 246 }
 247
 248 static uint32_t xori(unsigned int dest, unsigned int src, uint16_t imm)
 249 {
 250   return (bits(imm, 11, 0) << 20) |
 251     (src << 15) |
 252     (dest << 7) |
 253     MATCH_XORI;
 254 }
 255
 256 static uint32_t srli(unsigned int dest, unsigned int src, uint8_t shamt)
 257 {
 258   return (bits(shamt, 4, 0) << 20) |
 259     (src << 15) |
 260     (dest << 7) |
 261     MATCH_SRLI;
 262 }
 263
 264
 265 static uint32_t nop()
 266 {
 267   return addi(0, 0, 0);
 268 }
 269
 270 template <typename T>
 271 unsigned int circular_buffer_t<T>::size() const
 272 {
 273   if (end >= start)
 274     return end - start;
 275   else
 276     return end + capacity - start;
 277 }
 278
 279 template <typename T>
 280 void circular_buffer_t<T>::consume(unsigned int bytes)
 281 {
 282   start = (start + bytes) % capacity;
 283 }
 284
 285 template <typename T>
 286 unsigned int circular_buffer_t<T>::contiguous_empty_size() const
 287 {
 288   if (end >= start)
 289     if (start == 0)
 290       return capacity - end - 1;
 291     else
 292       return capacity - end;
 293   else
 294     return start - end - 1;
 295 }
 296
 297 template <typename T>
 298 unsigned int circular_buffer_t<T>::contiguous_data_size() const
 299 {
 300   if (end >= start)
 301     return end - start;
 302   else
 303     return capacity - start;
 304 }
 305
 306 template <typename T>
 307 void circular_buffer_t<T>::data_added(unsigned int bytes)
 308 {
 309   end += bytes;
 310   assert(end <= capacity);
 311   if (end == capacity)
 312     end = 0;
 313 }
 314
 315 template <typename T>
 316 void circular_buffer_t<T>::reset()
 317 {
 318   start = 0;
 319   end = 0;
 320 }
 321
 322 template <typename T>
 323 void circular_buffer_t<T>::append(const T *src, unsigned int count)
 324 {
 325   unsigned int copy = std::min(count, contiguous_empty_size());
 326   memcpy(contiguous_empty(), src, copy * sizeof(T));
 327   data_added(copy);
 328   count -= copy;
 329   if (count > 0) {
 330     assert(count < contiguous_empty_size());
 331     memcpy(contiguous_empty(), src, count * sizeof(T));
 332     data_added(count);
 333   }
 334 }
 335
 336 ////////////////////////////// Debug Operations
 337
 338 class halt_op_t : public operation_t
 339 {
 340   public:
 341     halt_op_t(gdbserver_t& gdbserver, bool send_status=false) :
 342       operation_t(gdbserver), send_status(send_status),
 343       state(ST_ENTER) {};
 344
 345     void write_dpc_program() {
 346       gs.dr_write32(0, csrsi(CSR_DCSR, DCSR_HALT));
 347       gs.dr_write32(1, csrr(S0, CSR_DPC));
 348       gs.dr_write_store(2, S0, SLOT_DATA0);
 349       gs.dr_write_jump(3);
 350       gs.set_interrupt(0);
 351     }
 352
 353     bool perform_step(unsigned int step) {
 354       switch (state) {
 355         gs.tselect_valid = false;
 356         case ST_ENTER:
 357           if (gs.xlen == 0) {
 358             gs.dr_write32(0, xori(S1, ZERO, -1));
 359             gs.dr_write32(1, srli(S1, S1, 31));
 360             // 0x00000001  0x00000001:ffffffff  0x00000001:ffffffff:ffffffff:ffffffff
 361             gs.dr_write32(2, sw(S1, ZERO, DEBUG_RAM_START));
 362             gs.dr_write32(3, srli(S1, S1, 31));
 363             // 0x00000000  0x00000000:00000003  0x00000000:00000003:ffffffff:ffffffff
 364             gs.dr_write32(4, sw(S1, ZERO, DEBUG_RAM_START + 4));
 365             gs.dr_write_jump(5);
 366             gs.set_interrupt(0);
 367             state = ST_XLEN;
 368
 369           } else {
 370             write_dpc_program();
 371             state = ST_DPC;
 372           }
 373           return false;
 374
 375         case ST_XLEN:
 376           {
 377             uint32_t word0 = gs.dr_read32(0);
 378             uint32_t word1 = gs.dr_read32(1);
 379
 380             if (word0 == 1 && word1 == 0) {
 381               gs.xlen = 32;
 382             } else if (word0 == 0xffffffff && word1 == 3) {
 383               gs.xlen = 64;
 384             } else if (word0 == 0xffffffff && word1 == 0xffffffff) {
 385               gs.xlen = 128;
 386             }
 387
 388             write_dpc_program();
 389             state = ST_DPC;
 390             return false;
 391           }
 392
 393         case ST_DPC:
 394           gs.dpc = gs.dr_read(SLOT_DATA0);
 395           gs.dr_write32(0, csrr(S0, CSR_MSTATUS));
 396           gs.dr_write_store(1, S0, SLOT_DATA0);
 397           gs.dr_write_jump(2);
 398           gs.set_interrupt(0);
 399           state = ST_MSTATUS;
 400           return false;
 401
 402         case ST_MSTATUS:
 403           gs.mstatus = gs.dr_read(SLOT_DATA0);
 404           gs.dr_write32(0, csrr(S0, CSR_DCSR));
 405           gs.dr_write32(1, sw(S0, 0, (uint16_t) DEBUG_RAM_START + 16));
 406           gs.dr_write_jump(2);
 407           gs.set_interrupt(0);
 408           state = ST_DCSR;
 409           return false;
 410
 411         case ST_DCSR:
 412           gs.dcsr = gs.dr_read32(4);
 413
 414           gs.sptbr_valid = false;
 415           gs.pte_cache.clear();
 416
 417           if (send_status) {
 418             switch (get_field(gs.dcsr, DCSR_CAUSE)) {
 419               case DCSR_CAUSE_NONE:
 420                 fprintf(stderr, "Internal error. Processor halted without reason.\n");
 421                 abort();
 422
 423               case DCSR_CAUSE_DEBUGINT:
 424                 gs.send_packet("S02");   // Pretend program received SIGINT.
 425                 break;
 426
 427               case DCSR_CAUSE_HWBP:
 428               case DCSR_CAUSE_STEP:
 429               case DCSR_CAUSE_HALT:
 430                 // There's no gdb code for this.
 431                 gs.send_packet("T05");
 432                 break;
 433               case DCSR_CAUSE_SWBP:
 434                 gs.send_packet("T05swbreak:;");
 435                 break;
 436             }
 437           }
 438           return true;
 439
 440         default:
 441           assert(0);
 442       }
 443     }
 444
 445   private:
 446     bool send_status;
 447     enum {
 448       ST_ENTER,
 449       ST_XLEN,
 450       ST_DPC,
 451       ST_MSTATUS,
 452       ST_DCSR
 453     } state;
 454 };
 455
 456 class continue_op_t : public operation_t
 457 {
 458   public:
 459     continue_op_t(gdbserver_t& gdbserver, bool single_step) :
 460       operation_t(gdbserver), single_step(single_step) {};
 461
 462     bool perform_step(unsigned int step) {
 463       D(fprintf(stderr, "continue step %d\n", step));
 464       switch (step) {
 465         case 0:
 466           gs.dr_write_load(0, S0, SLOT_DATA0);
 467           gs.dr_write32(1, csrw(S0, CSR_DPC));
 468           // TODO: Isn't there a fence.i in Debug ROM already?
 469           if (gs.fence_i_required) {
 470             gs.dr_write32(2, fence_i());
 471             gs.dr_write_jump(3);
 472             gs.fence_i_required = false;
 473           } else {
 474             gs.dr_write_jump(2);
 475           }
 476           gs.dr_write(SLOT_DATA0, gs.dpc);
 477           gs.set_interrupt(0);
 478           return false;
 479
 480         case 1:
 481           gs.dr_write_load(0, S0, SLOT_DATA0);
 482           gs.dr_write32(1, csrw(S0, CSR_MSTATUS));
 483           gs.dr_write_jump(2);
 484           gs.dr_write(SLOT_DATA0, gs.mstatus);
 485           gs.set_interrupt(0);
 486           return false;
 487
 488         case 2:
 489           gs.dr_write32(0, lw(S0, 0, (uint16_t) DEBUG_RAM_START+16));
 490           gs.dr_write32(1, csrw(S0, CSR_DCSR));
 491           gs.dr_write_jump(2);
 492
 493           reg_t dcsr = set_field(gs.dcsr, DCSR_HALT, 0);
 494           dcsr = set_field(dcsr, DCSR_STEP, single_step);
 495           // Software breakpoints should go here.
 496           dcsr = set_field(dcsr, DCSR_EBREAKM, 1);
 497           dcsr = set_field(dcsr, DCSR_EBREAKH, 1);
 498           dcsr = set_field(dcsr, DCSR_EBREAKS, 1);
 499           dcsr = set_field(dcsr, DCSR_EBREAKU, 1);
 500           gs.dr_write32(4, dcsr);
 501
 502           gs.set_interrupt(0);
 503           return true;
 504       }
 505       return false;
 506     }
 507
 508   private:
 509     bool single_step;
 510 };
 511
 512 class general_registers_read_op_t : public operation_t
 513 {
 514   // Register order that gdb expects is:
 515   //   "x0",  "x1",  "x2",  "x3",  "x4",  "x5",  "x6",  "x7",
 516   //   "x8",  "x9",  "x10", "x11", "x12", "x13", "x14", "x15",
 517   //   "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
 518   //   "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31",
 519
 520   // Each byte of register data is described by two hex digits. The bytes with
 521   // the register are transmitted in target byte order. The size of each
 522   // register and their position within the ‘g’ packet are determined by the
 523   // gdb internal gdbarch functions DEPRECATED_REGISTER_RAW_SIZE and
 524   // gdbarch_register_name.
 525
 526   public:
 527     general_registers_read_op_t(gdbserver_t& gdbserver) :
 528       operation_t(gdbserver) {};
 529
 530     bool perform_step(unsigned int step)
 531     {
 532       D(fprintf(stderr, "register_read step %d\n", step));
 533       if (step == 0) {
 534         gs.start_packet();
 535
 536         // x0 is always zero.
 537         if (gs.xlen == 32) {
 538           gs.send((uint32_t) 0);
 539         } else {
 540           gs.send((uint64_t) 0);
 541         }
 542
 543         gs.dr_write_store(0, 1, SLOT_DATA0);
 544         gs.dr_write_store(1, 2, SLOT_DATA1);
 545         gs.dr_write_jump(2);
 546         gs.set_interrupt(0);
 547         return false;
 548       }
 549
 550       if (gs.xlen == 32) {
 551         gs.send((uint32_t) gs.dr_read(SLOT_DATA0));
 552       } else {
 553         gs.send((uint64_t) gs.dr_read(SLOT_DATA0));
 554       }
 555       if (step >= 16) {
 556         gs.end_packet();
 557         return true;
 558       }
 559
 560       if (gs.xlen == 32) {
 561         gs.send((uint32_t) gs.dr_read(SLOT_DATA1));
 562       } else {
 563         gs.send((uint64_t) gs.dr_read(SLOT_DATA1));
 564       }
 565
 566       unsigned int current_reg = 2 * step + 1;
 567       unsigned int i = 0;
 568       if (current_reg == S1) {
 569         gs.dr_write_load(i++, S1, SLOT_DATA_LAST);
 570       }
 571       gs.dr_write_store(i++, current_reg, SLOT_DATA0);
 572       if (current_reg + 1 == S0) {
 573         gs.dr_write32(i++, csrr(S0, CSR_DSCRATCH));
 574       }
 575       if (step < 15) {
 576         gs.dr_write_store(i++, current_reg+1, SLOT_DATA1);
 577       }
 578       gs.dr_write_jump(i);
 579       gs.set_interrupt(0);
 580
 581       return false;
 582     }
 583 };
 584
 585 class register_read_op_t : public operation_t
 586 {
 587   public:
 588     register_read_op_t(gdbserver_t& gdbserver, unsigned int reg) :
 589       operation_t(gdbserver), reg(reg) {};
 590
 591     bool perform_step(unsigned int step)
 592     {
 593       switch (step) {
 594         case 0:
 595           if (reg >= REG_XPR0 && reg <= REG_XPR31) {
 596             if (gs.xlen == 32) {
 597               gs.dr_write32(0, sw(reg - REG_XPR0, 0, (uint16_t) DEBUG_RAM_START + 16));
 598             } else {
 599               gs.dr_write32(0, sd(reg - REG_XPR0, 0, (uint16_t) DEBUG_RAM_START + 16));
 600             }
 601             gs.dr_write_jump(1);
 602           } else if (reg == REG_PC) {
 603             gs.start_packet();
 604             if (gs.xlen == 32) {
 605               gs.send((uint32_t) gs.dpc);
 606             } else {
 607               gs.send(gs.dpc);
 608             }
 609             gs.end_packet();
 610             return true;
 611           } else if (reg >= REG_FPR0 && reg <= REG_FPR31) {
 612             // send(p->state.FPR[reg - REG_FPR0]);
 613             if (gs.xlen == 32) {
 614               gs.dr_write32(0, fsw(reg - REG_FPR0, 0, (uint16_t) DEBUG_RAM_START + 16));
 615             } else {
 616               gs.dr_write32(0, fsd(reg - REG_FPR0, 0, (uint16_t) DEBUG_RAM_START + 16));
 617             }
 618             gs.dr_write_jump(1);
 619           } else if (reg >= REG_CSR0 && reg <= REG_CSR4095) {
 620             gs.dr_write32(0, csrr(S0, reg - REG_CSR0));
 621             gs.dr_write_store(1, S0, SLOT_DATA0);
 622             gs.dr_write_jump(2);
 623             // If we hit an exception reading the CSR, we'll end up returning ~0 as
 624             // the register's value, which is what we want. (Right?)
 625             gs.dr_write(SLOT_DATA0, ~(uint64_t) 0);
 626           } else if (reg == REG_PRIV) {
 627             gs.start_packet();
 628             gs.send((uint8_t) get_field(gs.dcsr, DCSR_PRV));
 629             gs.end_packet();
 630             return true;
 631           } else {
 632             gs.send_packet("E02");
 633             return true;
 634           }
 635           gs.set_interrupt(0);
 636           return false;
 637
 638         case 1:
 639           gs.start_packet();
 640           if (gs.xlen == 32) {
 641             gs.send(gs.dr_read32(4));
 642           } else {
 643             gs.send(gs.dr_read(SLOT_DATA0));
 644           }
 645           gs.end_packet();
 646           return true;
 647       }
 648       return false;
 649     }
 650
 651   private:
 652     unsigned int reg;
 653 };
 654
 655 class register_write_op_t : public operation_t
 656 {
 657   public:
 658     register_write_op_t(gdbserver_t& gdbserver, unsigned int reg, reg_t value) :
 659       operation_t(gdbserver), reg(reg), value(value) {};
 660
 661     bool perform_step(unsigned int step)
 662     {
 663       gs.dr_write_load(0, S0, SLOT_DATA0);
 664       gs.dr_write(SLOT_DATA0, value);
 665       if (reg == S0) {
 666         gs.dr_write32(1, csrw(S0, CSR_DSCRATCH));
 667         gs.dr_write_jump(2);
 668       } else if (reg == S1) {
 669         gs.dr_write_store(1, S0, SLOT_DATA_LAST);
 670         gs.dr_write_jump(2);
 671       } else if (reg >= REG_XPR0 && reg <= REG_XPR31) {
 672         gs.dr_write32(1, addi(reg, S0, 0));
 673         gs.dr_write_jump(2);
 674       } else if (reg == REG_PC) {
 675         gs.dpc = value;
 676         return true;
 677       } else if (reg >= REG_FPR0 && reg <= REG_FPR31) {
 678         if (gs.xlen == 32) {
 679           gs.dr_write32(0, flw(reg - REG_FPR0, 0, (uint16_t) DEBUG_RAM_START + 16));
 680         } else {
 681           gs.dr_write32(0, fld(reg - REG_FPR0, 0, (uint16_t) DEBUG_RAM_START + 16));
 682         }
 683         gs.dr_write_jump(1);
 684       } else if (reg >= REG_CSR0 && reg <= REG_CSR4095) {
 685         gs.dr_write32(1, csrw(S0, reg - REG_CSR0));
 686         gs.dr_write_jump(2);
 687         if (reg == REG_CSR0 + CSR_SPTBR) {
 688           gs.sptbr = value;
 689           gs.sptbr_valid = true;
 690         }
 691       } else if (reg == REG_PRIV) {
 692         gs.dcsr = set_field(gs.dcsr, DCSR_PRV, value);
 693         return true;
 694       } else {
 695         gs.send_packet("E02");
 696         return true;
 697       }
 698       gs.set_interrupt(0);
 699       gs.send_packet("OK");
 700       return true;
 701     }
 702
 703   private:
 704     unsigned int reg;
 705     reg_t value;
 706 };
 707
 708 class memory_read_op_t : public operation_t
 709 {
 710   public:
 711     // Read length bytes from vaddr, storing the result into data.
 712     // If data is NULL, send the result straight to gdb.
 713     memory_read_op_t(gdbserver_t& gdbserver, reg_t vaddr, unsigned int length,
 714         unsigned char *data=NULL) :
 715       operation_t(gdbserver), vaddr(vaddr), length(length), data(data), index(0)
 716     {
 717       buf = new uint8_t[length];
 718     };
 719
 720     ~memory_read_op_t()
 721     {
 722       delete[] buf;
 723     }
 724
 725     bool perform_step(unsigned int step)
 726     {
 727       if (step == 0) {
 728         // address goes in S0
 729         paddr = gs.translate(vaddr);
 730         access_size = gs.find_access_size(paddr, length);
 731
 732         gs.dr_write_load(0, S0, SLOT_DATA0);
 733         switch (access_size) {
 734           case 1:
 735             gs.dr_write32(1, lb(S1, S0, 0));
 736             break;
 737           case 2:
 738             gs.dr_write32(1, lh(S1, S0, 0));
 739             break;
 740           case 4:
 741             gs.dr_write32(1, lw(S1, S0, 0));
 742             break;
 743           case 8:
 744             gs.dr_write32(1, ld(S1, S0, 0));
 745             break;
 746         }
 747         gs.dr_write_store(2, S1, SLOT_DATA1);
 748         gs.dr_write_jump(3);
 749         gs.dr_write(SLOT_DATA0, paddr);
 750         gs.set_interrupt(0);
 751
 752         return false;
 753       }
 754
 755       if (gs.dr_read32(DEBUG_RAM_SIZE / 4 - 1)) {
 756         // Note that OpenOCD doesn't report this error to gdb by default. They
 757         // think it can mess up stack tracing. So far I haven't seen any
 758         // problems.
 759         gs.send_packet("E99");
 760         return true;
 761       }
 762
 763       reg_t value = gs.dr_read(SLOT_DATA1);
 764       for (unsigned int i = 0; i < access_size; i++) {
 765         if (data) {
 766           *(data++) = value & 0xff;
 767           D(fprintf(stderr, "%02x", (unsigned int) (value & 0xff)));
 768         } else {
 769           buf[index++] = value & 0xff;
 770         }
 771         value >>= 8;
 772       }
 773       if (data) {
 774         D(fprintf(stderr, "\n"));
 775       }
 776       length -= access_size;
 777       paddr += access_size;
 778
 779       if (length == 0) {
 780         if (!data) {
 781           gs.start_packet();
 782           char buffer[3];
 783           for (unsigned int i = 0; i < index; i++) {
 784             sprintf(buffer, "%02x", (unsigned int) buf[i]);
 785             gs.send(buffer);
 786           }
 787           gs.end_packet();
 788         }
 789         return true;
 790       } else {
 791         gs.dr_write(SLOT_DATA0, paddr);
 792         gs.set_interrupt(0);
 793         return false;
 794       }
 795     }
 796
 797   private:
 798     reg_t vaddr;
 799     unsigned int length;
 800     unsigned char* data;
 801     reg_t paddr;
 802     unsigned int access_size;
 803     unsigned int index;
 804     uint8_t *buf;
 805 };
 806
 807 class memory_write_op_t : public operation_t
 808 {
 809   public:
 810     memory_write_op_t(gdbserver_t& gdbserver, reg_t vaddr, unsigned int length,
 811         const unsigned char *data) :
 812       operation_t(gdbserver), vaddr(vaddr), offset(0), length(length), data(data) {};
 813
 814     ~memory_write_op_t() {
 815       delete[] data;
 816     }
 817
 818     bool perform_step(unsigned int step)
 819     {
 820       reg_t paddr = gs.translate(vaddr);
 821
 822       unsigned int data_offset;
 823       switch (gs.xlen) {
 824         case 32:
 825           data_offset = slot_offset32[SLOT_DATA1];
 826           break;
 827         case 64:
 828           data_offset = slot_offset64[SLOT_DATA1];
 829           break;
 830         case 128:
 831           data_offset = slot_offset128[SLOT_DATA1];
 832           break;
 833         default:
 834           abort();
 835       }
 836
 837       if (step == 0) {
 838         access_size = gs.find_access_size(paddr, length);
 839
 840         D(fprintf(stderr, "write to 0x%lx -> 0x%lx (access=%d): ", vaddr, paddr,
 841             access_size));
 842         for (unsigned int i = 0; i < length; i++) {
 843           D(fprintf(stderr, "%02x", data[i]));
 844         }
 845         D(fprintf(stderr, "\n"));
 846
 847         // address goes in S0
 848         gs.dr_write_load(0, S0, SLOT_DATA0);
 849         switch (access_size) {
 850           case 1:
 851             gs.dr_write32(1, lb(S1, 0, (uint16_t) DEBUG_RAM_START + 4*data_offset));
 852             gs.dr_write32(2, sb(S1, S0, 0));
 853             gs.dr_write32(data_offset, data[0]);
 854             break;
 855           case 2:
 856             gs.dr_write32(1, lh(S1, 0, (uint16_t) DEBUG_RAM_START + 4*data_offset));
 857             gs.dr_write32(2, sh(S1, S0, 0));
 858             gs.dr_write32(data_offset, data[0] | (data[1] << 8));
 859             break;
 860           case 4:
 861             gs.dr_write32(1, lw(S1, 0, (uint16_t) DEBUG_RAM_START + 4*data_offset));
 862             gs.dr_write32(2, sw(S1, S0, 0));
 863             gs.dr_write32(data_offset, data[0] | (data[1] << 8) |
 864                 (data[2] << 16) | (data[3] << 24));
 865             break;
 866           case 8:
 867             gs.dr_write32(1, ld(S1, 0, (uint16_t) DEBUG_RAM_START + 4*data_offset));
 868             gs.dr_write32(2, sd(S1, S0, 0));
 869             gs.dr_write32(data_offset, data[0] | (data[1] << 8) |
 870                 (data[2] << 16) | (data[3] << 24));
 871             gs.dr_write32(data_offset+1, data[4] | (data[5] << 8) |
 872                 (data[6] << 16) | (data[7] << 24));
 873             break;
 874           default:
 875             fprintf(stderr, "gdbserver error: write %d bytes to 0x%016" PRIx64
 876                     " -> 0x%016" PRIx64 "; access_size=%d\n",
 877                     length, vaddr, paddr, access_size);
 878             gs.send_packet("E12");
 879             return true;
 880         }
 881         gs.dr_write_jump(3);
 882         gs.dr_write(SLOT_DATA0, paddr);
 883         gs.set_interrupt(0);
 884
 885         return false;
 886       }
 887
 888       if (gs.dr_read32(DEBUG_RAM_SIZE / 4 - 1)) {
 889         gs.send_packet("E98");
 890         return true;
 891       }
 892
 893       offset += access_size;
 894       if (offset >= length) {
 895         gs.send_packet("OK");
 896         return true;
 897       } else {
 898         const unsigned char *d = data + offset;
 899         switch (access_size) {
 900           case 1:
 901             gs.dr_write32(data_offset, d[0]);
 902             break;
 903           case 2:
 904             gs.dr_write32(data_offset, d[0] | (d[1] << 8));
 905             break;
 906           case 4:
 907             gs.dr_write32(data_offset, d[0] | (d[1] << 8) |
 908                 (d[2] << 16) | (d[3] << 24));
 909             break;
 910           case 8:
 911             gs.dr_write32(data_offset, d[0] | (d[1] << 8) |
 912                 (d[2] << 16) | (d[3] << 24));
 913             gs.dr_write32(data_offset+1, d[4] | (d[5] << 8) |
 914                 (d[6] << 16) | (d[7] << 24));
 915             break;
 916           default:
 917             gs.send_packet("E13");
 918             return true;
 919         }
 920         gs.dr_write(SLOT_DATA0, paddr + offset);
 921         gs.set_interrupt(0);
 922         return false;
 923       }
 924     }
 925
 926   private:
 927     reg_t vaddr;
 928     unsigned int offset;
 929     unsigned int length;
 930     unsigned int access_size;
 931     const unsigned char *data;
 932 };
 933
 934 class collect_translation_info_op_t : public operation_t
 935 {
 936   public:
 937     // Read sufficient information from the target into gdbserver structures so
 938     // that it's possible to translate vaddr, vaddr+length, and all addresses
 939     // in between to physical addresses.
 940     collect_translation_info_op_t(gdbserver_t& gdbserver, reg_t vaddr, size_t length) :
 941       operation_t(gdbserver), state(STATE_START), vaddr(vaddr), length(length) {};
 942
 943     bool perform_step(unsigned int step)
 944     {
 945       unsigned int vm = gs.virtual_memory();
 946
 947       if (step == 0) {
 948         switch (vm) {
 949           case VM_MBARE:
 950             // Nothing to be done.
 951             return true;
 952
 953           case VM_SV32:
 954             levels = 2;
 955             ptidxbits = 10;
 956             ptesize = 4;
 957             break;
 958           case VM_SV39:
 959             levels = 3;
 960             ptidxbits = 9;
 961             ptesize = 8;
 962             break;
 963           case VM_SV48:
 964             levels = 4;
 965             ptidxbits = 9;
 966             ptesize = 8;
 967             break;
 968
 969           default:
 970             {
 971               char buf[100];
 972               sprintf(buf, "VM mode %d is not supported by gdbserver.cc.", vm);
 973               die(buf);
 974               return true;        // die doesn't return, but gcc doesn't know that.
 975             }
 976         }
 977       }
 978
 979       // Perform any reads from the just-completed action.
 980       switch (state) {
 981         case STATE_START:
 982           break;
 983         case STATE_READ_SPTBR:
 984           gs.sptbr = gs.dr_read(SLOT_DATA0);
 985           gs.sptbr_valid = true;
 986           break;
 987         case STATE_READ_PTE:
 988           if (ptesize == 4) {
 989               gs.pte_cache[pte_addr] = gs.dr_read32(4);
 990           } else {
 991               gs.pte_cache[pte_addr] = ((uint64_t) gs.dr_read32(5) << 32) |
 992                   gs.dr_read32(4);
 993           }
 994           D(fprintf(stderr, "pte_cache[0x%lx] = 0x%lx\n", pte_addr, gs.pte_cache[pte_addr]));
 995           break;
 996       }
 997
 998       // Set up the next action.
 999       // We only get here for VM_SV32/39/38.
1000
1001       if (!gs.sptbr_valid) {
1002         state = STATE_READ_SPTBR;
1003         gs.dr_write32(0, csrr(S0, CSR_SPTBR));
1004         gs.dr_write_store(1, S0, SLOT_DATA0);
1005         gs.dr_write_jump(2);
1006         gs.set_interrupt(0);
1007         return false;
1008       }
1009
1010       reg_t base = gs.sptbr << PGSHIFT;
1011       int ptshift = (levels - 1) * ptidxbits;
1012       for (unsigned int i = 0; i < levels; i++, ptshift -= ptidxbits) {
1013         reg_t idx = (vaddr >> (PGSHIFT + ptshift)) & ((1 << ptidxbits) - 1);
1014
1015         pte_addr = base + idx * ptesize;
1016         auto it = gs.pte_cache.find(pte_addr);
1017         if (it == gs.pte_cache.end()) {
1018           state = STATE_READ_PTE;
1019           if (ptesize == 4) {
1020             gs.dr_write32(0, lw(S0, 0, (uint16_t) DEBUG_RAM_START + 16));
1021             gs.dr_write32(1, lw(S1, S0, 0));
1022             gs.dr_write32(2, sw(S1, 0, (uint16_t) DEBUG_RAM_START + 16));
1023           } else {
1024             assert(gs.xlen >= 64);
1025             gs.dr_write32(0, ld(S0, 0, (uint16_t) DEBUG_RAM_START + 16));
1026             gs.dr_write32(1, ld(S1, S0, 0));
1027             gs.dr_write32(2, sd(S1, 0, (uint16_t) DEBUG_RAM_START + 16));
1028           }
1029           gs.dr_write32(3, jal(0, (uint32_t) (DEBUG_ROM_RESUME - (DEBUG_RAM_START + 4*3))));
1030           gs.dr_write32(4, pte_addr);
1031           gs.dr_write32(5, pte_addr >> 32);
1032           gs.set_interrupt(0);
1033           return false;
1034         }
1035
1036         reg_t pte = gs.pte_cache[pte_addr];
1037         reg_t ppn = pte >> PTE_PPN_SHIFT;
1038
1039         if (PTE_TABLE(pte)) { // next level of page table
1040           base = ppn << PGSHIFT;
1041         } else {
1042           // We've collected all the data required for the translation.
1043           return true;
1044         }
1045       }
1046       fprintf(stderr,
1047           "ERROR: gdbserver couldn't find appropriate PTEs to translate 0x%016" PRIx64 "\n",
1048           vaddr);
1049       return true;
1050     }
1051
1052   private:
1053     enum {
1054       STATE_START,
1055       STATE_READ_SPTBR,
1056       STATE_READ_PTE
1057     } state;
1058     reg_t vaddr;
1059     size_t length;
1060     unsigned int levels;
1061     unsigned int ptidxbits;
1062     unsigned int ptesize;
1063     reg_t pte_addr;
1064 };
1065
1066 class hardware_breakpoint_insert_op_t : public operation_t
1067 {
1068   public:
1069     hardware_breakpoint_insert_op_t(gdbserver_t& gdbserver,
1070         hardware_breakpoint_t bp) :
1071       operation_t(gdbserver), state(STATE_START), bp(bp) {};
1072
1073     void write_new_index_program()
1074     {
1075       gs.dr_write_load(0, S0, SLOT_DATA1);
1076       gs.dr_write32(1, csrw(S0, CSR_TSELECT));
1077       gs.dr_write32(2, csrr(S0, CSR_TSELECT));
1078       gs.dr_write_store(3, S0, SLOT_DATA1);
1079       gs.dr_write_jump(4);
1080       gs.dr_write(SLOT_DATA1, bp.index);
1081     }
1082
1083     bool perform_step(unsigned int step)
1084     {
1085       switch (state) {
1086         case STATE_START:
1087           bp.index = 0;
1088           write_new_index_program();
1089           state = STATE_CHECK_INDEX;
1090           break;
1091
1092         case STATE_CHECK_INDEX:
1093           if (gs.dr_read(SLOT_DATA1) != bp.index) {
1094             // We've exhausted breakpoints without finding an appropriate one.
1095             gs.send_packet("E58");
1096             return true;
1097           }
1098
1099           gs.dr_write32(0, csrr(S0, CSR_TDATA1));
1100           gs.dr_write_store(1, S0, SLOT_DATA0);
1101           gs.dr_write_jump(2);
1102           state = STATE_CHECK_MCONTROL;
1103           break;
1104
1105         case STATE_CHECK_MCONTROL:
1106           {
1107             reg_t mcontrol = gs.dr_read(SLOT_DATA0);
1108             unsigned int type = mcontrol >> (gs.xlen - 4);
1109             if (type == 0) {
1110               // We've exhausted breakpoints without finding an appropriate one.
1111               gs.send_packet("E58");
1112               return true;
1113             }
1114
1115             if (type == 2 &&
1116                 !get_field(mcontrol, MCONTROL_EXECUTE) &&
1117                 !get_field(mcontrol, MCONTROL_LOAD) &&
1118                 !get_field(mcontrol, MCONTROL_STORE)) {
1119               // Found an unused trigger.
1120               gs.dr_write_load(0, S0, SLOT_DATA1);
1121               gs.dr_write32(1, csrw(S0, CSR_TDATA1));
1122               gs.dr_write_jump(2);
1123               mcontrol = set_field(0, MCONTROL_ACTION, MCONTROL_ACTION_DEBUG_MODE);
1124               mcontrol = set_field(mcontrol, MCONTROL_DMODE(gs.xlen), 1);
1125               mcontrol = set_field(mcontrol, MCONTROL_MATCH, MCONTROL_MATCH_EQUAL);
1126               mcontrol = set_field(mcontrol, MCONTROL_M, 1);
1127               mcontrol = set_field(mcontrol, MCONTROL_H, 1);
1128               mcontrol = set_field(mcontrol, MCONTROL_S, 1);
1129               mcontrol = set_field(mcontrol, MCONTROL_U, 1);
1130               mcontrol = set_field(mcontrol, MCONTROL_EXECUTE, bp.execute);
1131               mcontrol = set_field(mcontrol, MCONTROL_LOAD, bp.load);
1132               mcontrol = set_field(mcontrol, MCONTROL_STORE, bp.store);
1133               // For store triggers it's nicer to fire just before the
1134               // instruction than just after. However, gdb doesn't clear the
1135               // breakpoints and step before resuming from a store trigger.
1136               // That means that without extra code, you'll keep hitting the
1137               // same watchpoint over and over again. That's not useful at all.
1138               // Instead of fixing this the right way, just set timing=1 for
1139               // those triggers.
1140               if (bp.load || bp.store)
1141                 mcontrol = set_field(mcontrol, MCONTROL_TIMING, 1);
1142
1143               gs.dr_write(SLOT_DATA1, mcontrol);
1144               state = STATE_WRITE_ADDRESS;
1145             } else {
1146               bp.index++;
1147               write_new_index_program();
1148               state = STATE_CHECK_INDEX;
1149             }
1150           }
1151           break;
1152
1153         case STATE_WRITE_ADDRESS:
1154           {
1155             gs.dr_write_load(0, S0, SLOT_DATA1);
1156             gs.dr_write32(1, csrw(S0, CSR_TDATA2));
1157             gs.dr_write_jump(2);
1158             gs.dr_write(SLOT_DATA1, bp.vaddr);
1159             gs.set_interrupt(0);
1160             gs.send_packet("OK");
1161
1162             gs.hardware_breakpoints.insert(bp);
1163
1164             return true;
1165           }
1166       }
1167
1168       gs.set_interrupt(0);
1169       return false;
1170     }
1171
1172   private:
1173     enum {
1174       STATE_START,
1175       STATE_CHECK_INDEX,
1176       STATE_CHECK_MCONTROL,
1177       STATE_WRITE_ADDRESS
1178     } state;
1179     hardware_breakpoint_t bp;
1180 };
1181
1182 class maybe_save_tselect_op_t : public operation_t
1183 {
1184   public:
1185     maybe_save_tselect_op_t(gdbserver_t& gdbserver) : operation_t(gdbserver) {};
1186     bool perform_step(unsigned int step) {
1187       if (gs.tselect_valid)
1188         return true;
1189
1190       switch (step) {
1191         case 0:
1192           gs.dr_write32(0, csrr(S0, CSR_TDATA1));
1193           gs.dr_write_store(1, S0, SLOT_DATA0);
1194           gs.dr_write_jump(2);
1195           gs.set_interrupt(0);
1196           return false;
1197         case 1:
1198           gs.tselect = gs.dr_read(SLOT_DATA0);
1199           gs.tselect_valid = true;
1200           break;
1201       }
1202       return true;
1203     }
1204 };
1205
1206 class maybe_restore_tselect_op_t : public operation_t
1207 {
1208   public:
1209     maybe_restore_tselect_op_t(gdbserver_t& gdbserver) : operation_t(gdbserver) {};
1210     bool perform_step(unsigned int step) {
1211       if (gs.tselect_valid) {
1212         gs.dr_write_load(0, S0, SLOT_DATA1);
1213         gs.dr_write32(1, csrw(S0, CSR_TSELECT));
1214         gs.dr_write_jump(2);
1215         gs.dr_write(SLOT_DATA1, gs.tselect);
1216       }
1217       return true;
1218     }
1219 };
1220
1221 class hardware_breakpoint_remove_op_t : public operation_t
1222 {
1223   public:
1224     hardware_breakpoint_remove_op_t(gdbserver_t& gdbserver,
1225         hardware_breakpoint_t bp) :
1226       operation_t(gdbserver), bp(bp) {};
1227
1228     bool perform_step(unsigned int step) {
1229       gs.dr_write32(0, addi(S0, ZERO, bp.index));
1230       gs.dr_write32(1, csrw(S0, CSR_TSELECT));
1231       gs.dr_write32(2, csrw(ZERO, CSR_TDATA1));
1232       gs.dr_write_jump(3);
1233       gs.set_interrupt(0);
1234       return true;
1235     }
1236
1237   private:
1238     hardware_breakpoint_t bp;
1239 };
1240
1241 ////////////////////////////// gdbserver itself
1242
1243 gdbserver_t::gdbserver_t(uint16_t port, sim_t *sim) :
1244   xlen(0),
1245   sim(sim),
1246   client_fd(0),
1247   // gdb likes to send 0x100000 bytes at once when downloading.
1248   recv_buf(0x180000), send_buf(64 * 1024)
1249 {
1250   socket_fd = socket(AF_INET, SOCK_STREAM, 0);
1251   if (socket_fd == -1) {
1252     fprintf(stderr, "failed to make socket: %s (%d)\n", strerror(errno), errno);
1253     abort();
1254   }
1255
1256   fcntl(socket_fd, F_SETFL, O_NONBLOCK);
1257   int reuseaddr = 1;
1258   if (setsockopt(socket_fd, SOL_SOCKET, SO_REUSEADDR, &reuseaddr,
1259         sizeof(int)) == -1) {
1260     fprintf(stderr, "failed setsockopt: %s (%d)\n", strerror(errno), errno);
1261     abort();
1262   }
1263
1264   struct sockaddr_in addr;
1265   memset(&addr, 0, sizeof(addr));
1266   addr.sin_family = AF_INET;
1267   addr.sin_addr.s_addr = INADDR_ANY;
1268   addr.sin_port = htons(port);
1269
1270   if (bind(socket_fd, (struct sockaddr *) &addr, sizeof(addr)) == -1) {
1271     fprintf(stderr, "failed to bind socket: %s (%d)\n", strerror(errno), errno);
1272     abort();
1273   }
1274
1275   if (listen(socket_fd, 1) == -1) {
1276     fprintf(stderr, "failed to listen on socket: %s (%d)\n", strerror(errno), errno);
1277     abort();
1278   }
1279 }
1280
1281 unsigned int gdbserver_t::find_access_size(reg_t address, int length)
1282 {
1283   reg_t composite = address | length;
1284   if ((composite & 0x7) == 0 && xlen >= 64)
1285     return 8;
1286   if ((composite & 0x3) == 0)
1287     return 4;
1288   return 1;
1289 }
1290
1291 reg_t gdbserver_t::translate(reg_t vaddr)
1292 {
1293   unsigned int vm = virtual_memory();
1294   unsigned int levels, ptidxbits, ptesize;
1295
1296   switch (vm) {
1297     case VM_MBARE:
1298       return vaddr;
1299
1300     case VM_SV32:
1301       levels = 2;
1302       ptidxbits = 10;
1303       ptesize = 4;
1304       break;
1305     case VM_SV39:
1306       levels = 3;
1307       ptidxbits = 9;
1308       ptesize = 8;
1309       break;
1310     case VM_SV48:
1311       levels = 4;
1312       ptidxbits = 9;
1313       ptesize = 8;
1314       break;
1315
1316     default:
1317       {
1318         char buf[100];
1319         sprintf(buf, "VM mode %d is not supported by gdbserver.cc.", vm);
1320         die(buf);
1321         return true;        // die doesn't return, but gcc doesn't know that.
1322       }
1323   }
1324
1325   // Handle page tables here. There's a bunch of duplicated code with
1326   // collect_translation_info_op_t. :-(
1327   reg_t base = sptbr << PGSHIFT;
1328   int ptshift = (levels - 1) * ptidxbits;
1329   for (unsigned int i = 0; i < levels; i++, ptshift -= ptidxbits) {
1330     reg_t idx = (vaddr >> (PGSHIFT + ptshift)) & ((1 << ptidxbits) - 1);
1331
1332     reg_t pte_addr = base + idx * ptesize;
1333     auto it = pte_cache.find(pte_addr);
1334     if (it == pte_cache.end()) {
1335       fprintf(stderr, "ERROR: gdbserver tried to translate 0x%016" PRIx64
1336           " without first collecting the relevant PTEs.\n", vaddr);
1337       die("gdbserver_t::translate()");
1338     }
1339
1340     reg_t pte = pte_cache[pte_addr];
1341     reg_t ppn = pte >> PTE_PPN_SHIFT;
1342
1343     if (PTE_TABLE(pte)) { // next level of page table
1344       base = ppn << PGSHIFT;
1345     } else {
1346       // We've collected all the data required for the translation.
1347       reg_t vpn = vaddr >> PGSHIFT;
1348       reg_t paddr = (ppn | (vpn & ((reg_t(1) << ptshift) - 1))) << PGSHIFT;
1349       paddr += vaddr & (PGSIZE-1);
1350       D(fprintf(stderr, "gdbserver translate 0x%lx -> 0x%lx\n", vaddr, paddr));
1351       return paddr;
1352     }
1353   }
1354
1355   fprintf(stderr, "ERROR: gdbserver tried to translate 0x%016" PRIx64
1356           " but the relevant PTEs are invalid.\n", vaddr);
1357   // TODO: Is it better to throw an exception here?
1358   return -1;
1359 }
1360
1361 unsigned int gdbserver_t::privilege_mode()
1362 {
1363   unsigned int mode = get_field(dcsr, DCSR_PRV);
1364   if (get_field(mstatus, MSTATUS_MPRV))
1365     mode = get_field(mstatus, MSTATUS_MPP);
1366   return mode;
1367 }
1368
1369 unsigned int gdbserver_t::virtual_memory()
1370 {
1371   unsigned int mode = privilege_mode();
1372   if (mode == PRV_M)
1373     return VM_MBARE;
1374   return get_field(mstatus, MSTATUS_VM);
1375 }
1376
1377 void gdbserver_t::dr_write32(unsigned int index, uint32_t value)
1378 {
1379   sim->debug_module.ram_write32(index, value);
1380 }
1381
1382 void gdbserver_t::dr_write64(unsigned int index, uint64_t value)
1383 {
1384   dr_write32(index, value);
1385   dr_write32(index+1, value >> 32);
1386 }
1387
1388 void gdbserver_t::dr_write(enum slot slot, uint64_t value)
1389 {
1390   switch (xlen) {
1391     case 32:
1392       dr_write32(slot_offset32[slot], value);
1393       break;
1394     case 64:
1395       dr_write64(slot_offset64[slot], value);
1396       break;
1397     case 128:
1398     default:
1399       abort();
1400   }
1401 }
1402
1403 void gdbserver_t::dr_write_jump(unsigned int index)
1404 {
1405   dr_write32(index, jal(0,
1406         (uint32_t) (DEBUG_ROM_RESUME - (DEBUG_RAM_START + 4*index))));
1407 }
1408
1409 void gdbserver_t::dr_write_store(unsigned int index, unsigned int reg, enum slot slot)
1410 {
1411   assert(slot != SLOT_INST0 || index > 2);
1412   assert(slot != SLOT_DATA0 || index < 4 || index > 6);
1413   assert(slot != SLOT_DATA1 || index < 5 || index > 10);
1414   assert(slot != SLOT_DATA_LAST || index < 6 || index > 14);
1415   switch (xlen) {
1416     case 32:
1417       return dr_write32(index,
1418           sw(reg, 0, (uint16_t) DEBUG_RAM_START + 4 * slot_offset32[slot]));
1419     case 64:
1420       return dr_write32(index,
1421           sd(reg, 0, (uint16_t) DEBUG_RAM_START + 4 * slot_offset64[slot]));
1422     case 128:
1423       return dr_write32(index,
1424           sq(reg, 0, (uint16_t) DEBUG_RAM_START + 4 * slot_offset128[slot]));
1425     default:
1426       fprintf(stderr, "xlen is %d!\n", xlen);
1427       abort();
1428   }
1429 }
1430
1431 void gdbserver_t::dr_write_load(unsigned int index, unsigned int reg, enum slot slot)
1432 {
1433   switch (xlen) {
1434     case 32:
1435       return dr_write32(index,
1436           lw(reg, 0, (uint16_t) DEBUG_RAM_START + 4 * slot_offset32[slot]));
1437     case 64:
1438       return dr_write32(index,
1439           ld(reg, 0, (uint16_t) DEBUG_RAM_START + 4 * slot_offset64[slot]));
1440     case 128:
1441       return dr_write32(index,
1442           lq(reg, 0, (uint16_t) DEBUG_RAM_START + 4 * slot_offset128[slot]));
1443     default:
1444       fprintf(stderr, "xlen is %d!\n", xlen);
1445       abort();
1446   }
1447 }
1448
1449 uint32_t gdbserver_t::dr_read32(unsigned int index)
1450 {
1451   uint32_t value = sim->debug_module.ram_read32(index);
1452   D(fprintf(stderr, "read32(%d) -> 0x%x\n", index, value));
1453   return value;
1454 }
1455
1456 uint64_t gdbserver_t::dr_read64(unsigned int index)
1457 {
1458   return ((uint64_t) dr_read32(index+1) << 32) | dr_read32(index);
1459 }
1460
1461 uint64_t gdbserver_t::dr_read(enum slot slot)
1462 {
1463   switch (xlen) {
1464     case 32:
1465       return dr_read32(slot_offset32[slot]);
1466     case 64:
1467       return dr_read64(slot_offset64[slot]);
1468     case 128:
1469       abort();
1470     default:
1471       abort();
1472   }
1473 }
1474
1475 void gdbserver_t::add_operation(operation_t* operation)
1476 {
1477   operation_queue.push(operation);
1478 }
1479
1480 void gdbserver_t::accept()
1481 {
1482   client_fd = ::accept(socket_fd, NULL, NULL);
1483   if (client_fd == -1) {
1484     if (errno == EAGAIN) {
1485       // No client waiting to connect right now.
1486     } else {
1487       fprintf(stderr, "failed to accept on socket: %s (%d)\n", strerror(errno),
1488           errno);
1489       abort();
1490     }
1491   } else {
1492     fcntl(client_fd, F_SETFL, O_NONBLOCK);
1493
1494     expect_ack = false;
1495     extended_mode = false;
1496
1497     // gdb wants the core to be halted when it attaches.
1498     add_operation(new halt_op_t(*this));
1499   }
1500 }
1501
1502 void gdbserver_t::read()
1503 {
1504   // Reading from a non-blocking socket still blocks if there is no data
1505   // available.
1506
1507   size_t count = recv_buf.contiguous_empty_size();
1508   ssize_t bytes = ::read(client_fd, recv_buf.contiguous_empty(), count);
1509   if (bytes == -1) {
1510     if (errno == EAGAIN) {
1511       // We'll try again the next call.
1512     } else {
1513       fprintf(stderr, "failed to read on socket: %s (%d)\n", strerror(errno), errno);
1514       abort();
1515     }
1516   } else if (bytes == 0) {
1517     // The remote disconnected.
1518     client_fd = 0;
1519     processor_t *p = sim->get_core(0);
1520     // TODO p->set_halted(false, HR_NONE);
1521     recv_buf.reset();
1522     send_buf.reset();
1523   } else {
1524     recv_buf.data_added(bytes);
1525   }
1526 }
1527
1528 void gdbserver_t::write()
1529 {
1530   if (send_buf.empty())
1531     return;
1532
1533   while (!send_buf.empty()) {
1534     unsigned int count = send_buf.contiguous_data_size();
1535     assert(count > 0);
1536     ssize_t bytes = ::write(client_fd, send_buf.contiguous_data(), count);
1537     if (bytes == -1) {
1538       fprintf(stderr, "failed to write to socket: %s (%d)\n", strerror(errno), errno);
1539       abort();
1540     } else if (bytes == 0) {
1541       // Client can't take any more data right now.
1542       break;
1543     } else {
1544       D(fprintf(stderr, "wrote %ld bytes: ", bytes));
1545       for (unsigned int i = 0; i < bytes; i++) {
1546         D(fprintf(stderr, "%c", send_buf[i]));
1547       }
1548       D(fprintf(stderr, "\n"));
1549       send_buf.consume(bytes);
1550     }
1551   }
1552 }
1553
1554 void print_packet(const std::vector<uint8_t> &packet)
1555 {
1556   for (uint8_t c : packet) {
1557     if (c >= ' ' and c <= '~')
1558       fprintf(stderr, "%c", c);
1559     else
1560       fprintf(stderr, "\\x%02x", c);
1561   }
1562   fprintf(stderr, "\n");
1563 }
1564
1565 uint8_t compute_checksum(const std::vector<uint8_t> &packet)
1566 {
1567   uint8_t checksum = 0;
1568   for (auto i = packet.begin() + 1; i != packet.end() - 3; i++ ) {
1569     checksum += *i;
1570   }
1571   return checksum;
1572 }
1573
1574 uint8_t character_hex_value(uint8_t character)
1575 {
1576   if (character >= '0' && character <= '9')
1577     return character - '0';
1578   if (character >= 'a' && character <= 'f')
1579     return 10 + character - 'a';
1580   if (character >= 'A' && character <= 'F')
1581     return 10 + character - 'A';
1582   return 0xff;
1583 }
1584
1585 uint8_t extract_checksum(const std::vector<uint8_t> &packet)
1586 {
1587   return character_hex_value(*(packet.end() - 1)) +
1588     16 * character_hex_value(*(packet.end() - 2));
1589 }
1590
1591 void gdbserver_t::process_requests()
1592 {
1593   // See https://sourceware.org/gdb/onlinedocs/gdb/Remote-Protocol.html
1594
1595   while (!recv_buf.empty()) {
1596     std::vector<uint8_t> packet;
1597     for (unsigned int i = 0; i < recv_buf.size(); i++) {
1598       uint8_t b = recv_buf[i];
1599
1600       if (packet.empty() && expect_ack && b == '+') {
1601         recv_buf.consume(1);
1602         break;
1603       }
1604
1605       if (packet.empty() && b == 3) {
1606         D(fprintf(stderr, "Received interrupt\n"));
1607         recv_buf.consume(1);
1608         handle_interrupt();
1609         break;
1610       }
1611
1612       if (b == '$') {
1613         // Start of new packet.
1614         if (!packet.empty()) {
1615           fprintf(stderr, "Received malformed %ld-byte packet from debug client: ",
1616               packet.size());
1617           print_packet(packet);
1618           recv_buf.consume(i);
1619           break;
1620         }
1621       }
1622
1623       packet.push_back(b);
1624
1625       // Packets consist of $<packet-data>#<checksum>
1626       // where <checksum> is
1627       if (packet.size() >= 4 &&
1628           packet[packet.size()-3] == '#') {
1629         handle_packet(packet);
1630         recv_buf.consume(i+1);
1631         break;
1632       }
1633     }
1634     // There's a partial packet in the buffer. Wait until we get more data to
1635     // process it.
1636     if (packet.size()) {
1637       break;
1638     }
1639   }
1640
1641   if (recv_buf.full()) {
1642     fprintf(stderr,
1643         "Receive buffer is full, but no complete packet was found!\n");
1644     for (unsigned line = 0; line < 8; line++) {
1645       for (unsigned i = 0; i < 16; i++) {
1646         fprintf(stderr, "%02x ", recv_buf.entry(line * 16 + i));
1647       }
1648       for (unsigned i = 0; i < 16; i++) {
1649         uint8_t e = recv_buf.entry(line * 16 + i);
1650         if (e >= ' ' && e <= '~')
1651           fprintf(stderr, "%c", e);
1652         else
1653           fprintf(stderr, ".");
1654       }
1655       fprintf(stderr, "\n");
1656     }
1657     assert(!recv_buf.full());
1658   }
1659 }
1660
1661 void gdbserver_t::handle_halt_reason(const std::vector<uint8_t> &packet)
1662 {
1663   send_packet("S00");
1664 }
1665
1666 void gdbserver_t::handle_general_registers_read(const std::vector<uint8_t> &packet)
1667 {
1668   add_operation(new general_registers_read_op_t(*this));
1669 }
1670
1671 void gdbserver_t::set_interrupt(uint32_t hartid) {
1672   sim->debug_module.set_interrupt(hartid);
1673 }
1674
1675 // First byte is the most-significant one.
1676 // Eg. "08675309" becomes 0x08675309.
1677 uint64_t consume_hex_number(std::vector<uint8_t>::const_iterator &iter,
1678     std::vector<uint8_t>::const_iterator end)
1679 {
1680   uint64_t value = 0;
1681
1682   while (iter != end) {
1683     uint8_t c = *iter;
1684     uint64_t c_value = character_hex_value(c);
1685     if (c_value > 15)
1686       break;
1687     iter++;
1688     value <<= 4;
1689     value += c_value;
1690   }
1691   return value;
1692 }
1693
1694 // First byte is the least-significant one.
1695 // Eg. "08675309" becomes 0x09536708
1696 uint64_t gdbserver_t::consume_hex_number_le(
1697     std::vector<uint8_t>::const_iterator &iter,
1698     std::vector<uint8_t>::const_iterator end)
1699 {
1700   uint64_t value = 0;
1701   unsigned int shift = 4;
1702
1703   while (iter != end) {
1704     uint8_t c = *iter;
1705     uint64_t c_value = character_hex_value(c);
1706     if (c_value > 15)
1707       break;
1708     iter++;
1709     value |= c_value << shift;
1710     if ((shift % 8) == 0)
1711       shift += 12;
1712     else
1713       shift -= 4;
1714   }
1715   if (shift >= xlen) {
1716     fprintf(stderr,
1717         "gdb sent too many data bytes. That means it thinks XLEN is greater than %d.\n"
1718         "To fix that, tell gdb: set arch riscv:rv%d\n",
1719         xlen, xlen);
1720   }
1721   return value;
1722 }
1723
1724 void consume_string(std::string &str, std::vector<uint8_t>::const_iterator &iter,
1725     std::vector<uint8_t>::const_iterator end, uint8_t separator)
1726 {
1727   while (iter != end && *iter != separator) {
1728     str.append(1, (char) *iter);
1729     iter++;
1730   }
1731 }
1732
1733 void gdbserver_t::handle_register_read(const std::vector<uint8_t> &packet)
1734 {
1735   // p n
1736
1737   std::vector<uint8_t>::const_iterator iter = packet.begin() + 2;
1738   unsigned int n = consume_hex_number(iter, packet.end());
1739   if (*iter != '#')
1740     return send_packet("E01");
1741
1742   add_operation(new register_read_op_t(*this, n));
1743 }
1744
1745 void gdbserver_t::handle_register_write(const std::vector<uint8_t> &packet)
1746 {
1747   // P n...=r...
1748
1749   std::vector<uint8_t>::const_iterator iter = packet.begin() + 2;
1750   unsigned int n = consume_hex_number(iter, packet.end());
1751   if (*iter != '=')
1752     return send_packet("E05");
1753   iter++;
1754
1755   reg_t value = consume_hex_number_le(iter, packet.end());
1756   if (*iter != '#')
1757     return send_packet("E06");
1758
1759   processor_t *p = sim->get_core(0);
1760
1761   add_operation(new register_write_op_t(*this, n, value));
1762
1763   return send_packet("OK");
1764 }
1765
1766 void gdbserver_t::handle_memory_read(const std::vector<uint8_t> &packet)
1767 {
1768   // m addr,length
1769   std::vector<uint8_t>::const_iterator iter = packet.begin() + 2;
1770   reg_t address = consume_hex_number(iter, packet.end());
1771   if (*iter != ',')
1772     return send_packet("E10");
1773   iter++;
1774   reg_t length = consume_hex_number(iter, packet.end());
1775   if (*iter != '#')
1776     return send_packet("E11");
1777
1778   add_operation(new collect_translation_info_op_t(*this, address, length));
1779   add_operation(new memory_read_op_t(*this, address, length));
1780 }
1781
1782 void gdbserver_t::handle_memory_binary_write(const std::vector<uint8_t> &packet)
1783 {
1784   // X addr,length:XX...
1785   std::vector<uint8_t>::const_iterator iter = packet.begin() + 2;
1786   reg_t address = consume_hex_number(iter, packet.end());
1787   if (*iter != ',')
1788     return send_packet("E20");
1789   iter++;
1790   reg_t length = consume_hex_number(iter, packet.end());
1791   if (*iter != ':')
1792     return send_packet("E21");
1793   iter++;
1794
1795   if (length == 0) {
1796     return send_packet("OK");
1797   }
1798
1799   unsigned char *data = new unsigned char[length];
1800   for (unsigned int i = 0; i < length; i++) {
1801     if (iter == packet.end()) {
1802       return send_packet("E22");
1803     }
1804     uint8_t c = *iter;
1805     iter++;
1806     if (c == '}') {
1807       // The binary data representation uses 7d (ascii ‘}’) as an escape
1808       // character. Any escaped byte is transmitted as the escape character
1809       // followed by the original character XORed with 0x20. For example, the
1810       // byte 0x7d would be transmitted as the two bytes 0x7d 0x5d. The bytes
1811       // 0x23 (ascii ‘#’), 0x24 (ascii ‘$’), and 0x7d (ascii ‘}’) must always
1812       // be escaped.
1813       if (iter == packet.end()) {
1814         return send_packet("E23");
1815       }
1816       c = (*iter) ^ 0x20;
1817       iter++;
1818     }
1819     data[i] = c;
1820   }
1821   if (*iter != '#')
1822     return send_packet("E4b"); // EOVERFLOW
1823
1824   add_operation(new collect_translation_info_op_t(*this, address, length));
1825   add_operation(new memory_write_op_t(*this, address, length, data));
1826 }
1827
1828 void gdbserver_t::handle_continue(const std::vector<uint8_t> &packet)
1829 {
1830   // c [addr]
1831   processor_t *p = sim->get_core(0);
1832   if (packet[2] != '#') {
1833     std::vector<uint8_t>::const_iterator iter = packet.begin() + 2;
1834     dpc = consume_hex_number(iter, packet.end());
1835     if (*iter != '#')
1836       return send_packet("E30");
1837   }
1838
1839   add_operation(new maybe_restore_tselect_op_t(*this));
1840   add_operation(new continue_op_t(*this, false));
1841 }
1842
1843 void gdbserver_t::handle_step(const std::vector<uint8_t> &packet)
1844 {
1845   // s [addr]
1846   if (packet[2] != '#') {
1847     std::vector<uint8_t>::const_iterator iter = packet.begin() + 2;
1848     die("handle_step");
1849     //p->state.pc = consume_hex_number(iter, packet.end());
1850     if (*iter != '#')
1851       return send_packet("E40");
1852   }
1853
1854   add_operation(new maybe_restore_tselect_op_t(*this));
1855   add_operation(new continue_op_t(*this, true));
1856 }
1857
1858 void gdbserver_t::handle_kill(const std::vector<uint8_t> &packet)
1859 {
1860   // k
1861   // The exact effect of this packet is not specified.
1862   // Looks like OpenOCD disconnects?
1863   // TODO
1864 }
1865
1866 void gdbserver_t::handle_extended(const std::vector<uint8_t> &packet)
1867 {
1868   // Enable extended mode. In extended mode, the remote server is made
1869   // persistent. The ‘R’ packet is used to restart the program being debugged.
1870   send_packet("OK");
1871   extended_mode = true;
1872 }
1873
1874 void gdbserver_t::software_breakpoint_insert(reg_t vaddr, unsigned int size)
1875 {
1876   fence_i_required = true;
1877   add_operation(new collect_translation_info_op_t(*this, vaddr, size));
1878   unsigned char* inst = new unsigned char[4];
1879   if (size == 2) {
1880     inst[0] = C_EBREAK & 0xff;
1881     inst[1] = (C_EBREAK >> 8) & 0xff;
1882   } else {
1883     inst[0] = EBREAK & 0xff;
1884     inst[1] = (EBREAK >> 8) & 0xff;
1885     inst[2] = (EBREAK >> 16) & 0xff;
1886     inst[3] = (EBREAK >> 24) & 0xff;
1887   }
1888
1889   software_breakpoint_t bp = {
1890     .vaddr = vaddr,
1891     .size = size
1892   };
1893   software_breakpoints[vaddr] = bp;
1894   add_operation(new memory_read_op_t(*this, bp.vaddr, bp.size,
1895         software_breakpoints[bp.vaddr].instruction));
1896   add_operation(new memory_write_op_t(*this, bp.vaddr, bp.size, inst));
1897 }
1898
1899 void gdbserver_t::software_breakpoint_remove(reg_t vaddr, unsigned int size)
1900 {
1901   fence_i_required = true;
1902   add_operation(new collect_translation_info_op_t(*this, vaddr, size));
1903
1904   software_breakpoint_t found_bp = software_breakpoints[vaddr];
1905   unsigned char* instruction = new unsigned char[4];
1906   memcpy(instruction, found_bp.instruction, 4);
1907   add_operation(new memory_write_op_t(*this, found_bp.vaddr,
1908         found_bp.size, instruction));
1909   software_breakpoints.erase(vaddr);
1910 }
1911
1912 void gdbserver_t::hardware_breakpoint_insert(const hardware_breakpoint_t &bp)
1913 {
1914   add_operation(new maybe_save_tselect_op_t(*this));
1915   add_operation(new hardware_breakpoint_insert_op_t(*this, bp));
1916 }
1917
1918 void gdbserver_t::hardware_breakpoint_remove(const hardware_breakpoint_t &bp)
1919 {
1920   add_operation(new maybe_save_tselect_op_t(*this));
1921   hardware_breakpoint_t found = *hardware_breakpoints.find(bp);
1922   add_operation(new hardware_breakpoint_remove_op_t(*this, found));
1923 }
1924
1925 void gdbserver_t::handle_breakpoint(const std::vector<uint8_t> &packet)
1926 {
1927   // insert: Z type,addr,length
1928   // remove: z type,addr,length
1929
1930   // type: 0 - software breakpoint, 1 - hardware breakpoint, 2 - write
1931   // watchpoint, 3 - read watchpoint, 4 - access watchpoint; addr is address;
1932   // length is in bytes. For a software breakpoint, length specifies the size
1933   // of the instruction to be patched. For hardware breakpoints and watchpoints
1934   // length specifies the memory region to be monitored. To avoid potential
1935   // problems with duplicate packets, the operations should be implemented in
1936   // an idempotent way.
1937
1938   bool insert = (packet[1] == 'Z');
1939   std::vector<uint8_t>::const_iterator iter = packet.begin() + 2;
1940   gdb_breakpoint_type_t type = static_cast<gdb_breakpoint_type_t>(
1941       consume_hex_number(iter, packet.end()));
1942   if (*iter != ',')
1943     return send_packet("E50");
1944   iter++;
1945   reg_t address = consume_hex_number(iter, packet.end());
1946   if (*iter != ',')
1947     return send_packet("E51");
1948   iter++;
1949   unsigned int size = consume_hex_number(iter, packet.end());
1950   // There may be more options after a ; here, but we don't support that.
1951   if (*iter != '#')
1952     return send_packet("E52");
1953
1954   switch (type) {
1955     case GB_SOFTWARE:
1956       if (size != 2 && size != 4) {
1957         return send_packet("E53");
1958       }
1959       if (insert) {
1960         software_breakpoint_insert(address, size);
1961       } else {
1962         software_breakpoint_remove(address, size);
1963       }
1964       break;
1965
1966     case GB_HARDWARE:
1967     case GB_WRITE:
1968     case GB_READ:
1969     case GB_ACCESS:
1970       {
1971         hardware_breakpoint_t bp = {
1972           .vaddr = address,
1973           .size = size
1974         };
1975         bp.load = (type == GB_READ || type == GB_ACCESS);
1976         bp.store = (type == GB_WRITE || type == GB_ACCESS);
1977         bp.execute = (type == GB_HARDWARE || type == GB_ACCESS);
1978         if (insert) {
1979           hardware_breakpoint_insert(bp);
1980           // Insert might fail if there's no space, so the insert operation will
1981           // send its own OK (or not).
1982           return;
1983         } else {
1984           hardware_breakpoint_remove(bp);
1985         }
1986       }
1987       break;
1988
1989     default:
1990       return send_packet("E56");
1991   }
1992
1993   return send_packet("OK");
1994 }
1995
1996 void gdbserver_t::handle_query(const std::vector<uint8_t> &packet)
1997 {
1998   std::string name;
1999   std::vector<uint8_t>::const_iterator iter = packet.begin() + 2;
2000
2001   consume_string(name, iter, packet.end(), ':');
2002   if (iter != packet.end())
2003     iter++;
2004   if (name == "Supported") {
2005     start_packet();
2006     while (iter != packet.end()) {
2007       std::string feature;
2008       consume_string(feature, iter, packet.end(), ';');
2009       if (iter != packet.end())
2010         iter++;
2011       if (feature == "swbreak+") {
2012         send("swbreak+;");
2013       }
2014     }
2015     send("PacketSize=131072;");
2016     return end_packet();
2017   }
2018
2019   D(fprintf(stderr, "Unsupported query %s\n", name.c_str()));
2020   return send_packet("");
2021 }
2022
2023 void gdbserver_t::handle_packet(const std::vector<uint8_t> &packet)
2024 {
2025   if (compute_checksum(packet) != extract_checksum(packet)) {
2026     fprintf(stderr, "Received %ld-byte packet with invalid checksum\n", packet.size());
2027     fprintf(stderr, "Computed checksum: %x\n", compute_checksum(packet));
2028     print_packet(packet);
2029     send("-");
2030     return;
2031   }
2032
2033   D(fprintf(stderr, "Received %ld-byte packet from debug client: ", packet.size()));
2034   D(print_packet(packet));
2035   send("+");
2036
2037   switch (packet[1]) {
2038     case '!':
2039       return handle_extended(packet);
2040     case '?':
2041       return handle_halt_reason(packet);
2042     case 'g':
2043       return handle_general_registers_read(packet);
2044 //    case 'k':
2045 //      return handle_kill(packet);
2046     case 'm':
2047       return handle_memory_read(packet);
2048 //    case 'M':
2049 //      return handle_memory_write(packet);
2050     case 'X':
2051       return handle_memory_binary_write(packet);
2052     case 'p':
2053       return handle_register_read(packet);
2054     case 'P':
2055       return handle_register_write(packet);
2056     case 'c':
2057       return handle_continue(packet);
2058     case 's':
2059       return handle_step(packet);
2060     case 'z':
2061     case 'Z':
2062       return handle_breakpoint(packet);
2063     case 'q':
2064     case 'Q':
2065       return handle_query(packet);
2066   }
2067
2068   // Not supported.
2069   D(fprintf(stderr, "** Unsupported packet: "));
2070   D(print_packet(packet));
2071   send_packet("");
2072 }
2073
2074 void gdbserver_t::handle_interrupt()
2075 {
2076   processor_t *p = sim->get_core(0);
2077   add_operation(new halt_op_t(*this, true));
2078 }
2079
2080 void gdbserver_t::handle()
2081 {
2082   if (client_fd > 0) {
2083     processor_t *p = sim->get_core(0);
2084
2085     bool interrupt = sim->debug_module.get_interrupt(0);
2086
2087     if (!interrupt && !operation_queue.empty()) {
2088       operation_t *operation = operation_queue.front();
2089       if (operation->step()) {
2090         operation_queue.pop();
2091         delete operation;
2092       }
2093     }
2094
2095     bool halt_notification = sim->debug_module.get_halt_notification(0);
2096     if (halt_notification) {
2097       sim->debug_module.clear_halt_notification(0);
2098       add_operation(new halt_op_t(*this, true));
2099     }
2100
2101     this->read();
2102     this->write();
2103
2104   } else {
2105     this->accept();
2106   }
2107
2108   if (operation_queue.empty()) {
2109     this->process_requests();
2110   }
2111 }
2112
2113 void gdbserver_t::send(const char* msg)
2114 {
2115   unsigned int length = strlen(msg);
2116   for (const char *c = msg; *c; c++)
2117     running_checksum += *c;
2118   send_buf.append((const uint8_t *) msg, length);
2119 }
2120
2121 void gdbserver_t::send(uint64_t value)
2122 {
2123   char buffer[3];
2124   for (unsigned int i = 0; i < 8; i++) {
2125     sprintf(buffer, "%02x", (int) (value & 0xff));
2126     send(buffer);
2127     value >>= 8;
2128   }
2129 }
2130
2131 void gdbserver_t::send(uint32_t value)
2132 {
2133   char buffer[3];
2134   for (unsigned int i = 0; i < 4; i++) {
2135     sprintf(buffer, "%02x", (int) (value & 0xff));
2136     send(buffer);
2137     value >>= 8;
2138   }
2139 }
2140
2141 void gdbserver_t::send(uint8_t value)
2142 {
2143   char buffer[3];
2144   sprintf(buffer, "%02x", (int) value);
2145   send(buffer);
2146 }
2147
2148 void gdbserver_t::send_packet(const char* data)
2149 {
2150   start_packet();
2151   send(data);
2152   end_packet();
2153   expect_ack = true;
2154 }
2155
2156 void gdbserver_t::start_packet()
2157 {
2158   send("$");
2159   running_checksum = 0;
2160 }
2161
2162 void gdbserver_t::end_packet(const char* data)
2163 {
2164   if (data) {
2165     send(data);
2166   }
2167
2168   char checksum_string[4];
2169   sprintf(checksum_string, "#%02x", running_checksum);
2170   send(checksum_string);
2171   expect_ack = true;
2172 }