6 #include <sys/socket.h>
17 #include "gdbserver.h"
20 #define C_EBREAK 0x9002
21 #define EBREAK 0x00100073
23 //////////////////////////////////////// Utility Functions
32 const int debug_gdbserver
= 0;
34 void die(const char* msg
)
36 fprintf(stderr
, "gdbserver code died: %s\n", msg
);
40 // gdb's register list is defined in riscv_gdb_reg_names gdb/riscv-tdep.c in
41 // its source tree. We must interpret the numbers the same here.
53 // Return access size to use when writing length bytes to address, so that
54 // every write will be aligned.
55 unsigned int find_access_size(reg_t address
, int length
)
57 reg_t composite
= address
| length
;
58 if ((composite
& 0x7) == 0)
60 if ((composite
& 0x3) == 0)
65 //////////////////////////////////////// Functions to generate RISC-V opcodes.
67 // TODO: Does this already exist somewhere?
69 // Using regnames.cc as source. The RVG Calling Convention of the 2.0 RISC-V
70 // spec says it should be 2 and 3.
73 static uint32_t bits(uint32_t value
, unsigned int hi
, unsigned int lo
) {
74 return (value
>> lo
) & ((1 << (hi
+1-lo
)) - 1);
77 static uint32_t bit(uint32_t value
, unsigned int b
) {
78 return (value
>> b
) & 1;
81 static uint32_t jal(unsigned int rd
, uint32_t imm
) {
82 return (bit(imm
, 20) << 31) |
83 (bits(imm
, 10, 1) << 21) |
84 (bit(imm
, 11) << 20) |
85 (bits(imm
, 19, 12) << 12) |
90 static uint32_t csrsi(unsigned int csr
, uint16_t imm
) {
92 (bits(imm
, 4, 0) << 15) |
96 static uint32_t csrci(unsigned int csr
, uint16_t imm
) {
98 (bits(imm
, 4, 0) << 15) |
102 static uint32_t csrr(unsigned int rd
, unsigned int csr
) {
103 return (csr
<< 20) | (rd
<< 7) | MATCH_CSRRS
;
106 static uint32_t csrw(unsigned int source
, unsigned int csr
) {
107 return (csr
<< 20) | (source
<< 15) | MATCH_CSRRW
;
110 static uint32_t fence_i()
112 return MATCH_FENCE_I
;
115 static uint32_t sb(unsigned int src
, unsigned int base
, uint16_t offset
)
117 return (bits(offset
, 11, 5) << 25) |
120 (bits(offset
, 4, 0) << 7) |
124 static uint32_t sh(unsigned int src
, unsigned int base
, uint16_t offset
)
126 return (bits(offset
, 11, 5) << 25) |
129 (bits(offset
, 4, 0) << 7) |
133 static uint32_t sw(unsigned int src
, unsigned int base
, uint16_t offset
)
135 return (bits(offset
, 11, 5) << 25) |
138 (bits(offset
, 4, 0) << 7) |
142 static uint32_t sd(unsigned int src
, unsigned int base
, uint16_t offset
)
144 return (bits(offset
, 11, 5) << 25) |
145 (bits(src
, 4, 0) << 20) |
147 (bits(offset
, 4, 0) << 7) |
151 static uint32_t ld(unsigned int rd
, unsigned int base
, uint16_t offset
)
153 return (bits(offset
, 11, 0) << 20) |
155 (bits(rd
, 4, 0) << 7) |
159 static uint32_t lw(unsigned int rd
, unsigned int base
, uint16_t offset
)
161 return (bits(offset
, 11, 0) << 20) |
163 (bits(rd
, 4, 0) << 7) |
167 static uint32_t lh(unsigned int rd
, unsigned int base
, uint16_t offset
)
169 return (bits(offset
, 11, 0) << 20) |
171 (bits(rd
, 4, 0) << 7) |
175 static uint32_t lb(unsigned int rd
, unsigned int base
, uint16_t offset
)
177 return (bits(offset
, 11, 0) << 20) |
179 (bits(rd
, 4, 0) << 7) |
183 static uint32_t fsd(unsigned int src
, unsigned int base
, uint16_t offset
)
185 return (bits(offset
, 11, 5) << 25) |
186 (bits(src
, 4, 0) << 20) |
188 (bits(offset
, 4, 0) << 7) |
192 static uint32_t fld(unsigned int src
, unsigned int base
, uint16_t offset
)
194 return (bits(offset
, 11, 5) << 25) |
195 (bits(src
, 4, 0) << 20) |
197 (bits(offset
, 4, 0) << 7) |
201 static uint32_t addi(unsigned int dest
, unsigned int src
, uint16_t imm
)
203 return (bits(imm
, 11, 0) << 20) |
209 static uint32_t ori(unsigned int dest
, unsigned int src
, uint16_t imm
)
211 return (bits(imm
, 11, 0) << 20) |
217 static uint32_t nop()
219 return addi(0, 0, 0);
222 template <typename T
>
223 unsigned int circular_buffer_t
<T
>::size() const
228 return end
+ capacity
- start
;
231 template <typename T
>
232 void circular_buffer_t
<T
>::consume(unsigned int bytes
)
234 start
= (start
+ bytes
) % capacity
;
237 template <typename T
>
238 unsigned int circular_buffer_t
<T
>::contiguous_empty_size() const
242 return capacity
- end
- 1;
244 return capacity
- end
;
246 return start
- end
- 1;
249 template <typename T
>
250 unsigned int circular_buffer_t
<T
>::contiguous_data_size() const
255 return capacity
- start
;
258 template <typename T
>
259 void circular_buffer_t
<T
>::data_added(unsigned int bytes
)
262 assert(end
<= capacity
);
267 template <typename T
>
268 void circular_buffer_t
<T
>::reset()
274 template <typename T
>
275 void circular_buffer_t
<T
>::append(const T
*src
, unsigned int count
)
277 unsigned int copy
= std::min(count
, contiguous_empty_size());
278 memcpy(contiguous_empty(), src
, copy
* sizeof(T
));
282 assert(count
< contiguous_empty_size());
283 memcpy(contiguous_empty(), src
, count
* sizeof(T
));
288 ////////////////////////////// Debug Operations
290 class halt_op_t
: public operation_t
293 halt_op_t(gdbserver_t
& gdbserver
, bool send_status
=false) :
294 operation_t(gdbserver
), send_status(send_status
) {};
296 bool perform_step(unsigned int step
) {
299 // TODO: For now we just assume the target is 64-bit.
300 gs
.write_debug_ram(0, csrsi(CSR_DCSR
, DCSR_HALT
));
301 gs
.write_debug_ram(1, csrr(S0
, CSR_DPC
));
302 gs
.write_debug_ram(2, sd(S0
, 0, (uint16_t) DEBUG_RAM_START
));
303 gs
.write_debug_ram(3, csrr(S0
, CSR_MSTATUS
));
304 gs
.write_debug_ram(4, sd(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 8));
305 gs
.write_debug_ram(5, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*5))));
307 // We could read more registers here, but only on 64-bit targets. I'm
308 // trying to keep The patterns here usable for 32-bit ISAs as well.
312 gs
.dpc
= ((uint64_t) gs
.read_debug_ram(1) << 32) | gs
.read_debug_ram(0);
313 gs
.mstatus
= ((uint64_t) gs
.read_debug_ram(3) << 32) | gs
.read_debug_ram(2);
314 gs
.write_debug_ram(0, csrr(S0
, CSR_DCSR
));
315 gs
.write_debug_ram(1, sd(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
316 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
321 gs
.dcsr
= ((uint64_t) gs
.read_debug_ram(5) << 32) | gs
.read_debug_ram(4);
323 gs
.sptbr_valid
= false;
324 gs
.pte_cache
.clear();
327 switch (get_field(gs
.dcsr
, DCSR_CAUSE
)) {
328 case DCSR_CAUSE_NONE
:
329 fprintf(stderr
, "Internal error. Processor halted without reason.\n");
332 case DCSR_CAUSE_DEBUGINT
:
333 gs
.send_packet("S02"); // Pretend program received SIGINT.
336 case DCSR_CAUSE_HWBP
:
337 case DCSR_CAUSE_STEP
:
338 case DCSR_CAUSE_HALT
:
339 // There's no gdb code for this.
340 gs
.send_packet("T05");
342 case DCSR_CAUSE_SWBP
:
343 gs
.send_packet("T05swbreak:;");
357 class continue_op_t
: public operation_t
360 continue_op_t(gdbserver_t
& gdbserver
, bool single_step
) :
361 operation_t(gdbserver
), single_step(single_step
) {};
363 bool perform_step(unsigned int step
) {
366 gs
.write_debug_ram(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+16));
367 gs
.write_debug_ram(1, csrw(S0
, CSR_DPC
));
368 if (gs
.fence_i_required
) {
369 gs
.write_debug_ram(2, fence_i());
370 gs
.write_debug_ram(3, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*3))));
371 gs
.fence_i_required
= false;
373 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
375 gs
.write_debug_ram(4, gs
.dpc
);
376 gs
.write_debug_ram(5, gs
.dpc
>> 32);
381 gs
.write_debug_ram(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+16));
382 gs
.write_debug_ram(1, csrw(S0
, CSR_MSTATUS
));
383 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
384 gs
.write_debug_ram(4, gs
.mstatus
);
385 gs
.write_debug_ram(5, gs
.mstatus
>> 32);
390 gs
.write_debug_ram(0, lw(S0
, 0, (uint16_t) DEBUG_RAM_START
+16));
391 gs
.write_debug_ram(1, csrw(S0
, CSR_DCSR
));
392 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
394 reg_t dcsr
= set_field(gs
.dcsr
, DCSR_HALT
, 0);
395 dcsr
= set_field(dcsr
, DCSR_STEP
, single_step
);
396 // Software breakpoints should go here.
397 dcsr
= set_field(dcsr
, DCSR_EBREAKM
, 1);
398 dcsr
= set_field(dcsr
, DCSR_EBREAKH
, 1);
399 dcsr
= set_field(dcsr
, DCSR_EBREAKS
, 1);
400 dcsr
= set_field(dcsr
, DCSR_EBREAKU
, 1);
401 gs
.write_debug_ram(4, dcsr
);
413 class general_registers_read_op_t
: public operation_t
415 // Register order that gdb expects is:
416 // "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
417 // "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
418 // "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
419 // "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31",
421 // Each byte of register data is described by two hex digits. The bytes with
422 // the register are transmitted in target byte order. The size of each
423 // register and their position within the ‘g’ packet are determined by the
424 // gdb internal gdbarch functions DEPRECATED_REGISTER_RAW_SIZE and
425 // gdbarch_register_name.
428 general_registers_read_op_t(gdbserver_t
& gdbserver
) :
429 operation_t(gdbserver
) {};
431 bool perform_step(unsigned int step
)
436 // x0 is always zero.
439 gs
.write_debug_ram(0, sd(1, 0, (uint16_t) DEBUG_RAM_START
+ 16));
440 gs
.write_debug_ram(1, sd(2, 0, (uint16_t) DEBUG_RAM_START
+ 0));
441 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
446 gs
.send(((uint64_t) gs
.read_debug_ram(5) << 32) | gs
.read_debug_ram(4));
452 gs
.send(((uint64_t) gs
.read_debug_ram(1) << 32) | gs
.read_debug_ram(0));
454 unsigned int current_reg
= 2 * step
+ 1;
456 if (current_reg
== S1
) {
457 gs
.write_debug_ram(i
++, ld(S1
, 0, (uint16_t) DEBUG_RAM_END
- 8));
459 gs
.write_debug_ram(i
++, sd(current_reg
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
460 if (current_reg
+ 1 == S0
) {
461 gs
.write_debug_ram(i
++, csrr(S0
, CSR_DSCRATCH
));
463 gs
.write_debug_ram(i
++, sd(current_reg
+1, 0, (uint16_t) DEBUG_RAM_START
+ 0));
464 gs
.write_debug_ram(i
, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*i
))));
471 class register_read_op_t
: public operation_t
474 register_read_op_t(gdbserver_t
& gdbserver
, unsigned int reg
) :
475 operation_t(gdbserver
), reg(reg
) {};
477 bool perform_step(unsigned int step
)
481 if (reg
>= REG_XPR0
&& reg
<= REG_XPR31
) {
482 die("handle_register_read");
483 // send(p->state.XPR[reg - REG_XPR0]);
484 } else if (reg
== REG_PC
) {
489 } else if (reg
>= REG_FPR0
&& reg
<= REG_FPR31
) {
490 // send(p->state.FPR[reg - REG_FPR0]);
491 gs
.write_debug_ram(0, fsd(reg
- REG_FPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
492 gs
.write_debug_ram(1, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*1))));
493 } else if (reg
>= REG_CSR0
&& reg
<= REG_CSR4095
) {
494 gs
.write_debug_ram(0, csrr(S0
, reg
- REG_CSR0
));
495 gs
.write_debug_ram(1, sd(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
496 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
497 // If we hit an exception reading the CSR, we'll end up returning ~0 as
498 // the register's value, which is what we want. (Right?)
499 gs
.write_debug_ram(4, 0xffffffff);
500 gs
.write_debug_ram(5, 0xffffffff);
502 gs
.send_packet("E02");
510 gs
.send(((uint64_t) gs
.read_debug_ram(5) << 32) | gs
.read_debug_ram(4));
521 class register_write_op_t
: public operation_t
524 register_write_op_t(gdbserver_t
& gdbserver
, unsigned int reg
, reg_t value
) :
525 operation_t(gdbserver
), reg(reg
), value(value
) {};
527 bool perform_step(unsigned int step
)
529 gs
.write_debug_ram(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
530 gs
.write_debug_ram(4, value
);
531 gs
.write_debug_ram(5, value
>> 32);
533 gs
.write_debug_ram(1, csrw(S0
, CSR_DSCRATCH
));
534 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
535 } else if (reg
== S1
) {
536 gs
.write_debug_ram(1, sd(S0
, 0, (uint16_t) DEBUG_RAM_END
- 8));
537 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
538 } else if (reg
>= REG_XPR0
&& reg
<= REG_XPR31
) {
539 gs
.write_debug_ram(1, addi(reg
, S0
, 0));
540 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
541 } else if (reg
== REG_PC
) {
544 } else if (reg
>= REG_FPR0
&& reg
<= REG_FPR31
) {
545 // send(p->state.FPR[reg - REG_FPR0]);
546 gs
.write_debug_ram(0, fld(reg
- REG_FPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
547 gs
.write_debug_ram(1, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*1))));
548 } else if (reg
>= REG_CSR0
&& reg
<= REG_CSR4095
) {
549 gs
.write_debug_ram(1, csrw(S0
, reg
- REG_CSR0
));
550 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
551 if (reg
== REG_CSR0
+ CSR_SPTBR
) {
553 gs
.sptbr_valid
= true;
556 gs
.send_packet("E02");
560 gs
.send_packet("OK");
569 class memory_read_op_t
: public operation_t
572 // Read length bytes from vaddr, storing the result into data.
573 // If data is NULL, send the result straight to gdb.
574 memory_read_op_t(gdbserver_t
& gdbserver
, reg_t vaddr
, unsigned int length
,
575 unsigned char *data
=NULL
) :
576 operation_t(gdbserver
), vaddr(vaddr
), length(length
), data(data
) {};
578 bool perform_step(unsigned int step
)
581 // address goes in S0
582 paddr
= gs
.translate(vaddr
);
583 access_size
= find_access_size(paddr
, length
);
585 gs
.write_debug_ram(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
586 switch (access_size
) {
588 gs
.write_debug_ram(1, lb(S1
, S0
, 0));
591 gs
.write_debug_ram(1, lh(S1
, S0
, 0));
594 gs
.write_debug_ram(1, lw(S1
, S0
, 0));
597 gs
.write_debug_ram(1, ld(S1
, S0
, 0));
600 gs
.write_debug_ram(2, sd(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 24));
601 gs
.write_debug_ram(3, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*3))));
602 gs
.write_debug_ram(4, paddr
);
603 gs
.write_debug_ram(5, paddr
>> 32);
613 reg_t value
= ((uint64_t) gs
.read_debug_ram(7) << 32) | gs
.read_debug_ram(6);
614 for (unsigned int i
= 0; i
< access_size
; i
++) {
616 *(data
++) = value
& 0xff;
617 D(fprintf(stderr
, "%02x", (unsigned int) (value
& 0xff)));
619 sprintf(buffer
, "%02x", (unsigned int) (value
& 0xff));
624 if (data
&& debug_gdbserver
) {
625 D(fprintf(stderr
, "\n"));
627 length
-= access_size
;
628 paddr
+= access_size
;
636 gs
.write_debug_ram(4, paddr
);
637 gs
.write_debug_ram(5, paddr
>> 32);
648 unsigned int access_size
;
651 class memory_write_op_t
: public operation_t
654 memory_write_op_t(gdbserver_t
& gdbserver
, reg_t vaddr
, unsigned int length
,
655 const unsigned char *data
) :
656 operation_t(gdbserver
), vaddr(vaddr
), offset(0), length(length
), data(data
) {};
658 ~memory_write_op_t() {
662 bool perform_step(unsigned int step
)
664 reg_t paddr
= gs
.translate(vaddr
);
666 access_size
= find_access_size(paddr
, length
);
668 D(fprintf(stderr
, "write to 0x%lx -> 0x%lx (access=%d): ", vaddr
, paddr
,
670 for (unsigned int i
= 0; i
< length
; i
++) {
671 D(fprintf(stderr
, "%02x", data
[i
]));
673 D(fprintf(stderr
, "\n"));
675 // address goes in S0
676 gs
.write_debug_ram(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
677 switch (access_size
) {
679 gs
.write_debug_ram(1, lb(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 24));
680 gs
.write_debug_ram(2, sb(S1
, S0
, 0));
681 gs
.write_debug_ram(6, data
[0]);
684 gs
.write_debug_ram(1, lh(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 24));
685 gs
.write_debug_ram(2, sh(S1
, S0
, 0));
686 gs
.write_debug_ram(6, data
[0] | (data
[1] << 8));
689 gs
.write_debug_ram(1, lw(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 24));
690 gs
.write_debug_ram(2, sw(S1
, S0
, 0));
691 gs
.write_debug_ram(6, data
[0] | (data
[1] << 8) |
692 (data
[2] << 16) | (data
[3] << 24));
695 gs
.write_debug_ram(1, ld(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 24));
696 gs
.write_debug_ram(2, sd(S1
, S0
, 0));
697 gs
.write_debug_ram(6, data
[0] | (data
[1] << 8) |
698 (data
[2] << 16) | (data
[3] << 24));
699 gs
.write_debug_ram(7, data
[4] | (data
[5] << 8) |
700 (data
[6] << 16) | (data
[7] << 24));
703 fprintf(stderr
, "gdbserver error: write %d bytes to 0x%lx -> 0x%lx; "
704 "access_size=%d\n", length
, vaddr
, paddr
, access_size
);
705 gs
.send_packet("E12");
708 gs
.write_debug_ram(3, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*3))));
709 gs
.write_debug_ram(4, paddr
);
710 gs
.write_debug_ram(5, paddr
>> 32);
716 if (gs
.read_debug_ram(DEBUG_RAM_SIZE
/ 4 - 1)) {
717 fprintf(stderr
, "Exception happened while writing to 0x%lx -> 0x%lx\n",
721 offset
+= access_size
;
722 if (offset
>= length
) {
723 gs
.send_packet("OK");
726 const unsigned char *d
= data
+ offset
;
727 switch (access_size
) {
729 gs
.write_debug_ram(6, d
[0]);
732 gs
.write_debug_ram(6, d
[0] | (d
[1] << 8));
735 gs
.write_debug_ram(6, d
[0] | (d
[1] << 8) |
736 (d
[2] << 16) | (d
[3] << 24));
739 gs
.write_debug_ram(6, d
[0] | (d
[1] << 8) |
740 (d
[2] << 16) | (d
[3] << 24));
741 gs
.write_debug_ram(7, d
[4] | (d
[5] << 8) |
742 (d
[6] << 16) | (d
[7] << 24));
745 gs
.send_packet("E13");
748 gs
.write_debug_ram(4, paddr
+ offset
);
749 gs
.write_debug_ram(5, (paddr
+ offset
) >> 32);
759 unsigned int access_size
;
760 const unsigned char *data
;
763 class collect_translation_info_op_t
: public operation_t
766 // Read sufficient information from the target into gdbserver structures so
767 // that it's possible to translate vaddr, vaddr+length, and all addresses
768 // in between to physical addresses.
769 collect_translation_info_op_t(gdbserver_t
& gdbserver
, reg_t vaddr
, size_t length
) :
770 operation_t(gdbserver
), state(STATE_START
), vaddr(vaddr
), length(length
) {};
772 bool perform_step(unsigned int step
)
774 unsigned int vm
= gs
.virtual_memory();
779 // Nothing to be done.
801 sprintf(buf
, "VM mode %d is not supported by gdbserver.cc.", vm
);
803 return true; // die doesn't return, but gcc doesn't know that.
808 // Perform any reads from the just-completed action.
812 case STATE_READ_SPTBR
:
813 gs
.sptbr
= ((uint64_t) gs
.read_debug_ram(5) << 32) | gs
.read_debug_ram(4);
814 gs
.sptbr_valid
= true;
817 gs
.pte_cache
[pte_addr
] = ((uint64_t) gs
.read_debug_ram(5) << 32) |
818 gs
.read_debug_ram(4);
819 D(fprintf(stderr
, "pte_cache[0x%lx] = 0x%lx\n", pte_addr
, gs
.pte_cache
[pte_addr
]));
823 // Set up the next action.
824 // We only get here for VM_SV32/39/38.
826 if (!gs
.sptbr_valid
) {
827 state
= STATE_READ_SPTBR
;
828 gs
.write_debug_ram(0, csrr(S0
, CSR_SPTBR
));
829 gs
.write_debug_ram(1, sd(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
830 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
835 reg_t base
= gs
.sptbr
<< PGSHIFT
;
836 int ptshift
= (levels
- 1) * ptidxbits
;
837 for (unsigned int i
= 0; i
< levels
; i
++, ptshift
-= ptidxbits
) {
838 reg_t idx
= (vaddr
>> (PGSHIFT
+ ptshift
)) & ((1 << ptidxbits
) - 1);
840 pte_addr
= base
+ idx
* ptesize
;
841 auto it
= gs
.pte_cache
.find(pte_addr
);
842 if (it
== gs
.pte_cache
.end()) {
843 state
= STATE_READ_PTE
;
845 gs
.write_debug_ram(0, lw(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
846 gs
.write_debug_ram(1, lw(S1
, S0
, 0));
847 gs
.write_debug_ram(2, sd(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
849 gs
.write_debug_ram(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
850 gs
.write_debug_ram(1, ld(S1
, S0
, 0));
851 gs
.write_debug_ram(2, sd(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
853 gs
.write_debug_ram(3, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*3))));
854 gs
.write_debug_ram(4, pte_addr
);
855 gs
.write_debug_ram(5, pte_addr
>> 32);
860 reg_t pte
= gs
.pte_cache
[pte_addr
];
861 reg_t ppn
= pte
>> PTE_PPN_SHIFT
;
863 if (PTE_TABLE(pte
)) { // next level of page table
864 base
= ppn
<< PGSHIFT
;
866 // We've collected all the data required for the translation.
871 "ERROR: gdbserver couldn't find appropriate PTEs to translate 0x%lx\n",
885 unsigned int ptidxbits
;
886 unsigned int ptesize
;
890 ////////////////////////////// gdbserver itself
892 gdbserver_t::gdbserver_t(uint16_t port
, sim_t
*sim
) :
895 recv_buf(64 * 1024), send_buf(64 * 1024)
897 socket_fd
= socket(AF_INET
, SOCK_STREAM
, 0);
898 if (socket_fd
== -1) {
899 fprintf(stderr
, "failed to make socket: %s (%d)\n", strerror(errno
), errno
);
903 fcntl(socket_fd
, F_SETFL
, O_NONBLOCK
);
905 if (setsockopt(socket_fd
, SOL_SOCKET
, SO_REUSEADDR
, &reuseaddr
,
906 sizeof(int)) == -1) {
907 fprintf(stderr
, "failed setsockopt: %s (%d)\n", strerror(errno
), errno
);
911 struct sockaddr_in addr
;
912 memset(&addr
, 0, sizeof(addr
));
913 addr
.sin_family
= AF_INET
;
914 addr
.sin_addr
.s_addr
= INADDR_ANY
;
915 addr
.sin_port
= htons(port
);
917 if (bind(socket_fd
, (struct sockaddr
*) &addr
, sizeof(addr
)) == -1) {
918 fprintf(stderr
, "failed to bind socket: %s (%d)\n", strerror(errno
), errno
);
922 if (listen(socket_fd
, 1) == -1) {
923 fprintf(stderr
, "failed to listen on socket: %s (%d)\n", strerror(errno
), errno
);
928 reg_t
gdbserver_t::translate(reg_t vaddr
)
930 unsigned int vm
= virtual_memory();
931 unsigned int levels
, ptidxbits
, ptesize
;
956 sprintf(buf
, "VM mode %d is not supported by gdbserver.cc.", vm
);
958 return true; // die doesn't return, but gcc doesn't know that.
962 // Handle page tables here. There's a bunch of duplicated code with
963 // collect_translation_info_op_t. :-(
964 reg_t base
= sptbr
<< PGSHIFT
;
965 int ptshift
= (levels
- 1) * ptidxbits
;
966 for (unsigned int i
= 0; i
< levels
; i
++, ptshift
-= ptidxbits
) {
967 reg_t idx
= (vaddr
>> (PGSHIFT
+ ptshift
)) & ((1 << ptidxbits
) - 1);
969 reg_t pte_addr
= base
+ idx
* ptesize
;
970 auto it
= pte_cache
.find(pte_addr
);
971 if (it
== pte_cache
.end()) {
972 fprintf(stderr
, "ERROR: gdbserver tried to translate 0x%lx without first "
973 "collecting the relevant PTEs.\n", vaddr
);
974 die("gdbserver_t::translate()");
977 reg_t pte
= pte_cache
[pte_addr
];
978 reg_t ppn
= pte
>> PTE_PPN_SHIFT
;
980 if (PTE_TABLE(pte
)) { // next level of page table
981 base
= ppn
<< PGSHIFT
;
983 // We've collected all the data required for the translation.
984 reg_t vpn
= vaddr
>> PGSHIFT
;
985 reg_t paddr
= (ppn
| (vpn
& ((reg_t(1) << ptshift
) - 1))) << PGSHIFT
;
986 paddr
+= vaddr
& (PGSIZE
-1);
987 D(fprintf(stderr
, "gdbserver translate 0x%lx -> 0x%lx\n", vaddr
, paddr
));
992 fprintf(stderr
, "ERROR: gdbserver tried to translate 0x%lx but the relevant "
993 "PTEs are invalid.\n", vaddr
);
994 // TODO: Is it better to throw an exception here?
998 unsigned int gdbserver_t::privilege_mode()
1000 unsigned int mode
= get_field(dcsr
, DCSR_PRV
);
1001 if (get_field(mstatus
, MSTATUS_MPRV
))
1002 mode
= get_field(mstatus
, MSTATUS_MPP
);
1006 unsigned int gdbserver_t::virtual_memory()
1008 unsigned int mode
= privilege_mode();
1011 return get_field(mstatus
, MSTATUS_VM
);
1014 void gdbserver_t::write_debug_ram(unsigned int index
, uint32_t value
)
1016 sim
->debug_module
.ram_write32(index
, value
);
1019 uint32_t gdbserver_t::read_debug_ram(unsigned int index
)
1021 return sim
->debug_module
.ram_read32(index
);
1024 void gdbserver_t::add_operation(operation_t
* operation
)
1026 operation_queue
.push(operation
);
1029 void gdbserver_t::accept()
1031 client_fd
= ::accept(socket_fd
, NULL
, NULL
);
1032 if (client_fd
== -1) {
1033 if (errno
== EAGAIN
) {
1034 // No client waiting to connect right now.
1036 fprintf(stderr
, "failed to accept on socket: %s (%d)\n", strerror(errno
),
1041 fcntl(client_fd
, F_SETFL
, O_NONBLOCK
);
1044 extended_mode
= false;
1046 // gdb wants the core to be halted when it attaches.
1047 add_operation(new halt_op_t(*this));
1051 void gdbserver_t::read()
1053 // Reading from a non-blocking socket still blocks if there is no data
1056 size_t count
= recv_buf
.contiguous_empty_size();
1058 ssize_t bytes
= ::read(client_fd
, recv_buf
.contiguous_empty(), count
);
1060 if (errno
== EAGAIN
) {
1061 // We'll try again the next call.
1063 fprintf(stderr
, "failed to read on socket: %s (%d)\n", strerror(errno
), errno
);
1066 } else if (bytes
== 0) {
1067 // The remote disconnected.
1069 processor_t
*p
= sim
->get_core(0);
1070 // TODO p->set_halted(false, HR_NONE);
1074 recv_buf
.data_added(bytes
);
1078 void gdbserver_t::write()
1080 if (send_buf
.empty())
1083 while (!send_buf
.empty()) {
1084 unsigned int count
= send_buf
.contiguous_data_size();
1086 ssize_t bytes
= ::write(client_fd
, send_buf
.contiguous_data(), count
);
1088 fprintf(stderr
, "failed to write to socket: %s (%d)\n", strerror(errno
), errno
);
1090 } else if (bytes
== 0) {
1091 // Client can't take any more data right now.
1094 D(fprintf(stderr
, "wrote %ld bytes: ", bytes
));
1095 for (unsigned int i
= 0; i
< bytes
; i
++) {
1096 D(fprintf(stderr
, "%c", send_buf
[i
]));
1098 D(fprintf(stderr
, "\n"));
1099 send_buf
.consume(bytes
);
1104 void print_packet(const std::vector
<uint8_t> &packet
)
1106 for (uint8_t c
: packet
) {
1107 if (c
>= ' ' and c
<= '~')
1108 fprintf(stderr
, "%c", c
);
1110 fprintf(stderr
, "\\x%02x", c
);
1112 fprintf(stderr
, "\n");
1115 uint8_t compute_checksum(const std::vector
<uint8_t> &packet
)
1117 uint8_t checksum
= 0;
1118 for (auto i
= packet
.begin() + 1; i
!= packet
.end() - 3; i
++ ) {
1124 uint8_t character_hex_value(uint8_t character
)
1126 if (character
>= '0' && character
<= '9')
1127 return character
- '0';
1128 if (character
>= 'a' && character
<= 'f')
1129 return 10 + character
- 'a';
1130 if (character
>= 'A' && character
<= 'F')
1131 return 10 + character
- 'A';
1135 uint8_t extract_checksum(const std::vector
<uint8_t> &packet
)
1137 return character_hex_value(*(packet
.end() - 1)) +
1138 16 * character_hex_value(*(packet
.end() - 2));
1141 void gdbserver_t::process_requests()
1143 // See https://sourceware.org/gdb/onlinedocs/gdb/Remote-Protocol.html
1145 while (!recv_buf
.empty()) {
1146 std::vector
<uint8_t> packet
;
1147 for (unsigned int i
= 0; i
< recv_buf
.size(); i
++) {
1148 uint8_t b
= recv_buf
[i
];
1150 if (packet
.empty() && expect_ack
&& b
== '+') {
1151 recv_buf
.consume(1);
1155 if (packet
.empty() && b
== 3) {
1156 D(fprintf(stderr
, "Received interrupt\n"));
1157 recv_buf
.consume(1);
1163 // Start of new packet.
1164 if (!packet
.empty()) {
1165 fprintf(stderr
, "Received malformed %ld-byte packet from debug client: ",
1167 print_packet(packet
);
1168 recv_buf
.consume(i
);
1173 packet
.push_back(b
);
1175 // Packets consist of $<packet-data>#<checksum>
1176 // where <checksum> is
1177 if (packet
.size() >= 4 &&
1178 packet
[packet
.size()-3] == '#') {
1179 handle_packet(packet
);
1180 recv_buf
.consume(i
+1);
1184 // There's a partial packet in the buffer. Wait until we get more data to
1186 if (packet
.size()) {
1192 void gdbserver_t::handle_halt_reason(const std::vector
<uint8_t> &packet
)
1197 void gdbserver_t::handle_general_registers_read(const std::vector
<uint8_t> &packet
)
1199 add_operation(new general_registers_read_op_t(*this));
1202 void gdbserver_t::set_interrupt(uint32_t hartid
) {
1203 sim
->debug_module
.set_interrupt(hartid
);
1206 // First byte is the most-significant one.
1207 // Eg. "08675309" becomes 0x08675309.
1208 uint64_t consume_hex_number(std::vector
<uint8_t>::const_iterator
&iter
,
1209 std::vector
<uint8_t>::const_iterator end
)
1213 while (iter
!= end
) {
1215 uint64_t c_value
= character_hex_value(c
);
1225 // First byte is the least-significant one.
1226 // Eg. "08675309" becomes 0x09536708
1227 uint64_t consume_hex_number_le(std::vector
<uint8_t>::const_iterator
&iter
,
1228 std::vector
<uint8_t>::const_iterator end
)
1231 unsigned int shift
= 4;
1233 while (iter
!= end
) {
1235 uint64_t c_value
= character_hex_value(c
);
1239 value
|= c_value
<< shift
;
1240 if ((shift
% 8) == 0)
1248 void consume_string(std::string
&str
, std::vector
<uint8_t>::const_iterator
&iter
,
1249 std::vector
<uint8_t>::const_iterator end
, uint8_t separator
)
1251 while (iter
!= end
&& *iter
!= separator
) {
1252 str
.append(1, (char) *iter
);
1257 void gdbserver_t::handle_register_read(const std::vector
<uint8_t> &packet
)
1261 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1262 unsigned int n
= consume_hex_number(iter
, packet
.end());
1264 return send_packet("E01");
1266 add_operation(new register_read_op_t(*this, n
));
1269 void gdbserver_t::handle_register_write(const std::vector
<uint8_t> &packet
)
1273 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1274 unsigned int n
= consume_hex_number(iter
, packet
.end());
1276 return send_packet("E05");
1279 reg_t value
= consume_hex_number_le(iter
, packet
.end());
1281 return send_packet("E06");
1283 processor_t
*p
= sim
->get_core(0);
1285 add_operation(new register_write_op_t(*this, n
, value
));
1287 return send_packet("OK");
1290 void gdbserver_t::handle_memory_read(const std::vector
<uint8_t> &packet
)
1293 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1294 reg_t address
= consume_hex_number(iter
, packet
.end());
1296 return send_packet("E10");
1298 reg_t length
= consume_hex_number(iter
, packet
.end());
1300 return send_packet("E11");
1302 add_operation(new collect_translation_info_op_t(*this, address
, length
));
1303 add_operation(new memory_read_op_t(*this, address
, length
));
1306 void gdbserver_t::handle_memory_binary_write(const std::vector
<uint8_t> &packet
)
1308 // X addr,length:XX...
1309 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1310 reg_t address
= consume_hex_number(iter
, packet
.end());
1312 return send_packet("E20");
1314 reg_t length
= consume_hex_number(iter
, packet
.end());
1316 return send_packet("E21");
1320 return send_packet("OK");
1323 unsigned char *data
= new unsigned char[length
];
1324 for (unsigned int i
= 0; i
< length
; i
++) {
1325 if (iter
== packet
.end()) {
1326 return send_packet("E22");
1331 // The binary data representation uses 7d (ascii ‘}’) as an escape
1332 // character. Any escaped byte is transmitted as the escape character
1333 // followed by the original character XORed with 0x20. For example, the
1334 // byte 0x7d would be transmitted as the two bytes 0x7d 0x5d. The bytes
1335 // 0x23 (ascii ‘#’), 0x24 (ascii ‘$’), and 0x7d (ascii ‘}’) must always
1337 if (iter
== packet
.end()) {
1338 return send_packet("E23");
1346 return send_packet("E4b"); // EOVERFLOW
1348 add_operation(new collect_translation_info_op_t(*this, address
, length
));
1349 add_operation(new memory_write_op_t(*this, address
, length
, data
));
1352 void gdbserver_t::handle_continue(const std::vector
<uint8_t> &packet
)
1355 processor_t
*p
= sim
->get_core(0);
1356 if (packet
[2] != '#') {
1357 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1358 dpc
= consume_hex_number(iter
, packet
.end());
1360 return send_packet("E30");
1363 add_operation(new continue_op_t(*this, false));
1366 void gdbserver_t::handle_step(const std::vector
<uint8_t> &packet
)
1369 if (packet
[2] != '#') {
1370 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1372 //p->state.pc = consume_hex_number(iter, packet.end());
1374 return send_packet("E40");
1377 add_operation(new continue_op_t(*this, true));
1380 void gdbserver_t::handle_kill(const std::vector
<uint8_t> &packet
)
1383 // The exact effect of this packet is not specified.
1384 // Looks like OpenOCD disconnects?
1388 void gdbserver_t::handle_extended(const std::vector
<uint8_t> &packet
)
1390 // Enable extended mode. In extended mode, the remote server is made
1391 // persistent. The ‘R’ packet is used to restart the program being debugged.
1393 extended_mode
= true;
1396 void gdbserver_t::handle_breakpoint(const std::vector
<uint8_t> &packet
)
1398 // insert: Z type,addr,kind
1399 // remove: z type,addr,kind
1401 software_breakpoint_t bp
;
1402 bool insert
= (packet
[1] == 'Z');
1403 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1404 int type
= consume_hex_number(iter
, packet
.end());
1406 return send_packet("E50");
1408 bp
.address
= consume_hex_number(iter
, packet
.end());
1410 return send_packet("E51");
1412 bp
.size
= consume_hex_number(iter
, packet
.end());
1413 // There may be more options after a ; here, but we don't support that.
1415 return send_packet("E52");
1417 if (bp
.size
!= 2 && bp
.size
!= 4) {
1418 return send_packet("E53");
1421 fence_i_required
= true;
1422 add_operation(new collect_translation_info_op_t(*this, bp
.address
, bp
.size
));
1424 unsigned char* swbp
= new unsigned char[4];
1426 swbp
[0] = C_EBREAK
& 0xff;
1427 swbp
[1] = (C_EBREAK
>> 8) & 0xff;
1429 swbp
[0] = EBREAK
& 0xff;
1430 swbp
[1] = (EBREAK
>> 8) & 0xff;
1431 swbp
[2] = (EBREAK
>> 16) & 0xff;
1432 swbp
[3] = (EBREAK
>> 24) & 0xff;
1435 breakpoints
[bp
.address
] = new software_breakpoint_t(bp
);
1436 add_operation(new memory_read_op_t(*this, bp
.address
, bp
.size
,
1437 breakpoints
[bp
.address
]->instruction
));
1438 add_operation(new memory_write_op_t(*this, bp
.address
, bp
.size
, swbp
));
1441 software_breakpoint_t
*found_bp
;
1442 found_bp
= breakpoints
[bp
.address
];
1443 unsigned char* instruction
= new unsigned char[4];
1444 memcpy(instruction
, found_bp
->instruction
, 4);
1445 add_operation(new memory_write_op_t(*this, found_bp
->address
,
1446 found_bp
->size
, instruction
));
1447 breakpoints
.erase(bp
.address
);
1451 return send_packet("OK");
1454 void gdbserver_t::handle_query(const std::vector
<uint8_t> &packet
)
1457 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1459 consume_string(name
, iter
, packet
.end(), ':');
1460 if (iter
!= packet
.end())
1462 if (name
== "Supported") {
1464 while (iter
!= packet
.end()) {
1465 std::string feature
;
1466 consume_string(feature
, iter
, packet
.end(), ';');
1467 if (iter
!= packet
.end())
1469 if (feature
== "swbreak+") {
1473 send("PacketSize=131072;");
1474 return end_packet();
1477 D(fprintf(stderr
, "Unsupported query %s\n", name
.c_str()));
1478 return send_packet("");
1481 void gdbserver_t::handle_packet(const std::vector
<uint8_t> &packet
)
1483 if (compute_checksum(packet
) != extract_checksum(packet
)) {
1484 fprintf(stderr
, "Received %ld-byte packet with invalid checksum\n", packet
.size());
1485 fprintf(stderr
, "Computed checksum: %x\n", compute_checksum(packet
));
1486 print_packet(packet
);
1491 D(fprintf(stderr
, "Received %ld-byte packet from debug client: ", packet
.size()));
1492 D(print_packet(packet
));
1495 switch (packet
[1]) {
1497 return handle_extended(packet
);
1499 return handle_halt_reason(packet
);
1501 return handle_general_registers_read(packet
);
1503 // return handle_kill(packet);
1505 return handle_memory_read(packet
);
1507 // return handle_memory_write(packet);
1509 return handle_memory_binary_write(packet
);
1511 return handle_register_read(packet
);
1513 return handle_register_write(packet
);
1515 return handle_continue(packet
);
1517 return handle_step(packet
);
1520 return handle_breakpoint(packet
);
1523 return handle_query(packet
);
1527 D(fprintf(stderr
, "** Unsupported packet: "));
1528 D(print_packet(packet
));
1532 void gdbserver_t::handle_interrupt()
1534 processor_t
*p
= sim
->get_core(0);
1535 add_operation(new halt_op_t(*this, true));
1538 void gdbserver_t::handle()
1540 if (client_fd
> 0) {
1541 processor_t
*p
= sim
->get_core(0);
1543 bool interrupt
= sim
->debug_module
.get_interrupt(0);
1545 if (!interrupt
&& !operation_queue
.empty()) {
1546 operation_t
*operation
= operation_queue
.front();
1547 if (operation
->step()) {
1548 operation_queue
.pop();
1553 bool halt_notification
= sim
->debug_module
.get_halt_notification(0);
1554 if (halt_notification
) {
1555 sim
->debug_module
.clear_halt_notification(0);
1556 add_operation(new halt_op_t(*this, true));
1566 if (operation_queue
.empty()) {
1567 this->process_requests();
1571 void gdbserver_t::send(const char* msg
)
1573 unsigned int length
= strlen(msg
);
1574 for (const char *c
= msg
; *c
; c
++)
1575 running_checksum
+= *c
;
1576 send_buf
.append((const uint8_t *) msg
, length
);
1579 void gdbserver_t::send(uint64_t value
)
1582 for (unsigned int i
= 0; i
< 8; i
++) {
1583 sprintf(buffer
, "%02x", (int) (value
& 0xff));
1589 void gdbserver_t::send(uint32_t value
)
1592 for (unsigned int i
= 0; i
< 4; i
++) {
1593 sprintf(buffer
, "%02x", (int) (value
& 0xff));
1599 void gdbserver_t::send_packet(const char* data
)
1607 void gdbserver_t::start_packet()
1610 running_checksum
= 0;
1613 void gdbserver_t::end_packet(const char* data
)
1619 char checksum_string
[4];
1620 sprintf(checksum_string
, "#%02x", running_checksum
);
1621 send(checksum_string
);