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HEAD
sim: define emulated CPU clock rate to be 1GHz
[riscv-isa-sim.git]
/
riscv
/
insns
/
amoor_d.h
1
require_extension
(
'A'
);
2
require_rv64
;
3
WRITE_RD
(
MMU
.
amo_uint64
(
RS1
, [&](
uint64_t
lhs
) {
return
lhs
|
RS2
; }));