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HEAD
Instructions are no longer member functions
[riscv-isa-sim.git]
/
riscv
/
insns
/
amoor_d.h
1
require_xpr64
;
2
reg_t v
=
MMU
.
load_uint64
(
RS1
);
3
MMU
.
store_uint64
(
RS1
,
RS2
|
v
);
4
RD
=
v
;