projects
/
riscv-isa-sim.git
/ blob
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
history
|
raw
|
HEAD
Add missing include for devices.h
[riscv-isa-sim.git]
/
riscv
/
insns
/
c_lui.h
1
require_extension
(
'C'
);
2
if
(
insn
.
rvc_rd
() ==
2
) {
// c.addi16sp
3
require
(
insn
.
rvc_addi16sp_imm
() !=
0
);
4
WRITE_REG
(
X_SP
,
sext_xlen
(
RVC_SP
+
insn
.
rvc_addi16sp_imm
()));
5
}
else
{
6
require
(
insn
.
rvc_rd
() !=
0
);
7
WRITE_RD
(
insn
.
rvc_imm
() <<
12
);
8
}