projects
/
riscv-isa-sim.git
/ blob
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
history
|
raw
|
HEAD
Use WRITE_RD/WRITE_FRD macros to write registers
[riscv-isa-sim.git]
/
riscv
/
insns
/
fmax_d.h
1
require_fp
;
2
WRITE_FRD
(
isNaNF64UI
(
FRS2
) ||
f64_le_quiet
(
FRS2
,
FRS1
)
/* && FRS1 not NaN */
3
?
FRS1
:
FRS2
);
4
set_fp_exceptions
;