riscv/insns/mfc0.h

   1 require_supervisor;
   2
   3 switch(insn.rtype.rb)
   4 {
   5   case 0:
   6     RA = sext32(sr);
   7     break;
   8   case 1:
   9     RA = sext32(epc);
  10     break;
  11   case 2:
  12     RA = sext32(badvaddr);
  13     break;
  14   case 3:
  15     RA = sext32(ebase);
  16     break;
  17
  18   case 8:
  19     RA = sext32(MEMSIZE >> 12);
  20     break;
  21
  22   case 17:
  23     RA = sext32(sim->get_fromhost());
  24     break;
  25
  26   default:
  27     RA = -1;
  28 }