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HEAD
[xcc,pk,sim] added privileged cflush instruction
[riscv-isa-sim.git]
/
riscv
/
insns
/
mov_us.h
1
require_vector
;
2
demand
(
0
<=
RS2
&&
RS2
<
MAX_UTS
,
"ut not in range"
);
3
RD
=
UT_RS1
(
RS2
);