14 sim_t::sim_t(int _nprocs
, int mem_mb
, const std::vector
<std::string
>& args
)
15 : htif(new htif_isasim_t(this, args
)),
18 // allocate target machine's memory, shrinking it as necessary
19 // until the allocation succeeds
20 size_t memsz0
= (size_t)mem_mb
<< 20;
22 memsz0
= 1L << (sizeof(size_t) == 8 ? 32 : 30);
24 size_t quantum
= std::max(PGSIZE
, (reg_t
)sysconf(_SC_PAGESIZE
));
25 memsz0
= memsz0
/quantum
*quantum
;
28 mem
= (char*)mmap(NULL
, memsz
, PROT_WRITE
, MAP_PRIVATE
|MAP_ANON
, -1, 0);
32 while(mem
== MAP_FAILED
&& (memsz
= memsz
*10/11/quantum
*quantum
))
33 mem
= (char*)mmap(NULL
, memsz
, PROT_WRITE
, MAP_PRIVATE
|MAP_ANON
, -1, 0);
34 assert(mem
!= MAP_FAILED
);
35 fprintf(stderr
, "warning: only got %lu bytes of target mem (wanted %lu)\n",
36 (unsigned long)memsz
, (unsigned long)memsz0
);
39 mmu
= new mmu_t(mem
, memsz
);
41 for(size_t i
= 0; i
< num_cores(); i
++)
42 procs
[i
] = new processor_t(this, new mmu_t(mem
, memsz
), i
);
47 for(size_t i
= 0; i
< num_cores(); i
++)
49 mmu_t
* pmmu
= &procs
[i
]->mmu
;
57 void sim_t::send_ipi(reg_t who
)
60 procs
[who
]->deliver_ipi();
63 reg_t
sim_t::get_scr(int which
)
67 case 0: return num_cores();
68 case 1: return memsz
>> 20;
73 void sim_t::run(bool debug
)
78 step_all(10000, 1000, false);
84 void sim_t::step_all(size_t n
, size_t interleave
, bool noisy
)
87 for(size_t j
= 0; j
< n
; j
+=interleave
)
89 for(int i
= 0; i
< (int)num_cores(); i
++)
90 procs
[i
]->step(interleave
,noisy
);