1 // See LICENSE for license details.
14 // this class encapsulates the processors and memory in a RISC-V machine.
18 sim_t(size_t _nprocs
, size_t mem_mb
, const std::vector
<std::string
>& htif_args
);
21 // run the simulation to completion
25 void set_debug(bool value
);
26 void set_procs_debug(bool value
);
27 htif_isasim_t
* get_htif() { return htif
.get(); }
29 // deliver an IPI to a specific processor
30 void send_ipi(reg_t who
);
32 // returns the number of processors in this simulator
33 size_t num_cores() { return procs
.size(); }
34 processor_t
* get_core(size_t i
) { return procs
.at(i
); }
36 // read one of the system control registers
37 reg_t
get_scr(int which
);
40 std::unique_ptr
<htif_isasim_t
> htif
;
41 char* mem
; // main memory
42 size_t memsz
; // memory size in bytes
43 mmu_t
* debug_mmu
; // debug port into main memory
44 std::vector
<processor_t
*> procs
;
46 void step(size_t n
); // step through simulation
47 static const size_t INTERLEAVE
= 5000;
52 // presents a prompt for introspection into the simulation
55 // functions that help implement interactive()
56 void interactive_quit(const std::string
& cmd
, const std::vector
<std::string
>& args
);
57 void interactive_run(const std::string
& cmd
, const std::vector
<std::string
>& args
, bool noisy
);
58 void interactive_run_noisy(const std::string
& cmd
, const std::vector
<std::string
>& args
);
59 void interactive_run_silent(const std::string
& cmd
, const std::vector
<std::string
>& args
);
60 void interactive_reg(const std::string
& cmd
, const std::vector
<std::string
>& args
);
61 void interactive_fregs(const std::string
& cmd
, const std::vector
<std::string
>& args
);
62 void interactive_fregd(const std::string
& cmd
, const std::vector
<std::string
>& args
);
63 void interactive_mem(const std::string
& cmd
, const std::vector
<std::string
>& args
);
64 void interactive_str(const std::string
& cmd
, const std::vector
<std::string
>& args
);
65 void interactive_until(const std::string
& cmd
, const std::vector
<std::string
>& args
);
66 reg_t
get_reg(const std::vector
<std::string
>& args
);
67 reg_t
get_freg(const std::vector
<std::string
>& args
);
68 reg_t
get_mem(const std::vector
<std::string
>& args
);
69 reg_t
get_pc(const std::vector
<std::string
>& args
);
70 reg_t
get_tohost(const std::vector
<std::string
>& args
);
72 friend class htif_isasim_t
;
75 extern volatile bool ctrlc_pressed
;