1 // See LICENSE for license details.
9 #include <fesvr/option_parser.h>
19 fprintf(stderr
, "usage: spike [host options] <target program> [target options]\n");
20 fprintf(stderr
, "Host Options:\n");
21 fprintf(stderr
, " -p<n> Simulate <n> processors [default 1]\n");
22 fprintf(stderr
, " -m<n> Provide <n> MiB of target memory [default 4096]\n");
23 fprintf(stderr
, " -d Interactive debug mode\n");
24 fprintf(stderr
, " -g Track histogram of PCs\n");
25 fprintf(stderr
, " -l Generate a log of execution\n");
26 fprintf(stderr
, " -h Print this help message\n");
27 fprintf(stderr
, " --isa=<name> RISC-V ISA string [default %s]\n", DEFAULT_ISA
);
28 fprintf(stderr
, " --ic=<S>:<W>:<B> Instantiate a cache model with S sets,\n");
29 fprintf(stderr
, " --dc=<S>:<W>:<B> W ways, and B-byte blocks (with S and\n");
30 fprintf(stderr
, " --l2=<S>:<W>:<B> B both powers of 2).\n");
31 fprintf(stderr
, " --extension=<name> Specify RoCC Extension\n");
32 fprintf(stderr
, " --extlib=<name> Shared library to load\n");
33 fprintf(stderr
, " --dump-config-string Print platform configuration string and exit\n");
37 int main(int argc
, char** argv
)
40 bool histogram
= false;
42 bool dump_config_string
= false;
45 std::unique_ptr
<icache_sim_t
> ic
;
46 std::unique_ptr
<dcache_sim_t
> dc
;
47 std::unique_ptr
<cache_sim_t
> l2
;
48 std::function
<extension_t
*()> extension
;
49 const char* isa
= DEFAULT_ISA
;
51 option_parser_t parser
;
53 parser
.option('h', 0, 0, [&](const char* s
){help();});
54 parser
.option('d', 0, 0, [&](const char* s
){debug
= true;});
55 parser
.option('g', 0, 0, [&](const char* s
){histogram
= true;});
56 parser
.option('l', 0, 0, [&](const char* s
){log
= true;});
57 parser
.option('p', 0, 1, [&](const char* s
){nprocs
= atoi(s
);});
58 parser
.option('m', 0, 1, [&](const char* s
){mem_mb
= atoi(s
);});
59 parser
.option(0, "ic", 1, [&](const char* s
){ic
.reset(new icache_sim_t(s
));});
60 parser
.option(0, "dc", 1, [&](const char* s
){dc
.reset(new dcache_sim_t(s
));});
61 parser
.option(0, "l2", 1, [&](const char* s
){l2
.reset(cache_sim_t::construct(s
, "L2$"));});
62 parser
.option(0, "isa", 1, [&](const char* s
){isa
= s
;});
63 parser
.option(0, "extension", 1, [&](const char* s
){extension
= find_extension(s
);});
64 parser
.option(0, "dump-config-string", 0, [&](const char *s
){dump_config_string
= true;});
65 parser
.option(0, "extlib", 1, [&](const char *s
){
66 void *lib
= dlopen(s
, RTLD_NOW
| RTLD_GLOBAL
);
68 fprintf(stderr
, "Unable to load extlib '%s': %s\n", s
, dlerror());
73 auto argv1
= parser
.parse(argv
);
74 std::vector
<std::string
> htif_args(argv1
, (const char*const*)argv
+ argc
);
75 sim_t
s(isa
, nprocs
, mem_mb
, htif_args
);
77 if (dump_config_string
) {
78 printf("%s", s
.get_config_string());
85 if (ic
&& l2
) ic
->set_miss_handler(&*l2
);
86 if (dc
&& l2
) dc
->set_miss_handler(&*l2
);
87 for (size_t i
= 0; i
< nprocs
; i
++)
89 if (ic
) s
.get_core(i
)->get_mmu()->register_memtracer(&*ic
);
90 if (dc
) s
.get_core(i
)->get_mmu()->register_memtracer(&*dc
);
91 if (extension
) s
.get_core(i
)->register_extension(extension());
96 s
.set_histogram(histogram
);