48eeba2a3e98915cc06847f5c528c6a517641c2d
1 # IEEE Floating Point Adder (Single Precision)
2 # Copyright (C) Jonathan P Dawson 2013
5 from nmigen
import Module
, Signal
, Cat
6 from nmigen
.cli
import main
, verilog
8 from fpbase
import FPNumIn
, FPNumOut
, FPOp
, Overflow
, FPBase
11 class FPState(FPBase
):
12 def __init__(self
, state_from
):
13 self
.state_from
= state_from
15 def set_inputs(self
, inputs
):
17 for k
,v
in inputs
.items():
20 def set_outputs(self
, outputs
):
21 self
.outputs
= outputs
22 for k
,v
in outputs
.items():
26 class FPGetOpA(FPState
):
29 self
.get_op(m
, self
.in_a
, self
.a
, "get_b")
32 class FPGetOpB(FPState
):
35 self
.get_op(m
, self
.in_b
, self
.b
, "special_cases")
38 class FPAddSpecialCases(FPState
):
41 """ special cases: NaNs, infs, zeros, denormalised
42 NOTE: some of these are unique to add. see "Special Operations"
43 https://steve.hollasch.net/cgindex/coding/ieeefloat.html
46 m
.d
.comb
+= s_nomatch
.eq(self
.a
.s
!= self
.b
.s
)
49 m
.d
.comb
+= m_match
.eq(self
.a
.m
== self
.b
.m
)
51 # if a is NaN or b is NaN return NaN
52 with m
.If(self
.a
.is_nan | self
.b
.is_nan
):
54 m
.d
.sync
+= self
.z
.nan(1)
56 # XXX WEIRDNESS for FP16 non-canonical NaN handling
59 ## if a is zero and b is NaN return -b
60 #with m.If(a.is_zero & (a.s==0) & b.is_nan):
62 # m.d.sync += z.create(b.s, b.e, Cat(b.m[3:-2], ~b.m[0]))
64 ## if b is zero and a is NaN return -a
65 #with m.Elif(b.is_zero & (b.s==0) & a.is_nan):
67 # m.d.sync += z.create(a.s, a.e, Cat(a.m[3:-2], ~a.m[0]))
69 ## if a is -zero and b is NaN return -b
70 #with m.Elif(a.is_zero & (a.s==1) & b.is_nan):
72 # m.d.sync += z.create(a.s & b.s, b.e, Cat(b.m[3:-2], 1))
74 ## if b is -zero and a is NaN return -a
75 #with m.Elif(b.is_zero & (b.s==1) & a.is_nan):
77 # m.d.sync += z.create(a.s & b.s, a.e, Cat(a.m[3:-2], 1))
79 # if a is inf return inf (or NaN)
80 with m
.Elif(self
.a
.is_inf
):
82 m
.d
.sync
+= self
.z
.inf(self
.a
.s
)
83 # if a is inf and signs don't match return NaN
84 with m
.If(self
.b
.exp_128
& s_nomatch
):
85 m
.d
.sync
+= self
.z
.nan(1)
87 # if b is inf return inf
88 with m
.Elif(self
.b
.is_inf
):
90 m
.d
.sync
+= self
.z
.inf(self
.b
.s
)
92 # if a is zero and b zero return signed-a/b
93 with m
.Elif(self
.a
.is_zero
& self
.b
.is_zero
):
95 m
.d
.sync
+= self
.z
.create(self
.a
.s
& self
.b
.s
, self
.b
.e
,
98 # if a is zero return b
99 with m
.Elif(self
.a
.is_zero
):
101 m
.d
.sync
+= self
.z
.create(self
.b
.s
, self
.b
.e
, self
.b
.m
[3:-1])
103 # if b is zero return a
104 with m
.Elif(self
.b
.is_zero
):
106 m
.d
.sync
+= self
.z
.create(self
.a
.s
, self
.a
.e
, self
.a
.m
[3:-1])
108 # if a equal to -b return zero (+ve zero)
109 with m
.Elif(s_nomatch
& m_match
& (self
.a
.e
== self
.b
.e
)):
111 m
.d
.sync
+= self
.z
.zero(0)
113 # Denormalised Number checks
115 m
.next
= "denormalise"
118 class FPAddDeNorm(FPState
):
121 # Denormalised Number checks
123 self
.denormalise(m
, self
.a
)
124 self
.denormalise(m
, self
.b
)
127 class FPAddAlignMulti(FPState
):
130 # NOTE: this does *not* do single-cycle multi-shifting,
131 # it *STAYS* in the align state until exponents match
133 # exponent of a greater than b: shift b down
134 with m
.If(self
.a
.e
> self
.b
.e
):
135 m
.d
.sync
+= self
.b
.shift_down()
136 # exponent of b greater than a: shift a down
137 with m
.Elif(self
.a
.e
< self
.b
.e
):
138 m
.d
.sync
+= self
.a
.shift_down()
139 # exponents equal: move to next stage.
144 class FPAddAlignSingle(FPState
):
147 # This one however (single-cycle) will do the shift
150 # XXX TODO: the shifter used here is quite expensive
151 # having only one would be better
153 ediff
= Signal((len(self
.a
.e
), True), reset_less
=True)
154 ediffr
= Signal((len(self
.a
.e
), True), reset_less
=True)
155 m
.d
.comb
+= ediff
.eq(self
.a
.e
- self
.b
.e
)
156 m
.d
.comb
+= ediffr
.eq(self
.b
.e
- self
.a
.e
)
157 with m
.If(ediff
> 0):
158 m
.d
.sync
+= self
.b
.shift_down_multi(ediff
)
159 # exponent of b greater than a: shift a down
160 with m
.Elif(ediff
< 0):
161 m
.d
.sync
+= self
.a
.shift_down_multi(ediffr
)
166 class FPAddStage0(FPState
):
169 """ First stage of add. covers same-sign (add) and subtract
170 special-casing when mantissas are greater or equal, to
171 give greatest accuracy.
174 m
.d
.sync
+= self
.z
.e
.eq(self
.a
.e
)
175 # same-sign (both negative or both positive) add mantissas
176 with m
.If(self
.a
.s
== self
.b
.s
):
178 self
.tot
.eq(Cat(self
.a
.m
, 0) + Cat(self
.b
.m
, 0)),
179 self
.z
.s
.eq(self
.a
.s
)
181 # a mantissa greater than b, use a
182 with m
.Elif(self
.a
.m
>= self
.b
.m
):
184 self
.tot
.eq(Cat(self
.a
.m
, 0) - Cat(self
.b
.m
, 0)),
185 self
.z
.s
.eq(self
.a
.s
)
187 # b mantissa greater than a, use b
190 self
.tot
.eq(Cat(self
.b
.m
, 0) - Cat(self
.a
.m
, 0)),
191 self
.z
.s
.eq(self
.b
.s
)
195 """ Second stage of add: preparation for normalisation.
196 detects when tot sum is too big (tot[27] is kinda a carry bit)
199 class FPAddStage1(FPState
):
202 m
.next
= "normalise_1"
203 # tot[27] gets set when the sum overflows. shift result down
204 with m
.If(self
.tot
[-1]):
206 self
.z
.m
.eq(self
.tot
[4:]),
207 self
.of
.m0
.eq(self
.tot
[4]),
208 self
.of
.guard
.eq(self
.tot
[3]),
209 self
.of
.round_bit
.eq(self
.tot
[2]),
210 self
.of
.sticky
.eq(self
.tot
[1] | self
.tot
[0]),
211 self
.z
.e
.eq(self
.z
.e
+ 1)
216 self
.z
.m
.eq(self
.tot
[3:]),
217 self
.of
.m0
.eq(self
.tot
[3]),
218 self
.of
.guard
.eq(self
.tot
[2]),
219 self
.of
.round_bit
.eq(self
.tot
[1]),
220 self
.of
.sticky
.eq(self
.tot
[0])
224 class FPNorm1(FPState
):
227 self
.normalise_1(m
, self
.z
, self
.of
, "normalise_2")
230 class FPNorm2(FPState
):
233 self
.normalise_2(m
, self
.z
, self
.of
, "round")
236 class FPRound(FPState
):
239 self
.roundz(m
, self
.z
, self
.of
, "corrections")
242 class FPCorrections(FPState
):
245 self
.corrections(m
, self
.z
, "pack")
248 class FPPack(FPState
):
251 self
.pack(m
, self
.z
, "put_z")
254 class FPPutZ(FPState
):
257 self
.put_z(m
, self
.z
, self
.out_z
, "get_a")
262 def __init__(self
, width
, single_cycle
=False):
263 FPBase
.__init
__(self
)
265 self
.single_cycle
= single_cycle
267 self
.in_a
= FPOp(width
)
268 self
.in_b
= FPOp(width
)
269 self
.out_z
= FPOp(width
)
271 def get_fragment(self
, platform
=None):
272 """ creates the HDL code-fragment for FPAdd
277 a
= FPNumIn(self
.in_a
, self
.width
)
278 b
= FPNumIn(self
.in_b
, self
.width
)
279 z
= FPNumOut(self
.width
, False)
281 m
.submodules
.fpnum_a
= a
282 m
.submodules
.fpnum_b
= b
283 m
.submodules
.fpnum_z
= z
286 tot
= Signal(w
, reset_less
=True) # sticky/round/guard, {mantissa} result, 1 overflow
289 m
.submodules
.overflow
= of
291 geta
= FPGetOpA("get_a")
292 geta
.set_inputs({"in_a": self
.in_a
})
293 geta
.set_outputs({"a": a
})
294 m
.d
.comb
+= a
.v
.eq(self
.in_a
.v
) # links in_a to a
296 getb
= FPGetOpB("get_b")
297 getb
.set_inputs({"in_b": self
.in_b
})
298 getb
.set_outputs({"b": b
})
299 m
.d
.comb
+= b
.v
.eq(self
.in_b
.v
) # links in_b to b
301 sc
= FPAddSpecialCases("special_cases")
302 sc
.set_inputs({"a": a
, "b": b
})
303 sc
.set_outputs({"z": z
})
305 dn
= FPAddDeNorm("denormalise")
306 dn
.set_inputs({"a": a
, "b": b
})
307 dn
.set_outputs({"a": a
, "b": b
}) # XXX outputs same as inputs
309 if self
.single_cycle
:
310 alm
= FPAddAlignSingle("align")
312 alm
= FPAddAlignMulti("align")
313 alm
.set_inputs({"a": a
, "b": b
})
314 alm
.set_outputs({"a": a
, "b": b
}) # XXX outputs same as inputs
316 add0
= FPAddStage0("add_0")
317 add0
.set_inputs({"a": a
, "b": b
})
318 add0
.set_outputs({"z": z
, "tot": tot
})
320 add1
= FPAddStage1("add_1")
321 add1
.set_inputs({"tot": tot
, "z": z
}) # Z input passes through
322 add1
.set_outputs({"z": z
, "of": of
}) # XXX Z as output
324 n1
= FPNorm1("normalise_1")
325 n1
.set_inputs({"z": z
, "of": of
}) # XXX Z as output
326 n1
.set_outputs({"z": z
}) # XXX Z as output
328 n2
= FPNorm2("normalise_2")
329 n2
.set_inputs({"z": z
, "of": of
}) # XXX Z as output
330 n2
.set_outputs({"z": z
}) # XXX Z as output
332 rn
= FPRound("round")
333 rn
.set_inputs({"z": z
, "of": of
}) # XXX Z as output
334 rn
.set_outputs({"z": z
}) # XXX Z as output
336 cor
= FPCorrections("corrections")
337 cor
.set_inputs({"z": z
}) # XXX Z as output
338 cor
.set_outputs({"z": z
}) # XXX Z as output
341 pa
.set_inputs({"z": z
}) # XXX Z as output
342 pa
.set_outputs({"z": z
}) # XXX Z as output
345 pz
.set_inputs({"z": z
})
346 pz
.set_outputs({"out_z": self
.out_z
})
353 with m
.State("get_a"):
359 with m
.State("get_b"):
360 #self.get_op(m, self.in_b, b, "special_cases")
364 # special cases: NaNs, infs, zeros, denormalised
365 # NOTE: some of these are unique to add. see "Special Operations"
366 # https://steve.hollasch.net/cgindex/coding/ieeefloat.html
368 with m
.State("special_cases"):
374 with m
.State("denormalise"):
380 with m
.State("align"):
384 # First stage of add. covers same-sign (add) and subtract
385 # special-casing when mantissas are greater or equal, to
386 # give greatest accuracy.
388 with m
.State("add_0"):
392 # Second stage of add: preparation for normalisation.
393 # detects when tot sum is too big (tot[27] is kinda a carry bit)
395 with m
.State("add_1"):
399 # First stage of normalisation.
401 with m
.State("normalise_1"):
405 # Second stage of normalisation.
407 with m
.State("normalise_2"):
413 with m
.State("round"):
419 with m
.State("corrections"):
425 with m
.State("pack"):
431 with m
.State("put_z"):
437 if __name__
== "__main__":
438 alu
= FPADD(width
=32)
439 main(alu
, ports
=alu
.in_a
.ports() + alu
.in_b
.ports() + alu
.out_z
.ports())
442 # works... but don't use, just do "python fname.py convert -t v"
443 #print (verilog.convert(alu, ports=[
444 # ports=alu.in_a.ports() + \
445 # alu.in_b.ports() + \