glsl: Add ir_demote
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "float64_glsl.h"
29 #include "glsl_to_nir.h"
30 #include "ir_visitor.h"
31 #include "ir_hierarchical_visitor.h"
32 #include "ir.h"
33 #include "ir_optimization.h"
34 #include "program.h"
35 #include "compiler/nir/nir_control_flow.h"
36 #include "compiler/nir/nir_builder.h"
37 #include "compiler/nir/nir_deref.h"
38 #include "main/errors.h"
39 #include "main/imports.h"
40 #include "main/mtypes.h"
41 #include "main/shaderobj.h"
42 #include "util/u_math.h"
43
44 /*
45 * pass to lower GLSL IR to NIR
46 *
47 * This will lower variable dereferences to loads/stores of corresponding
48 * variables in NIR - the variables will be converted to registers in a later
49 * pass.
50 */
51
52 namespace {
53
54 class nir_visitor : public ir_visitor
55 {
56 public:
57 nir_visitor(gl_context *ctx, nir_shader *shader);
58 ~nir_visitor();
59
60 virtual void visit(ir_variable *);
61 virtual void visit(ir_function *);
62 virtual void visit(ir_function_signature *);
63 virtual void visit(ir_loop *);
64 virtual void visit(ir_if *);
65 virtual void visit(ir_discard *);
66 virtual void visit(ir_demote *);
67 virtual void visit(ir_loop_jump *);
68 virtual void visit(ir_return *);
69 virtual void visit(ir_call *);
70 virtual void visit(ir_assignment *);
71 virtual void visit(ir_emit_vertex *);
72 virtual void visit(ir_end_primitive *);
73 virtual void visit(ir_expression *);
74 virtual void visit(ir_swizzle *);
75 virtual void visit(ir_texture *);
76 virtual void visit(ir_constant *);
77 virtual void visit(ir_dereference_variable *);
78 virtual void visit(ir_dereference_record *);
79 virtual void visit(ir_dereference_array *);
80 virtual void visit(ir_barrier *);
81
82 void create_function(ir_function_signature *ir);
83
84 private:
85 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
86 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
87
88 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
89 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
90 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
91 nir_ssa_def *src2);
92 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
93 nir_ssa_def *src2, nir_ssa_def *src3);
94
95 bool supports_std430;
96
97 nir_shader *shader;
98 nir_function_impl *impl;
99 nir_builder b;
100 nir_ssa_def *result; /* result of the expression tree last visited */
101
102 nir_deref_instr *evaluate_deref(ir_instruction *ir);
103
104 nir_constant *constant_copy(ir_constant *ir, void *mem_ctx);
105
106 /* most recent deref instruction created */
107 nir_deref_instr *deref;
108
109 /* whether the IR we're operating on is per-function or global */
110 bool is_global;
111
112 ir_function_signature *sig;
113
114 /* map of ir_variable -> nir_variable */
115 struct hash_table *var_table;
116
117 /* map of ir_function_signature -> nir_function_overload */
118 struct hash_table *overload_table;
119 };
120
121 /*
122 * This visitor runs before the main visitor, calling create_function() for
123 * each function so that the main visitor can resolve forward references in
124 * calls.
125 */
126
127 class nir_function_visitor : public ir_hierarchical_visitor
128 {
129 public:
130 nir_function_visitor(nir_visitor *v) : visitor(v)
131 {
132 }
133 virtual ir_visitor_status visit_enter(ir_function *);
134
135 private:
136 nir_visitor *visitor;
137 };
138
139 /* glsl_to_nir can only handle converting certain function paramaters
140 * to NIR. This visitor checks for parameters it can't currently handle.
141 */
142 class ir_function_param_visitor : public ir_hierarchical_visitor
143 {
144 public:
145 ir_function_param_visitor()
146 : unsupported(false)
147 {
148 }
149
150 virtual ir_visitor_status visit_enter(ir_function_signature *ir)
151 {
152
153 if (ir->is_intrinsic())
154 return visit_continue;
155
156 foreach_in_list(ir_variable, param, &ir->parameters) {
157 if (!param->type->is_vector() || !param->type->is_scalar()) {
158 unsupported = true;
159 return visit_stop;
160 }
161
162 if (param->data.mode == ir_var_function_inout) {
163 unsupported = true;
164 return visit_stop;
165 }
166 }
167
168 return visit_continue;
169 }
170
171 bool unsupported;
172 };
173
174 } /* end of anonymous namespace */
175
176
177 static bool
178 has_unsupported_function_param(exec_list *ir)
179 {
180 ir_function_param_visitor visitor;
181 visit_list_elements(&visitor, ir);
182 return visitor.unsupported;
183 }
184
185 nir_shader *
186 glsl_to_nir(struct gl_context *ctx,
187 const struct gl_shader_program *shader_prog,
188 gl_shader_stage stage,
189 const nir_shader_compiler_options *options)
190 {
191 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
192
193 const struct gl_shader_compiler_options *gl_options =
194 &ctx->Const.ShaderCompilerOptions[stage];
195
196 /* glsl_to_nir can only handle converting certain function paramaters
197 * to NIR. If we find something we can't handle then we get the GLSL IR
198 * opts to remove it before we continue on.
199 *
200 * TODO: add missing glsl ir to nir support and remove this loop.
201 */
202 while (has_unsupported_function_param(sh->ir)) {
203 do_common_optimization(sh->ir, true, true, gl_options,
204 ctx->Const.NativeIntegers);
205 }
206
207 nir_shader *shader = nir_shader_create(NULL, stage, options,
208 &sh->Program->info);
209
210 nir_visitor v1(ctx, shader);
211 nir_function_visitor v2(&v1);
212 v2.run(sh->ir);
213 visit_exec_list(sh->ir, &v1);
214
215 nir_validate_shader(shader, "after glsl to nir, before function inline");
216
217 /* We have to lower away local constant initializers right before we
218 * inline functions. That way they get properly initialized at the top
219 * of the function and not at the top of its caller.
220 */
221 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
222 nir_lower_returns(shader);
223 nir_inline_functions(shader);
224 nir_opt_deref(shader);
225
226 nir_validate_shader(shader, "after function inlining and return lowering");
227
228 /* Now that we have inlined everything remove all of the functions except
229 * main().
230 */
231 foreach_list_typed_safe(nir_function, function, node, &(shader)->functions){
232 if (strcmp("main", function->name) != 0) {
233 exec_node_remove(&function->node);
234 }
235 }
236
237 /* Remap the locations to slots so those requiring two slots will occupy
238 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
239 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
240 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
241 if (shader->info.stage == MESA_SHADER_VERTEX)
242 nir_remap_dual_slot_attributes(shader, &sh->Program->DualSlotInputs);
243
244 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
245 if (shader_prog->Label)
246 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
247
248 /* Check for transform feedback varyings specified via the API */
249 shader->info.has_transform_feedback_varyings =
250 shader_prog->TransformFeedback.NumVarying > 0;
251
252 /* Check for transform feedback varyings specified in the Shader */
253 if (shader_prog->last_vert_prog)
254 shader->info.has_transform_feedback_varyings |=
255 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
256
257 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
258 shader->info.fs.pixel_center_integer = sh->Program->info.fs.pixel_center_integer;
259 shader->info.fs.origin_upper_left = sh->Program->info.fs.origin_upper_left;
260 }
261
262 return shader;
263 }
264
265 nir_visitor::nir_visitor(gl_context *ctx, nir_shader *shader)
266 {
267 this->supports_std430 = ctx->Const.UseSTD430AsDefaultPacking;
268 this->shader = shader;
269 this->is_global = true;
270 this->var_table = _mesa_pointer_hash_table_create(NULL);
271 this->overload_table = _mesa_pointer_hash_table_create(NULL);
272 this->result = NULL;
273 this->impl = NULL;
274 this->deref = NULL;
275 this->sig = NULL;
276 memset(&this->b, 0, sizeof(this->b));
277 }
278
279 nir_visitor::~nir_visitor()
280 {
281 _mesa_hash_table_destroy(this->var_table, NULL);
282 _mesa_hash_table_destroy(this->overload_table, NULL);
283 }
284
285 nir_deref_instr *
286 nir_visitor::evaluate_deref(ir_instruction *ir)
287 {
288 ir->accept(this);
289 return this->deref;
290 }
291
292 nir_constant *
293 nir_visitor::constant_copy(ir_constant *ir, void *mem_ctx)
294 {
295 if (ir == NULL)
296 return NULL;
297
298 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
299
300 const unsigned rows = ir->type->vector_elements;
301 const unsigned cols = ir->type->matrix_columns;
302 unsigned i;
303
304 ret->num_elements = 0;
305 switch (ir->type->base_type) {
306 case GLSL_TYPE_UINT:
307 /* Only float base types can be matrices. */
308 assert(cols == 1);
309
310 for (unsigned r = 0; r < rows; r++)
311 ret->values[r].u32 = ir->value.u[r];
312
313 break;
314
315 case GLSL_TYPE_INT:
316 /* Only float base types can be matrices. */
317 assert(cols == 1);
318
319 for (unsigned r = 0; r < rows; r++)
320 ret->values[r].i32 = ir->value.i[r];
321
322 break;
323
324 case GLSL_TYPE_FLOAT:
325 case GLSL_TYPE_DOUBLE:
326 if (cols > 1) {
327 ret->elements = ralloc_array(mem_ctx, nir_constant *, cols);
328 ret->num_elements = cols;
329 for (unsigned c = 0; c < cols; c++) {
330 nir_constant *col_const = rzalloc(mem_ctx, nir_constant);
331 col_const->num_elements = 0;
332 switch (ir->type->base_type) {
333 case GLSL_TYPE_FLOAT:
334 for (unsigned r = 0; r < rows; r++)
335 col_const->values[r].f32 = ir->value.f[c * rows + r];
336 break;
337
338 case GLSL_TYPE_DOUBLE:
339 for (unsigned r = 0; r < rows; r++)
340 col_const->values[r].f64 = ir->value.d[c * rows + r];
341 break;
342
343 default:
344 unreachable("Cannot get here from the first level switch");
345 }
346 ret->elements[c] = col_const;
347 }
348 } else {
349 switch (ir->type->base_type) {
350 case GLSL_TYPE_FLOAT:
351 for (unsigned r = 0; r < rows; r++)
352 ret->values[r].f32 = ir->value.f[r];
353 break;
354
355 case GLSL_TYPE_DOUBLE:
356 for (unsigned r = 0; r < rows; r++)
357 ret->values[r].f64 = ir->value.d[r];
358 break;
359
360 default:
361 unreachable("Cannot get here from the first level switch");
362 }
363 }
364 break;
365
366 case GLSL_TYPE_UINT64:
367 /* Only float base types can be matrices. */
368 assert(cols == 1);
369
370 for (unsigned r = 0; r < rows; r++)
371 ret->values[r].u64 = ir->value.u64[r];
372 break;
373
374 case GLSL_TYPE_INT64:
375 /* Only float base types can be matrices. */
376 assert(cols == 1);
377
378 for (unsigned r = 0; r < rows; r++)
379 ret->values[r].i64 = ir->value.i64[r];
380 break;
381
382 case GLSL_TYPE_BOOL:
383 /* Only float base types can be matrices. */
384 assert(cols == 1);
385
386 for (unsigned r = 0; r < rows; r++)
387 ret->values[r].b = ir->value.b[r];
388
389 break;
390
391 case GLSL_TYPE_STRUCT:
392 case GLSL_TYPE_ARRAY:
393 ret->elements = ralloc_array(mem_ctx, nir_constant *,
394 ir->type->length);
395 ret->num_elements = ir->type->length;
396
397 for (i = 0; i < ir->type->length; i++)
398 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
399 break;
400
401 default:
402 unreachable("not reached");
403 }
404
405 return ret;
406 }
407
408 static const glsl_type *
409 wrap_type_in_array(const glsl_type *elem_type, const glsl_type *array_type)
410 {
411 if (!array_type->is_array())
412 return elem_type;
413
414 elem_type = wrap_type_in_array(elem_type, array_type->fields.array);
415
416 return glsl_type::get_array_instance(elem_type, array_type->length);
417 }
418
419 void
420 nir_visitor::visit(ir_variable *ir)
421 {
422 /* TODO: In future we should switch to using the NIR lowering pass but for
423 * now just ignore these variables as GLSL IR should have lowered them.
424 * Anything remaining are just dead vars that weren't cleaned up.
425 */
426 if (ir->data.mode == ir_var_shader_shared)
427 return;
428
429 /* FINISHME: inout parameters */
430 assert(ir->data.mode != ir_var_function_inout);
431
432 if (ir->data.mode == ir_var_function_out)
433 return;
434
435 nir_variable *var = rzalloc(shader, nir_variable);
436 var->type = ir->type;
437 var->name = ralloc_strdup(var, ir->name);
438
439 var->data.always_active_io = ir->data.always_active_io;
440 var->data.read_only = ir->data.read_only;
441 var->data.centroid = ir->data.centroid;
442 var->data.sample = ir->data.sample;
443 var->data.patch = ir->data.patch;
444 var->data.invariant = ir->data.invariant;
445 var->data.location = ir->data.location;
446 var->data.stream = ir->data.stream;
447 var->data.compact = false;
448
449 switch(ir->data.mode) {
450 case ir_var_auto:
451 case ir_var_temporary:
452 if (is_global)
453 var->data.mode = nir_var_shader_temp;
454 else
455 var->data.mode = nir_var_function_temp;
456 break;
457
458 case ir_var_function_in:
459 case ir_var_const_in:
460 var->data.mode = nir_var_function_temp;
461 break;
462
463 case ir_var_shader_in:
464 if (shader->info.stage == MESA_SHADER_GEOMETRY &&
465 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
466 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
467 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
468 var->data.mode = nir_var_system_value;
469 } else {
470 var->data.mode = nir_var_shader_in;
471
472 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
473 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
474 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
475 var->data.compact = ir->type->without_array()->is_scalar();
476 }
477
478 if (shader->info.stage > MESA_SHADER_VERTEX &&
479 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
480 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
481 var->data.compact = ir->type->without_array()->is_scalar();
482 }
483 }
484 break;
485
486 case ir_var_shader_out:
487 var->data.mode = nir_var_shader_out;
488 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
489 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
490 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
491 var->data.compact = ir->type->without_array()->is_scalar();
492 }
493
494 if (shader->info.stage <= MESA_SHADER_GEOMETRY &&
495 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
496 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
497 var->data.compact = ir->type->without_array()->is_scalar();
498 }
499 break;
500
501 case ir_var_uniform:
502 if (ir->get_interface_type())
503 var->data.mode = nir_var_mem_ubo;
504 else
505 var->data.mode = nir_var_uniform;
506 break;
507
508 case ir_var_shader_storage:
509 var->data.mode = nir_var_mem_ssbo;
510 break;
511
512 case ir_var_system_value:
513 var->data.mode = nir_var_system_value;
514 break;
515
516 default:
517 unreachable("not reached");
518 }
519
520 unsigned image_access = 0;
521 if (ir->data.memory_read_only)
522 image_access |= ACCESS_NON_WRITEABLE;
523 if (ir->data.memory_write_only)
524 image_access |= ACCESS_NON_READABLE;
525 if (ir->data.memory_coherent)
526 image_access |= ACCESS_COHERENT;
527 if (ir->data.memory_volatile)
528 image_access |= ACCESS_VOLATILE;
529 if (ir->data.memory_restrict)
530 image_access |= ACCESS_RESTRICT;
531
532 /* For UBO and SSBO variables, we need explicit types */
533 if (var->data.mode & (nir_var_mem_ubo | nir_var_mem_ssbo)) {
534 const glsl_type *explicit_ifc_type =
535 ir->get_interface_type()->get_explicit_interface_type(supports_std430);
536
537 if (ir->type->without_array()->is_interface()) {
538 /* If the type contains the interface, wrap the explicit type in the
539 * right number of arrays.
540 */
541 var->type = wrap_type_in_array(explicit_ifc_type, ir->type);
542 } else {
543 /* Otherwise, this variable is one entry in the interface */
544 UNUSED bool found = false;
545 for (unsigned i = 0; i < explicit_ifc_type->length; i++) {
546 const glsl_struct_field *field =
547 &explicit_ifc_type->fields.structure[i];
548 if (strcmp(ir->name, field->name) != 0)
549 continue;
550
551 var->type = field->type;
552 if (field->memory_read_only)
553 image_access |= ACCESS_NON_WRITEABLE;
554 if (field->memory_write_only)
555 image_access |= ACCESS_NON_READABLE;
556 if (field->memory_coherent)
557 image_access |= ACCESS_COHERENT;
558 if (field->memory_volatile)
559 image_access |= ACCESS_VOLATILE;
560 if (field->memory_restrict)
561 image_access |= ACCESS_RESTRICT;
562
563 found = true;
564 break;
565 }
566 assert(found);
567 }
568 }
569
570 var->data.interpolation = ir->data.interpolation;
571 var->data.location_frac = ir->data.location_frac;
572
573 switch (ir->data.depth_layout) {
574 case ir_depth_layout_none:
575 var->data.depth_layout = nir_depth_layout_none;
576 break;
577 case ir_depth_layout_any:
578 var->data.depth_layout = nir_depth_layout_any;
579 break;
580 case ir_depth_layout_greater:
581 var->data.depth_layout = nir_depth_layout_greater;
582 break;
583 case ir_depth_layout_less:
584 var->data.depth_layout = nir_depth_layout_less;
585 break;
586 case ir_depth_layout_unchanged:
587 var->data.depth_layout = nir_depth_layout_unchanged;
588 break;
589 default:
590 unreachable("not reached");
591 }
592
593 var->data.index = ir->data.index;
594 var->data.descriptor_set = 0;
595 var->data.binding = ir->data.binding;
596 var->data.explicit_binding = ir->data.explicit_binding;
597 var->data.bindless = ir->data.bindless;
598 var->data.offset = ir->data.offset;
599
600 var->data.image.access = (gl_access_qualifier)image_access;
601 var->data.image.format = ir->data.image_format;
602
603 var->data.fb_fetch_output = ir->data.fb_fetch_output;
604 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
605 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
606 var->data.xfb_buffer = ir->data.xfb_buffer;
607 var->data.xfb_stride = ir->data.xfb_stride;
608
609 var->num_state_slots = ir->get_num_state_slots();
610 if (var->num_state_slots > 0) {
611 var->state_slots = rzalloc_array(var, nir_state_slot,
612 var->num_state_slots);
613
614 ir_state_slot *state_slots = ir->get_state_slots();
615 for (unsigned i = 0; i < var->num_state_slots; i++) {
616 for (unsigned j = 0; j < 5; j++)
617 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
618 var->state_slots[i].swizzle = state_slots[i].swizzle;
619 }
620 } else {
621 var->state_slots = NULL;
622 }
623
624 var->constant_initializer = constant_copy(ir->constant_initializer, var);
625
626 var->interface_type = ir->get_interface_type();
627
628 if (var->data.mode == nir_var_function_temp)
629 nir_function_impl_add_variable(impl, var);
630 else
631 nir_shader_add_variable(shader, var);
632
633 _mesa_hash_table_insert(var_table, ir, var);
634 }
635
636 ir_visitor_status
637 nir_function_visitor::visit_enter(ir_function *ir)
638 {
639 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
640 visitor->create_function(sig);
641 }
642 return visit_continue_with_parent;
643 }
644
645 void
646 nir_visitor::create_function(ir_function_signature *ir)
647 {
648 if (ir->is_intrinsic())
649 return;
650
651 nir_function *func = nir_function_create(shader, ir->function_name());
652 if (strcmp(ir->function_name(), "main") == 0)
653 func->is_entrypoint = true;
654
655 func->num_params = ir->parameters.length() +
656 (ir->return_type != glsl_type::void_type);
657 func->params = ralloc_array(shader, nir_parameter, func->num_params);
658
659 unsigned np = 0;
660
661 if (ir->return_type != glsl_type::void_type) {
662 /* The return value is a variable deref (basically an out parameter) */
663 func->params[np].num_components = 1;
664 func->params[np].bit_size = 32;
665 np++;
666 }
667
668 foreach_in_list(ir_variable, param, &ir->parameters) {
669 /* FINISHME: pass arrays, structs, etc by reference? */
670 assert(param->type->is_vector() || param->type->is_scalar());
671
672 if (param->data.mode == ir_var_function_in) {
673 func->params[np].num_components = param->type->vector_elements;
674 func->params[np].bit_size = glsl_get_bit_size(param->type);
675 } else {
676 func->params[np].num_components = 1;
677 func->params[np].bit_size = 32;
678 }
679 np++;
680 }
681 assert(np == func->num_params);
682
683 _mesa_hash_table_insert(this->overload_table, ir, func);
684 }
685
686 void
687 nir_visitor::visit(ir_function *ir)
688 {
689 foreach_in_list(ir_function_signature, sig, &ir->signatures)
690 sig->accept(this);
691 }
692
693 void
694 nir_visitor::visit(ir_function_signature *ir)
695 {
696 if (ir->is_intrinsic())
697 return;
698
699 this->sig = ir;
700
701 struct hash_entry *entry =
702 _mesa_hash_table_search(this->overload_table, ir);
703
704 assert(entry);
705 nir_function *func = (nir_function *) entry->data;
706
707 if (ir->is_defined) {
708 nir_function_impl *impl = nir_function_impl_create(func);
709 this->impl = impl;
710
711 this->is_global = false;
712
713 nir_builder_init(&b, impl);
714 b.cursor = nir_after_cf_list(&impl->body);
715
716 unsigned i = (ir->return_type != glsl_type::void_type) ? 1 : 0;
717
718 foreach_in_list(ir_variable, param, &ir->parameters) {
719 nir_variable *var =
720 nir_local_variable_create(impl, param->type, param->name);
721
722 if (param->data.mode == ir_var_function_in) {
723 nir_store_var(&b, var, nir_load_param(&b, i), ~0);
724 }
725
726 _mesa_hash_table_insert(var_table, param, var);
727 i++;
728 }
729
730 visit_exec_list(&ir->body, this);
731
732 this->is_global = true;
733 } else {
734 func->impl = NULL;
735 }
736 }
737
738 void
739 nir_visitor::visit(ir_loop *ir)
740 {
741 nir_push_loop(&b);
742 visit_exec_list(&ir->body_instructions, this);
743 nir_pop_loop(&b, NULL);
744 }
745
746 void
747 nir_visitor::visit(ir_if *ir)
748 {
749 nir_push_if(&b, evaluate_rvalue(ir->condition));
750 visit_exec_list(&ir->then_instructions, this);
751 nir_push_else(&b, NULL);
752 visit_exec_list(&ir->else_instructions, this);
753 nir_pop_if(&b, NULL);
754 }
755
756 void
757 nir_visitor::visit(ir_discard *ir)
758 {
759 /*
760 * discards aren't treated as control flow, because before we lower them
761 * they can appear anywhere in the shader and the stuff after them may still
762 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
763 * discards will be immediately followed by a return.
764 */
765
766 nir_intrinsic_instr *discard;
767 if (ir->condition) {
768 discard = nir_intrinsic_instr_create(this->shader,
769 nir_intrinsic_discard_if);
770 discard->src[0] =
771 nir_src_for_ssa(evaluate_rvalue(ir->condition));
772 } else {
773 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
774 }
775
776 nir_builder_instr_insert(&b, &discard->instr);
777 }
778
779 void
780 nir_visitor::visit(ir_demote *ir)
781 {
782 nir_intrinsic_instr *demote =
783 nir_intrinsic_instr_create(this->shader, nir_intrinsic_demote);
784
785 nir_builder_instr_insert(&b, &demote->instr);
786 }
787
788 void
789 nir_visitor::visit(ir_emit_vertex *ir)
790 {
791 nir_intrinsic_instr *instr =
792 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
793 nir_intrinsic_set_stream_id(instr, ir->stream_id());
794 nir_builder_instr_insert(&b, &instr->instr);
795 }
796
797 void
798 nir_visitor::visit(ir_end_primitive *ir)
799 {
800 nir_intrinsic_instr *instr =
801 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
802 nir_intrinsic_set_stream_id(instr, ir->stream_id());
803 nir_builder_instr_insert(&b, &instr->instr);
804 }
805
806 void
807 nir_visitor::visit(ir_loop_jump *ir)
808 {
809 nir_jump_type type;
810 switch (ir->mode) {
811 case ir_loop_jump::jump_break:
812 type = nir_jump_break;
813 break;
814 case ir_loop_jump::jump_continue:
815 type = nir_jump_continue;
816 break;
817 default:
818 unreachable("not reached");
819 }
820
821 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
822 nir_builder_instr_insert(&b, &instr->instr);
823 }
824
825 void
826 nir_visitor::visit(ir_return *ir)
827 {
828 if (ir->value != NULL) {
829 nir_deref_instr *ret_deref =
830 nir_build_deref_cast(&b, nir_load_param(&b, 0),
831 nir_var_function_temp, ir->value->type, 0);
832
833 nir_ssa_def *val = evaluate_rvalue(ir->value);
834 nir_store_deref(&b, ret_deref, val, ~0);
835 }
836
837 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
838 nir_builder_instr_insert(&b, &instr->instr);
839 }
840
841 static void
842 intrinsic_set_std430_align(nir_intrinsic_instr *intrin, const glsl_type *type)
843 {
844 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
845 unsigned pow2_components = util_next_power_of_two(type->vector_elements);
846 nir_intrinsic_set_align(intrin, (bit_size / 8) * pow2_components, 0);
847 }
848
849 /* Accumulate any qualifiers along the deref chain to get the actual
850 * load/store qualifier.
851 */
852
853 static enum gl_access_qualifier
854 deref_get_qualifier(nir_deref_instr *deref)
855 {
856 nir_deref_path path;
857 nir_deref_path_init(&path, deref, NULL);
858
859 unsigned qualifiers = path.path[0]->var->data.image.access;
860
861 const glsl_type *parent_type = path.path[0]->type;
862 for (nir_deref_instr **cur_ptr = &path.path[1]; *cur_ptr; cur_ptr++) {
863 nir_deref_instr *cur = *cur_ptr;
864
865 if (parent_type->is_interface()) {
866 const struct glsl_struct_field *field =
867 &parent_type->fields.structure[cur->strct.index];
868 if (field->memory_read_only)
869 qualifiers |= ACCESS_NON_WRITEABLE;
870 if (field->memory_write_only)
871 qualifiers |= ACCESS_NON_READABLE;
872 if (field->memory_coherent)
873 qualifiers |= ACCESS_COHERENT;
874 if (field->memory_volatile)
875 qualifiers |= ACCESS_VOLATILE;
876 if (field->memory_restrict)
877 qualifiers |= ACCESS_RESTRICT;
878 }
879
880 parent_type = cur->type;
881 }
882
883 nir_deref_path_finish(&path);
884
885 return (gl_access_qualifier) qualifiers;
886 }
887
888 void
889 nir_visitor::visit(ir_call *ir)
890 {
891 if (ir->callee->is_intrinsic()) {
892 nir_intrinsic_op op;
893
894 switch (ir->callee->intrinsic_id) {
895 case ir_intrinsic_generic_atomic_add:
896 op = ir->return_deref->type->is_integer_32_64()
897 ? nir_intrinsic_deref_atomic_add : nir_intrinsic_deref_atomic_fadd;
898 break;
899 case ir_intrinsic_generic_atomic_and:
900 op = nir_intrinsic_deref_atomic_and;
901 break;
902 case ir_intrinsic_generic_atomic_or:
903 op = nir_intrinsic_deref_atomic_or;
904 break;
905 case ir_intrinsic_generic_atomic_xor:
906 op = nir_intrinsic_deref_atomic_xor;
907 break;
908 case ir_intrinsic_generic_atomic_min:
909 assert(ir->return_deref);
910 if (ir->return_deref->type == glsl_type::int_type)
911 op = nir_intrinsic_deref_atomic_imin;
912 else if (ir->return_deref->type == glsl_type::uint_type)
913 op = nir_intrinsic_deref_atomic_umin;
914 else if (ir->return_deref->type == glsl_type::float_type)
915 op = nir_intrinsic_deref_atomic_fmin;
916 else
917 unreachable("Invalid type");
918 break;
919 case ir_intrinsic_generic_atomic_max:
920 assert(ir->return_deref);
921 if (ir->return_deref->type == glsl_type::int_type)
922 op = nir_intrinsic_deref_atomic_imax;
923 else if (ir->return_deref->type == glsl_type::uint_type)
924 op = nir_intrinsic_deref_atomic_umax;
925 else if (ir->return_deref->type == glsl_type::float_type)
926 op = nir_intrinsic_deref_atomic_fmax;
927 else
928 unreachable("Invalid type");
929 break;
930 case ir_intrinsic_generic_atomic_exchange:
931 op = nir_intrinsic_deref_atomic_exchange;
932 break;
933 case ir_intrinsic_generic_atomic_comp_swap:
934 op = ir->return_deref->type->is_integer_32_64()
935 ? nir_intrinsic_deref_atomic_comp_swap
936 : nir_intrinsic_deref_atomic_fcomp_swap;
937 break;
938 case ir_intrinsic_atomic_counter_read:
939 op = nir_intrinsic_atomic_counter_read_deref;
940 break;
941 case ir_intrinsic_atomic_counter_increment:
942 op = nir_intrinsic_atomic_counter_inc_deref;
943 break;
944 case ir_intrinsic_atomic_counter_predecrement:
945 op = nir_intrinsic_atomic_counter_pre_dec_deref;
946 break;
947 case ir_intrinsic_atomic_counter_add:
948 op = nir_intrinsic_atomic_counter_add_deref;
949 break;
950 case ir_intrinsic_atomic_counter_and:
951 op = nir_intrinsic_atomic_counter_and_deref;
952 break;
953 case ir_intrinsic_atomic_counter_or:
954 op = nir_intrinsic_atomic_counter_or_deref;
955 break;
956 case ir_intrinsic_atomic_counter_xor:
957 op = nir_intrinsic_atomic_counter_xor_deref;
958 break;
959 case ir_intrinsic_atomic_counter_min:
960 op = nir_intrinsic_atomic_counter_min_deref;
961 break;
962 case ir_intrinsic_atomic_counter_max:
963 op = nir_intrinsic_atomic_counter_max_deref;
964 break;
965 case ir_intrinsic_atomic_counter_exchange:
966 op = nir_intrinsic_atomic_counter_exchange_deref;
967 break;
968 case ir_intrinsic_atomic_counter_comp_swap:
969 op = nir_intrinsic_atomic_counter_comp_swap_deref;
970 break;
971 case ir_intrinsic_image_load:
972 op = nir_intrinsic_image_deref_load;
973 break;
974 case ir_intrinsic_image_store:
975 op = nir_intrinsic_image_deref_store;
976 break;
977 case ir_intrinsic_image_atomic_add:
978 op = ir->return_deref->type->is_integer_32_64()
979 ? nir_intrinsic_image_deref_atomic_add
980 : nir_intrinsic_image_deref_atomic_fadd;
981 break;
982 case ir_intrinsic_image_atomic_min:
983 if (ir->return_deref->type == glsl_type::int_type)
984 op = nir_intrinsic_image_deref_atomic_imin;
985 else if (ir->return_deref->type == glsl_type::uint_type)
986 op = nir_intrinsic_image_deref_atomic_umin;
987 else
988 unreachable("Invalid type");
989 break;
990 case ir_intrinsic_image_atomic_max:
991 if (ir->return_deref->type == glsl_type::int_type)
992 op = nir_intrinsic_image_deref_atomic_imax;
993 else if (ir->return_deref->type == glsl_type::uint_type)
994 op = nir_intrinsic_image_deref_atomic_umax;
995 else
996 unreachable("Invalid type");
997 break;
998 case ir_intrinsic_image_atomic_and:
999 op = nir_intrinsic_image_deref_atomic_and;
1000 break;
1001 case ir_intrinsic_image_atomic_or:
1002 op = nir_intrinsic_image_deref_atomic_or;
1003 break;
1004 case ir_intrinsic_image_atomic_xor:
1005 op = nir_intrinsic_image_deref_atomic_xor;
1006 break;
1007 case ir_intrinsic_image_atomic_exchange:
1008 op = nir_intrinsic_image_deref_atomic_exchange;
1009 break;
1010 case ir_intrinsic_image_atomic_comp_swap:
1011 op = nir_intrinsic_image_deref_atomic_comp_swap;
1012 break;
1013 case ir_intrinsic_image_atomic_inc_wrap:
1014 op = nir_intrinsic_image_deref_atomic_inc_wrap;
1015 break;
1016 case ir_intrinsic_image_atomic_dec_wrap:
1017 op = nir_intrinsic_image_deref_atomic_dec_wrap;
1018 break;
1019 case ir_intrinsic_memory_barrier:
1020 op = nir_intrinsic_memory_barrier;
1021 break;
1022 case ir_intrinsic_image_size:
1023 op = nir_intrinsic_image_deref_size;
1024 break;
1025 case ir_intrinsic_image_samples:
1026 op = nir_intrinsic_image_deref_samples;
1027 break;
1028 case ir_intrinsic_ssbo_store:
1029 op = nir_intrinsic_store_ssbo;
1030 break;
1031 case ir_intrinsic_ssbo_load:
1032 op = nir_intrinsic_load_ssbo;
1033 break;
1034 case ir_intrinsic_ssbo_atomic_add:
1035 op = ir->return_deref->type->is_integer_32_64()
1036 ? nir_intrinsic_ssbo_atomic_add : nir_intrinsic_ssbo_atomic_fadd;
1037 break;
1038 case ir_intrinsic_ssbo_atomic_and:
1039 op = nir_intrinsic_ssbo_atomic_and;
1040 break;
1041 case ir_intrinsic_ssbo_atomic_or:
1042 op = nir_intrinsic_ssbo_atomic_or;
1043 break;
1044 case ir_intrinsic_ssbo_atomic_xor:
1045 op = nir_intrinsic_ssbo_atomic_xor;
1046 break;
1047 case ir_intrinsic_ssbo_atomic_min:
1048 assert(ir->return_deref);
1049 if (ir->return_deref->type == glsl_type::int_type)
1050 op = nir_intrinsic_ssbo_atomic_imin;
1051 else if (ir->return_deref->type == glsl_type::uint_type)
1052 op = nir_intrinsic_ssbo_atomic_umin;
1053 else if (ir->return_deref->type == glsl_type::float_type)
1054 op = nir_intrinsic_ssbo_atomic_fmin;
1055 else
1056 unreachable("Invalid type");
1057 break;
1058 case ir_intrinsic_ssbo_atomic_max:
1059 assert(ir->return_deref);
1060 if (ir->return_deref->type == glsl_type::int_type)
1061 op = nir_intrinsic_ssbo_atomic_imax;
1062 else if (ir->return_deref->type == glsl_type::uint_type)
1063 op = nir_intrinsic_ssbo_atomic_umax;
1064 else if (ir->return_deref->type == glsl_type::float_type)
1065 op = nir_intrinsic_ssbo_atomic_fmax;
1066 else
1067 unreachable("Invalid type");
1068 break;
1069 case ir_intrinsic_ssbo_atomic_exchange:
1070 op = nir_intrinsic_ssbo_atomic_exchange;
1071 break;
1072 case ir_intrinsic_ssbo_atomic_comp_swap:
1073 op = ir->return_deref->type->is_integer_32_64()
1074 ? nir_intrinsic_ssbo_atomic_comp_swap
1075 : nir_intrinsic_ssbo_atomic_fcomp_swap;
1076 break;
1077 case ir_intrinsic_shader_clock:
1078 op = nir_intrinsic_shader_clock;
1079 break;
1080 case ir_intrinsic_begin_invocation_interlock:
1081 op = nir_intrinsic_begin_invocation_interlock;
1082 break;
1083 case ir_intrinsic_end_invocation_interlock:
1084 op = nir_intrinsic_end_invocation_interlock;
1085 break;
1086 case ir_intrinsic_group_memory_barrier:
1087 op = nir_intrinsic_group_memory_barrier;
1088 break;
1089 case ir_intrinsic_memory_barrier_atomic_counter:
1090 op = nir_intrinsic_memory_barrier_atomic_counter;
1091 break;
1092 case ir_intrinsic_memory_barrier_buffer:
1093 op = nir_intrinsic_memory_barrier_buffer;
1094 break;
1095 case ir_intrinsic_memory_barrier_image:
1096 op = nir_intrinsic_memory_barrier_image;
1097 break;
1098 case ir_intrinsic_memory_barrier_shared:
1099 op = nir_intrinsic_memory_barrier_shared;
1100 break;
1101 case ir_intrinsic_shared_load:
1102 op = nir_intrinsic_load_shared;
1103 break;
1104 case ir_intrinsic_shared_store:
1105 op = nir_intrinsic_store_shared;
1106 break;
1107 case ir_intrinsic_shared_atomic_add:
1108 op = ir->return_deref->type->is_integer_32_64()
1109 ? nir_intrinsic_shared_atomic_add
1110 : nir_intrinsic_shared_atomic_fadd;
1111 break;
1112 case ir_intrinsic_shared_atomic_and:
1113 op = nir_intrinsic_shared_atomic_and;
1114 break;
1115 case ir_intrinsic_shared_atomic_or:
1116 op = nir_intrinsic_shared_atomic_or;
1117 break;
1118 case ir_intrinsic_shared_atomic_xor:
1119 op = nir_intrinsic_shared_atomic_xor;
1120 break;
1121 case ir_intrinsic_shared_atomic_min:
1122 assert(ir->return_deref);
1123 if (ir->return_deref->type == glsl_type::int_type)
1124 op = nir_intrinsic_shared_atomic_imin;
1125 else if (ir->return_deref->type == glsl_type::uint_type)
1126 op = nir_intrinsic_shared_atomic_umin;
1127 else if (ir->return_deref->type == glsl_type::float_type)
1128 op = nir_intrinsic_shared_atomic_fmin;
1129 else
1130 unreachable("Invalid type");
1131 break;
1132 case ir_intrinsic_shared_atomic_max:
1133 assert(ir->return_deref);
1134 if (ir->return_deref->type == glsl_type::int_type)
1135 op = nir_intrinsic_shared_atomic_imax;
1136 else if (ir->return_deref->type == glsl_type::uint_type)
1137 op = nir_intrinsic_shared_atomic_umax;
1138 else if (ir->return_deref->type == glsl_type::float_type)
1139 op = nir_intrinsic_shared_atomic_fmax;
1140 else
1141 unreachable("Invalid type");
1142 break;
1143 case ir_intrinsic_shared_atomic_exchange:
1144 op = nir_intrinsic_shared_atomic_exchange;
1145 break;
1146 case ir_intrinsic_shared_atomic_comp_swap:
1147 op = ir->return_deref->type->is_integer_32_64()
1148 ? nir_intrinsic_shared_atomic_comp_swap
1149 : nir_intrinsic_shared_atomic_fcomp_swap;
1150 break;
1151 case ir_intrinsic_vote_any:
1152 op = nir_intrinsic_vote_any;
1153 break;
1154 case ir_intrinsic_vote_all:
1155 op = nir_intrinsic_vote_all;
1156 break;
1157 case ir_intrinsic_vote_eq:
1158 op = nir_intrinsic_vote_ieq;
1159 break;
1160 case ir_intrinsic_ballot:
1161 op = nir_intrinsic_ballot;
1162 break;
1163 case ir_intrinsic_read_invocation:
1164 op = nir_intrinsic_read_invocation;
1165 break;
1166 case ir_intrinsic_read_first_invocation:
1167 op = nir_intrinsic_read_first_invocation;
1168 break;
1169 default:
1170 unreachable("not reached");
1171 }
1172
1173 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
1174 nir_ssa_def *ret = &instr->dest.ssa;
1175
1176 switch (op) {
1177 case nir_intrinsic_deref_atomic_add:
1178 case nir_intrinsic_deref_atomic_imin:
1179 case nir_intrinsic_deref_atomic_umin:
1180 case nir_intrinsic_deref_atomic_imax:
1181 case nir_intrinsic_deref_atomic_umax:
1182 case nir_intrinsic_deref_atomic_and:
1183 case nir_intrinsic_deref_atomic_or:
1184 case nir_intrinsic_deref_atomic_xor:
1185 case nir_intrinsic_deref_atomic_exchange:
1186 case nir_intrinsic_deref_atomic_comp_swap:
1187 case nir_intrinsic_deref_atomic_fadd:
1188 case nir_intrinsic_deref_atomic_fmin:
1189 case nir_intrinsic_deref_atomic_fmax:
1190 case nir_intrinsic_deref_atomic_fcomp_swap: {
1191 int param_count = ir->actual_parameters.length();
1192 assert(param_count == 2 || param_count == 3);
1193
1194 /* Deref */
1195 exec_node *param = ir->actual_parameters.get_head();
1196 ir_rvalue *rvalue = (ir_rvalue *) param;
1197 ir_dereference *deref = rvalue->as_dereference();
1198 ir_swizzle *swizzle = NULL;
1199 if (!deref) {
1200 /* We may have a swizzle to pick off a single vec4 component */
1201 swizzle = rvalue->as_swizzle();
1202 assert(swizzle && swizzle->type->vector_elements == 1);
1203 deref = swizzle->val->as_dereference();
1204 assert(deref);
1205 }
1206 nir_deref_instr *nir_deref = evaluate_deref(deref);
1207 if (swizzle) {
1208 nir_deref = nir_build_deref_array_imm(&b, nir_deref,
1209 swizzle->mask.x);
1210 }
1211 instr->src[0] = nir_src_for_ssa(&nir_deref->dest.ssa);
1212
1213 nir_intrinsic_set_access(instr, deref_get_qualifier(nir_deref));
1214
1215 /* data1 parameter (this is always present) */
1216 param = param->get_next();
1217 ir_instruction *inst = (ir_instruction *) param;
1218 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1219
1220 /* data2 parameter (only with atomic_comp_swap) */
1221 if (param_count == 3) {
1222 assert(op == nir_intrinsic_deref_atomic_comp_swap ||
1223 op == nir_intrinsic_deref_atomic_fcomp_swap);
1224 param = param->get_next();
1225 inst = (ir_instruction *) param;
1226 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1227 }
1228
1229 /* Atomic result */
1230 assert(ir->return_deref);
1231 nir_ssa_dest_init(&instr->instr, &instr->dest,
1232 ir->return_deref->type->vector_elements, 32, NULL);
1233 nir_builder_instr_insert(&b, &instr->instr);
1234 break;
1235 }
1236 case nir_intrinsic_atomic_counter_read_deref:
1237 case nir_intrinsic_atomic_counter_inc_deref:
1238 case nir_intrinsic_atomic_counter_pre_dec_deref:
1239 case nir_intrinsic_atomic_counter_add_deref:
1240 case nir_intrinsic_atomic_counter_min_deref:
1241 case nir_intrinsic_atomic_counter_max_deref:
1242 case nir_intrinsic_atomic_counter_and_deref:
1243 case nir_intrinsic_atomic_counter_or_deref:
1244 case nir_intrinsic_atomic_counter_xor_deref:
1245 case nir_intrinsic_atomic_counter_exchange_deref:
1246 case nir_intrinsic_atomic_counter_comp_swap_deref: {
1247 /* Set the counter variable dereference. */
1248 exec_node *param = ir->actual_parameters.get_head();
1249 ir_dereference *counter = (ir_dereference *)param;
1250
1251 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
1252 param = param->get_next();
1253
1254 /* Set the intrinsic destination. */
1255 if (ir->return_deref) {
1256 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1257 }
1258
1259 /* Set the intrinsic parameters. */
1260 if (!param->is_tail_sentinel()) {
1261 instr->src[1] =
1262 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1263 param = param->get_next();
1264 }
1265
1266 if (!param->is_tail_sentinel()) {
1267 instr->src[2] =
1268 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1269 param = param->get_next();
1270 }
1271
1272 nir_builder_instr_insert(&b, &instr->instr);
1273 break;
1274 }
1275 case nir_intrinsic_image_deref_load:
1276 case nir_intrinsic_image_deref_store:
1277 case nir_intrinsic_image_deref_atomic_add:
1278 case nir_intrinsic_image_deref_atomic_imin:
1279 case nir_intrinsic_image_deref_atomic_umin:
1280 case nir_intrinsic_image_deref_atomic_imax:
1281 case nir_intrinsic_image_deref_atomic_umax:
1282 case nir_intrinsic_image_deref_atomic_and:
1283 case nir_intrinsic_image_deref_atomic_or:
1284 case nir_intrinsic_image_deref_atomic_xor:
1285 case nir_intrinsic_image_deref_atomic_exchange:
1286 case nir_intrinsic_image_deref_atomic_comp_swap:
1287 case nir_intrinsic_image_deref_atomic_fadd:
1288 case nir_intrinsic_image_deref_samples:
1289 case nir_intrinsic_image_deref_size:
1290 case nir_intrinsic_image_deref_atomic_inc_wrap:
1291 case nir_intrinsic_image_deref_atomic_dec_wrap: {
1292 nir_ssa_undef_instr *instr_undef =
1293 nir_ssa_undef_instr_create(shader, 1, 32);
1294 nir_builder_instr_insert(&b, &instr_undef->instr);
1295
1296 /* Set the image variable dereference. */
1297 exec_node *param = ir->actual_parameters.get_head();
1298 ir_dereference *image = (ir_dereference *)param;
1299 nir_deref_instr *deref = evaluate_deref(image);
1300 const glsl_type *type = deref->type;
1301
1302 nir_intrinsic_set_access(instr, deref_get_qualifier(deref));
1303
1304 instr->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1305 param = param->get_next();
1306
1307 /* Set the intrinsic destination. */
1308 if (ir->return_deref) {
1309 unsigned num_components = ir->return_deref->type->vector_elements;
1310 nir_ssa_dest_init(&instr->instr, &instr->dest,
1311 num_components, 32, NULL);
1312 }
1313
1314 if (op == nir_intrinsic_image_deref_size) {
1315 instr->num_components = instr->dest.ssa.num_components;
1316 } else if (op == nir_intrinsic_image_deref_load ||
1317 op == nir_intrinsic_image_deref_store) {
1318 instr->num_components = 4;
1319 }
1320
1321 if (op == nir_intrinsic_image_deref_size ||
1322 op == nir_intrinsic_image_deref_samples) {
1323 nir_builder_instr_insert(&b, &instr->instr);
1324 break;
1325 }
1326
1327 /* Set the address argument, extending the coordinate vector to four
1328 * components.
1329 */
1330 nir_ssa_def *src_addr =
1331 evaluate_rvalue((ir_dereference *)param);
1332 nir_ssa_def *srcs[4];
1333
1334 for (int i = 0; i < 4; i++) {
1335 if (i < type->coordinate_components())
1336 srcs[i] = nir_channel(&b, src_addr, i);
1337 else
1338 srcs[i] = &instr_undef->def;
1339 }
1340
1341 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
1342 param = param->get_next();
1343
1344 /* Set the sample argument, which is undefined for single-sample
1345 * images.
1346 */
1347 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
1348 instr->src[2] =
1349 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1350 param = param->get_next();
1351 } else {
1352 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
1353 }
1354
1355 /* Set the intrinsic parameters. */
1356 if (!param->is_tail_sentinel()) {
1357 instr->src[3] =
1358 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1359 param = param->get_next();
1360 }
1361
1362 if (!param->is_tail_sentinel()) {
1363 instr->src[4] =
1364 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1365 param = param->get_next();
1366 }
1367 nir_builder_instr_insert(&b, &instr->instr);
1368 break;
1369 }
1370 case nir_intrinsic_memory_barrier:
1371 case nir_intrinsic_group_memory_barrier:
1372 case nir_intrinsic_memory_barrier_atomic_counter:
1373 case nir_intrinsic_memory_barrier_buffer:
1374 case nir_intrinsic_memory_barrier_image:
1375 case nir_intrinsic_memory_barrier_shared:
1376 nir_builder_instr_insert(&b, &instr->instr);
1377 break;
1378 case nir_intrinsic_shader_clock:
1379 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
1380 instr->num_components = 2;
1381 nir_builder_instr_insert(&b, &instr->instr);
1382 break;
1383 case nir_intrinsic_begin_invocation_interlock:
1384 nir_builder_instr_insert(&b, &instr->instr);
1385 break;
1386 case nir_intrinsic_end_invocation_interlock:
1387 nir_builder_instr_insert(&b, &instr->instr);
1388 break;
1389 case nir_intrinsic_store_ssbo: {
1390 exec_node *param = ir->actual_parameters.get_head();
1391 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1392
1393 param = param->get_next();
1394 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1395
1396 param = param->get_next();
1397 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1398
1399 param = param->get_next();
1400 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1401 assert(write_mask);
1402
1403 nir_ssa_def *nir_val = evaluate_rvalue(val);
1404 if (val->type->is_boolean())
1405 nir_val = nir_b2i32(&b, nir_val);
1406
1407 instr->src[0] = nir_src_for_ssa(nir_val);
1408 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1409 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1410 intrinsic_set_std430_align(instr, val->type);
1411 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1412 instr->num_components = val->type->vector_elements;
1413
1414 nir_builder_instr_insert(&b, &instr->instr);
1415 break;
1416 }
1417 case nir_intrinsic_load_ssbo: {
1418 exec_node *param = ir->actual_parameters.get_head();
1419 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1420
1421 param = param->get_next();
1422 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1423
1424 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1425 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1426
1427 const glsl_type *type = ir->return_deref->var->type;
1428 instr->num_components = type->vector_elements;
1429 intrinsic_set_std430_align(instr, type);
1430
1431 /* Setup destination register */
1432 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1433 nir_ssa_dest_init(&instr->instr, &instr->dest,
1434 type->vector_elements, bit_size, NULL);
1435
1436 /* Insert the created nir instruction now since in the case of boolean
1437 * result we will need to emit another instruction after it
1438 */
1439 nir_builder_instr_insert(&b, &instr->instr);
1440
1441 /*
1442 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1443 * consider a true boolean to be ~0. Fix this up with a != 0
1444 * comparison.
1445 */
1446 if (type->is_boolean())
1447 ret = nir_i2b(&b, &instr->dest.ssa);
1448 break;
1449 }
1450 case nir_intrinsic_ssbo_atomic_add:
1451 case nir_intrinsic_ssbo_atomic_imin:
1452 case nir_intrinsic_ssbo_atomic_umin:
1453 case nir_intrinsic_ssbo_atomic_imax:
1454 case nir_intrinsic_ssbo_atomic_umax:
1455 case nir_intrinsic_ssbo_atomic_and:
1456 case nir_intrinsic_ssbo_atomic_or:
1457 case nir_intrinsic_ssbo_atomic_xor:
1458 case nir_intrinsic_ssbo_atomic_exchange:
1459 case nir_intrinsic_ssbo_atomic_comp_swap:
1460 case nir_intrinsic_ssbo_atomic_fadd:
1461 case nir_intrinsic_ssbo_atomic_fmin:
1462 case nir_intrinsic_ssbo_atomic_fmax:
1463 case nir_intrinsic_ssbo_atomic_fcomp_swap: {
1464 int param_count = ir->actual_parameters.length();
1465 assert(param_count == 3 || param_count == 4);
1466
1467 /* Block index */
1468 exec_node *param = ir->actual_parameters.get_head();
1469 ir_instruction *inst = (ir_instruction *) param;
1470 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1471
1472 /* Offset */
1473 param = param->get_next();
1474 inst = (ir_instruction *) param;
1475 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1476
1477 /* data1 parameter (this is always present) */
1478 param = param->get_next();
1479 inst = (ir_instruction *) param;
1480 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1481
1482 /* data2 parameter (only with atomic_comp_swap) */
1483 if (param_count == 4) {
1484 assert(op == nir_intrinsic_ssbo_atomic_comp_swap ||
1485 op == nir_intrinsic_ssbo_atomic_fcomp_swap);
1486 param = param->get_next();
1487 inst = (ir_instruction *) param;
1488 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1489 }
1490
1491 /* Atomic result */
1492 assert(ir->return_deref);
1493 nir_ssa_dest_init(&instr->instr, &instr->dest,
1494 ir->return_deref->type->vector_elements, 32, NULL);
1495 nir_builder_instr_insert(&b, &instr->instr);
1496 break;
1497 }
1498 case nir_intrinsic_load_shared: {
1499 exec_node *param = ir->actual_parameters.get_head();
1500 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1501
1502 nir_intrinsic_set_base(instr, 0);
1503 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1504
1505 const glsl_type *type = ir->return_deref->var->type;
1506 instr->num_components = type->vector_elements;
1507 intrinsic_set_std430_align(instr, type);
1508
1509 /* Setup destination register */
1510 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1511 nir_ssa_dest_init(&instr->instr, &instr->dest,
1512 type->vector_elements, bit_size, NULL);
1513
1514 nir_builder_instr_insert(&b, &instr->instr);
1515
1516 /* The value in shared memory is a 32-bit value */
1517 if (type->is_boolean())
1518 ret = nir_i2b(&b, &instr->dest.ssa);
1519 break;
1520 }
1521 case nir_intrinsic_store_shared: {
1522 exec_node *param = ir->actual_parameters.get_head();
1523 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1524
1525 param = param->get_next();
1526 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1527
1528 param = param->get_next();
1529 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1530 assert(write_mask);
1531
1532 nir_intrinsic_set_base(instr, 0);
1533 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1534
1535 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1536
1537 nir_ssa_def *nir_val = evaluate_rvalue(val);
1538 /* The value in shared memory is a 32-bit value */
1539 if (val->type->is_boolean())
1540 nir_val = nir_b2i32(&b, nir_val);
1541
1542 instr->src[0] = nir_src_for_ssa(nir_val);
1543 instr->num_components = val->type->vector_elements;
1544 intrinsic_set_std430_align(instr, val->type);
1545
1546 nir_builder_instr_insert(&b, &instr->instr);
1547 break;
1548 }
1549 case nir_intrinsic_shared_atomic_add:
1550 case nir_intrinsic_shared_atomic_imin:
1551 case nir_intrinsic_shared_atomic_umin:
1552 case nir_intrinsic_shared_atomic_imax:
1553 case nir_intrinsic_shared_atomic_umax:
1554 case nir_intrinsic_shared_atomic_and:
1555 case nir_intrinsic_shared_atomic_or:
1556 case nir_intrinsic_shared_atomic_xor:
1557 case nir_intrinsic_shared_atomic_exchange:
1558 case nir_intrinsic_shared_atomic_comp_swap:
1559 case nir_intrinsic_shared_atomic_fadd:
1560 case nir_intrinsic_shared_atomic_fmin:
1561 case nir_intrinsic_shared_atomic_fmax:
1562 case nir_intrinsic_shared_atomic_fcomp_swap: {
1563 int param_count = ir->actual_parameters.length();
1564 assert(param_count == 2 || param_count == 3);
1565
1566 /* Offset */
1567 exec_node *param = ir->actual_parameters.get_head();
1568 ir_instruction *inst = (ir_instruction *) param;
1569 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1570
1571 /* data1 parameter (this is always present) */
1572 param = param->get_next();
1573 inst = (ir_instruction *) param;
1574 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1575
1576 /* data2 parameter (only with atomic_comp_swap) */
1577 if (param_count == 3) {
1578 assert(op == nir_intrinsic_shared_atomic_comp_swap ||
1579 op == nir_intrinsic_shared_atomic_fcomp_swap);
1580 param = param->get_next();
1581 inst = (ir_instruction *) param;
1582 instr->src[2] =
1583 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1584 }
1585
1586 /* Atomic result */
1587 assert(ir->return_deref);
1588 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1589 nir_ssa_dest_init(&instr->instr, &instr->dest,
1590 ir->return_deref->type->vector_elements,
1591 bit_size, NULL);
1592 nir_builder_instr_insert(&b, &instr->instr);
1593 break;
1594 }
1595 case nir_intrinsic_vote_any:
1596 case nir_intrinsic_vote_all:
1597 case nir_intrinsic_vote_ieq: {
1598 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1599 instr->num_components = 1;
1600
1601 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1602 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1603
1604 nir_builder_instr_insert(&b, &instr->instr);
1605 break;
1606 }
1607
1608 case nir_intrinsic_ballot: {
1609 nir_ssa_dest_init(&instr->instr, &instr->dest,
1610 ir->return_deref->type->vector_elements, 64, NULL);
1611 instr->num_components = ir->return_deref->type->vector_elements;
1612
1613 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1614 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1615
1616 nir_builder_instr_insert(&b, &instr->instr);
1617 break;
1618 }
1619 case nir_intrinsic_read_invocation: {
1620 nir_ssa_dest_init(&instr->instr, &instr->dest,
1621 ir->return_deref->type->vector_elements, 32, NULL);
1622 instr->num_components = ir->return_deref->type->vector_elements;
1623
1624 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1625 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1626
1627 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1628 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1629
1630 nir_builder_instr_insert(&b, &instr->instr);
1631 break;
1632 }
1633 case nir_intrinsic_read_first_invocation: {
1634 nir_ssa_dest_init(&instr->instr, &instr->dest,
1635 ir->return_deref->type->vector_elements, 32, NULL);
1636 instr->num_components = ir->return_deref->type->vector_elements;
1637
1638 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1639 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1640
1641 nir_builder_instr_insert(&b, &instr->instr);
1642 break;
1643 }
1644 default:
1645 unreachable("not reached");
1646 }
1647
1648 if (ir->return_deref)
1649 nir_store_deref(&b, evaluate_deref(ir->return_deref), ret, ~0);
1650
1651 return;
1652 }
1653
1654 struct hash_entry *entry =
1655 _mesa_hash_table_search(this->overload_table, ir->callee);
1656 assert(entry);
1657 nir_function *callee = (nir_function *) entry->data;
1658
1659 nir_call_instr *call = nir_call_instr_create(this->shader, callee);
1660
1661 unsigned i = 0;
1662 nir_deref_instr *ret_deref = NULL;
1663 if (ir->return_deref) {
1664 nir_variable *ret_tmp =
1665 nir_local_variable_create(this->impl, ir->return_deref->type,
1666 "return_tmp");
1667 ret_deref = nir_build_deref_var(&b, ret_tmp);
1668 call->params[i++] = nir_src_for_ssa(&ret_deref->dest.ssa);
1669 }
1670
1671 foreach_two_lists(formal_node, &ir->callee->parameters,
1672 actual_node, &ir->actual_parameters) {
1673 ir_rvalue *param_rvalue = (ir_rvalue *) actual_node;
1674 ir_variable *sig_param = (ir_variable *) formal_node;
1675
1676 if (sig_param->data.mode == ir_var_function_out) {
1677 nir_deref_instr *out_deref = evaluate_deref(param_rvalue);
1678 call->params[i] = nir_src_for_ssa(&out_deref->dest.ssa);
1679 } else if (sig_param->data.mode == ir_var_function_in) {
1680 nir_ssa_def *val = evaluate_rvalue(param_rvalue);
1681 nir_src src = nir_src_for_ssa(val);
1682
1683 nir_src_copy(&call->params[i], &src, call);
1684 } else if (sig_param->data.mode == ir_var_function_inout) {
1685 unreachable("unimplemented: inout parameters");
1686 }
1687
1688 i++;
1689 }
1690
1691 nir_builder_instr_insert(&b, &call->instr);
1692
1693 if (ir->return_deref)
1694 nir_store_deref(&b, evaluate_deref(ir->return_deref), nir_load_deref(&b, ret_deref), ~0);
1695 }
1696
1697 void
1698 nir_visitor::visit(ir_assignment *ir)
1699 {
1700 unsigned num_components = ir->lhs->type->vector_elements;
1701
1702 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1703 ir->lhs->variable_referenced()->data.precise;
1704
1705 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1706 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1707 nir_deref_instr *lhs = evaluate_deref(ir->lhs);
1708 nir_deref_instr *rhs = evaluate_deref(ir->rhs);
1709 enum gl_access_qualifier lhs_qualifiers = deref_get_qualifier(lhs);
1710 enum gl_access_qualifier rhs_qualifiers = deref_get_qualifier(rhs);
1711 if (ir->condition) {
1712 nir_push_if(&b, evaluate_rvalue(ir->condition));
1713 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1714 rhs_qualifiers);
1715 nir_pop_if(&b, NULL);
1716 } else {
1717 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1718 rhs_qualifiers);
1719 }
1720 return;
1721 }
1722
1723 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1724
1725 ir->lhs->accept(this);
1726 nir_deref_instr *lhs_deref = this->deref;
1727 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1728
1729 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1730 /* GLSL IR will give us the input to the write-masked assignment in a
1731 * single packed vector. So, for example, if the writemask is xzw, then
1732 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1733 * from the load.
1734 */
1735 unsigned swiz[4];
1736 unsigned component = 0;
1737 for (unsigned i = 0; i < 4; i++) {
1738 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1739 }
1740 src = nir_swizzle(&b, src, swiz, num_components);
1741 }
1742
1743 enum gl_access_qualifier qualifiers = deref_get_qualifier(lhs_deref);
1744 if (ir->condition) {
1745 nir_push_if(&b, evaluate_rvalue(ir->condition));
1746 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1747 qualifiers);
1748 nir_pop_if(&b, NULL);
1749 } else {
1750 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1751 qualifiers);
1752 }
1753 }
1754
1755 /*
1756 * Given an instruction, returns a pointer to its destination or NULL if there
1757 * is no destination.
1758 *
1759 * Note that this only handles instructions we generate at this level.
1760 */
1761 static nir_dest *
1762 get_instr_dest(nir_instr *instr)
1763 {
1764 nir_alu_instr *alu_instr;
1765 nir_intrinsic_instr *intrinsic_instr;
1766 nir_tex_instr *tex_instr;
1767
1768 switch (instr->type) {
1769 case nir_instr_type_alu:
1770 alu_instr = nir_instr_as_alu(instr);
1771 return &alu_instr->dest.dest;
1772
1773 case nir_instr_type_intrinsic:
1774 intrinsic_instr = nir_instr_as_intrinsic(instr);
1775 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1776 return &intrinsic_instr->dest;
1777 else
1778 return NULL;
1779
1780 case nir_instr_type_tex:
1781 tex_instr = nir_instr_as_tex(instr);
1782 return &tex_instr->dest;
1783
1784 default:
1785 unreachable("not reached");
1786 }
1787
1788 return NULL;
1789 }
1790
1791 void
1792 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1793 unsigned bit_size)
1794 {
1795 nir_dest *dest = get_instr_dest(instr);
1796
1797 if (dest)
1798 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1799
1800 nir_builder_instr_insert(&b, instr);
1801
1802 if (dest) {
1803 assert(dest->is_ssa);
1804 this->result = &dest->ssa;
1805 }
1806 }
1807
1808 nir_ssa_def *
1809 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1810 {
1811 ir->accept(this);
1812 if (ir->as_dereference() || ir->as_constant()) {
1813 /*
1814 * A dereference is being used on the right hand side, which means we
1815 * must emit a variable load.
1816 */
1817
1818 enum gl_access_qualifier access = deref_get_qualifier(this->deref);
1819 this->result = nir_load_deref_with_access(&b, this->deref, access);
1820 }
1821
1822 return this->result;
1823 }
1824
1825 static bool
1826 type_is_float(glsl_base_type type)
1827 {
1828 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1829 type == GLSL_TYPE_FLOAT16;
1830 }
1831
1832 static bool
1833 type_is_signed(glsl_base_type type)
1834 {
1835 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1836 type == GLSL_TYPE_INT16;
1837 }
1838
1839 void
1840 nir_visitor::visit(ir_expression *ir)
1841 {
1842 /* Some special cases */
1843 switch (ir->operation) {
1844 case ir_binop_ubo_load: {
1845 nir_intrinsic_instr *load =
1846 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1847 unsigned bit_size = ir->type->is_boolean() ? 32 :
1848 glsl_get_bit_size(ir->type);
1849 load->num_components = ir->type->vector_elements;
1850 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1851 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1852 intrinsic_set_std430_align(load, ir->type);
1853 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1854
1855 /*
1856 * In UBO's, a true boolean value is any non-zero value, but we consider
1857 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1858 */
1859
1860 if (ir->type->is_boolean())
1861 this->result = nir_i2b(&b, &load->dest.ssa);
1862
1863 return;
1864 }
1865
1866 case ir_unop_interpolate_at_centroid:
1867 case ir_binop_interpolate_at_offset:
1868 case ir_binop_interpolate_at_sample: {
1869 ir_dereference *deref = ir->operands[0]->as_dereference();
1870 ir_swizzle *swizzle = NULL;
1871 if (!deref) {
1872 /* the api does not allow a swizzle here, but the varying packing code
1873 * may have pushed one into here.
1874 */
1875 swizzle = ir->operands[0]->as_swizzle();
1876 assert(swizzle);
1877 deref = swizzle->val->as_dereference();
1878 assert(deref);
1879 }
1880
1881 deref->accept(this);
1882
1883 nir_intrinsic_op op;
1884 if (this->deref->mode == nir_var_shader_in) {
1885 switch (ir->operation) {
1886 case ir_unop_interpolate_at_centroid:
1887 op = nir_intrinsic_interp_deref_at_centroid;
1888 break;
1889 case ir_binop_interpolate_at_offset:
1890 op = nir_intrinsic_interp_deref_at_offset;
1891 break;
1892 case ir_binop_interpolate_at_sample:
1893 op = nir_intrinsic_interp_deref_at_sample;
1894 break;
1895 default:
1896 unreachable("Invalid interpolation intrinsic");
1897 }
1898 } else {
1899 /* This case can happen if the vertex shader does not write the
1900 * given varying. In this case, the linker will lower it to a
1901 * global variable. Since interpolating a variable makes no
1902 * sense, we'll just turn it into a load which will probably
1903 * eventually end up as an SSA definition.
1904 */
1905 assert(this->deref->mode == nir_var_shader_temp);
1906 op = nir_intrinsic_load_deref;
1907 }
1908
1909 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1910 intrin->num_components = deref->type->vector_elements;
1911 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1912
1913 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1914 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1915 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1916
1917 unsigned bit_size = glsl_get_bit_size(deref->type);
1918 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1919
1920 if (swizzle) {
1921 unsigned swiz[4] = {
1922 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1923 };
1924
1925 result = nir_swizzle(&b, result, swiz,
1926 swizzle->type->vector_elements);
1927 }
1928
1929 return;
1930 }
1931
1932 case ir_unop_ssbo_unsized_array_length: {
1933 nir_intrinsic_instr *intrin =
1934 nir_intrinsic_instr_create(b.shader,
1935 nir_intrinsic_deref_buffer_array_length);
1936
1937 ir_dereference *deref = ir->operands[0]->as_dereference();
1938 intrin->src[0] = nir_src_for_ssa(&evaluate_deref(deref)->dest.ssa);
1939
1940 add_instr(&intrin->instr, 1, 32);
1941 return;
1942 }
1943
1944 default:
1945 break;
1946 }
1947
1948 nir_ssa_def *srcs[4];
1949 for (unsigned i = 0; i < ir->num_operands; i++)
1950 srcs[i] = evaluate_rvalue(ir->operands[i]);
1951
1952 glsl_base_type types[4];
1953 for (unsigned i = 0; i < ir->num_operands; i++)
1954 types[i] = ir->operands[i]->type->base_type;
1955
1956 glsl_base_type out_type = ir->type->base_type;
1957
1958 switch (ir->operation) {
1959 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1960 case ir_unop_logic_not:
1961 result = nir_inot(&b, srcs[0]);
1962 break;
1963 case ir_unop_neg:
1964 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1965 : nir_ineg(&b, srcs[0]);
1966 break;
1967 case ir_unop_abs:
1968 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1969 : nir_iabs(&b, srcs[0]);
1970 break;
1971 case ir_unop_saturate:
1972 assert(type_is_float(types[0]));
1973 result = nir_fsat(&b, srcs[0]);
1974 break;
1975 case ir_unop_sign:
1976 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1977 : nir_isign(&b, srcs[0]);
1978 break;
1979 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1980 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1981 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1982 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1983 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1984 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1985 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1986 case ir_unop_i2f:
1987 case ir_unop_u2f:
1988 case ir_unop_b2f:
1989 case ir_unop_f2i:
1990 case ir_unop_f2u:
1991 case ir_unop_f2b:
1992 case ir_unop_i2b:
1993 case ir_unop_b2i:
1994 case ir_unop_b2i64:
1995 case ir_unop_d2f:
1996 case ir_unop_f2d:
1997 case ir_unop_d2i:
1998 case ir_unop_d2u:
1999 case ir_unop_d2b:
2000 case ir_unop_i2d:
2001 case ir_unop_u2d:
2002 case ir_unop_i642i:
2003 case ir_unop_i642u:
2004 case ir_unop_i642f:
2005 case ir_unop_i642b:
2006 case ir_unop_i642d:
2007 case ir_unop_u642i:
2008 case ir_unop_u642u:
2009 case ir_unop_u642f:
2010 case ir_unop_u642d:
2011 case ir_unop_i2i64:
2012 case ir_unop_u2i64:
2013 case ir_unop_f2i64:
2014 case ir_unop_d2i64:
2015 case ir_unop_i2u64:
2016 case ir_unop_u2u64:
2017 case ir_unop_f2u64:
2018 case ir_unop_d2u64:
2019 case ir_unop_i2u:
2020 case ir_unop_u2i:
2021 case ir_unop_i642u64:
2022 case ir_unop_u642i64: {
2023 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
2024 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
2025 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
2026 nir_rounding_mode_undef),
2027 srcs[0], NULL, NULL, NULL);
2028 /* b2i and b2f don't have fixed bit-size versions so the builder will
2029 * just assume 32 and we have to fix it up here.
2030 */
2031 result->bit_size = nir_alu_type_get_type_size(dst_type);
2032 break;
2033 }
2034
2035 case ir_unop_bitcast_i2f:
2036 case ir_unop_bitcast_f2i:
2037 case ir_unop_bitcast_u2f:
2038 case ir_unop_bitcast_f2u:
2039 case ir_unop_bitcast_i642d:
2040 case ir_unop_bitcast_d2i64:
2041 case ir_unop_bitcast_u642d:
2042 case ir_unop_bitcast_d2u64:
2043 case ir_unop_subroutine_to_int:
2044 /* no-op */
2045 result = nir_mov(&b, srcs[0]);
2046 break;
2047 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
2048 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
2049 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
2050 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
2051 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
2052 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
2053 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
2054 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
2055 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
2056 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
2057 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
2058 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
2059 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
2060 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
2061 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
2062 case ir_unop_pack_snorm_2x16:
2063 result = nir_pack_snorm_2x16(&b, srcs[0]);
2064 break;
2065 case ir_unop_pack_snorm_4x8:
2066 result = nir_pack_snorm_4x8(&b, srcs[0]);
2067 break;
2068 case ir_unop_pack_unorm_2x16:
2069 result = nir_pack_unorm_2x16(&b, srcs[0]);
2070 break;
2071 case ir_unop_pack_unorm_4x8:
2072 result = nir_pack_unorm_4x8(&b, srcs[0]);
2073 break;
2074 case ir_unop_pack_half_2x16:
2075 result = nir_pack_half_2x16(&b, srcs[0]);
2076 break;
2077 case ir_unop_unpack_snorm_2x16:
2078 result = nir_unpack_snorm_2x16(&b, srcs[0]);
2079 break;
2080 case ir_unop_unpack_snorm_4x8:
2081 result = nir_unpack_snorm_4x8(&b, srcs[0]);
2082 break;
2083 case ir_unop_unpack_unorm_2x16:
2084 result = nir_unpack_unorm_2x16(&b, srcs[0]);
2085 break;
2086 case ir_unop_unpack_unorm_4x8:
2087 result = nir_unpack_unorm_4x8(&b, srcs[0]);
2088 break;
2089 case ir_unop_unpack_half_2x16:
2090 result = nir_unpack_half_2x16(&b, srcs[0]);
2091 break;
2092 case ir_unop_pack_sampler_2x32:
2093 case ir_unop_pack_image_2x32:
2094 case ir_unop_pack_double_2x32:
2095 case ir_unop_pack_int_2x32:
2096 case ir_unop_pack_uint_2x32:
2097 result = nir_pack_64_2x32(&b, srcs[0]);
2098 break;
2099 case ir_unop_unpack_sampler_2x32:
2100 case ir_unop_unpack_image_2x32:
2101 case ir_unop_unpack_double_2x32:
2102 case ir_unop_unpack_int_2x32:
2103 case ir_unop_unpack_uint_2x32:
2104 result = nir_unpack_64_2x32(&b, srcs[0]);
2105 break;
2106 case ir_unop_bitfield_reverse:
2107 result = nir_bitfield_reverse(&b, srcs[0]);
2108 break;
2109 case ir_unop_bit_count:
2110 result = nir_bit_count(&b, srcs[0]);
2111 break;
2112 case ir_unop_find_msb:
2113 switch (types[0]) {
2114 case GLSL_TYPE_UINT:
2115 result = nir_ufind_msb(&b, srcs[0]);
2116 break;
2117 case GLSL_TYPE_INT:
2118 result = nir_ifind_msb(&b, srcs[0]);
2119 break;
2120 default:
2121 unreachable("Invalid type for findMSB()");
2122 }
2123 break;
2124 case ir_unop_find_lsb:
2125 result = nir_find_lsb(&b, srcs[0]);
2126 break;
2127
2128 case ir_unop_noise:
2129 switch (ir->type->vector_elements) {
2130 case 1:
2131 switch (ir->operands[0]->type->vector_elements) {
2132 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
2133 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
2134 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
2135 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
2136 default: unreachable("not reached");
2137 }
2138 break;
2139 case 2:
2140 switch (ir->operands[0]->type->vector_elements) {
2141 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
2142 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
2143 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
2144 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
2145 default: unreachable("not reached");
2146 }
2147 break;
2148 case 3:
2149 switch (ir->operands[0]->type->vector_elements) {
2150 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
2151 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
2152 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
2153 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
2154 default: unreachable("not reached");
2155 }
2156 break;
2157 case 4:
2158 switch (ir->operands[0]->type->vector_elements) {
2159 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
2160 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
2161 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
2162 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
2163 default: unreachable("not reached");
2164 }
2165 break;
2166 default:
2167 unreachable("not reached");
2168 }
2169 break;
2170 case ir_unop_get_buffer_size: {
2171 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
2172 this->shader,
2173 nir_intrinsic_get_buffer_size);
2174 load->num_components = ir->type->vector_elements;
2175 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
2176 unsigned bit_size = glsl_get_bit_size(ir->type);
2177 add_instr(&load->instr, ir->type->vector_elements, bit_size);
2178 return;
2179 }
2180
2181 case ir_binop_add:
2182 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
2183 : nir_iadd(&b, srcs[0], srcs[1]);
2184 break;
2185 case ir_binop_sub:
2186 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
2187 : nir_isub(&b, srcs[0], srcs[1]);
2188 break;
2189 case ir_binop_mul:
2190 if (type_is_float(out_type))
2191 result = nir_fmul(&b, srcs[0], srcs[1]);
2192 else if (out_type == GLSL_TYPE_INT64 &&
2193 (ir->operands[0]->type->base_type == GLSL_TYPE_INT ||
2194 ir->operands[1]->type->base_type == GLSL_TYPE_INT))
2195 result = nir_imul_2x32_64(&b, srcs[0], srcs[1]);
2196 else if (out_type == GLSL_TYPE_UINT64 &&
2197 (ir->operands[0]->type->base_type == GLSL_TYPE_UINT ||
2198 ir->operands[1]->type->base_type == GLSL_TYPE_UINT))
2199 result = nir_umul_2x32_64(&b, srcs[0], srcs[1]);
2200 else
2201 result = nir_imul(&b, srcs[0], srcs[1]);
2202 break;
2203 case ir_binop_div:
2204 if (type_is_float(out_type))
2205 result = nir_fdiv(&b, srcs[0], srcs[1]);
2206 else if (type_is_signed(out_type))
2207 result = nir_idiv(&b, srcs[0], srcs[1]);
2208 else
2209 result = nir_udiv(&b, srcs[0], srcs[1]);
2210 break;
2211 case ir_binop_mod:
2212 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
2213 : nir_umod(&b, srcs[0], srcs[1]);
2214 break;
2215 case ir_binop_min:
2216 if (type_is_float(out_type))
2217 result = nir_fmin(&b, srcs[0], srcs[1]);
2218 else if (type_is_signed(out_type))
2219 result = nir_imin(&b, srcs[0], srcs[1]);
2220 else
2221 result = nir_umin(&b, srcs[0], srcs[1]);
2222 break;
2223 case ir_binop_max:
2224 if (type_is_float(out_type))
2225 result = nir_fmax(&b, srcs[0], srcs[1]);
2226 else if (type_is_signed(out_type))
2227 result = nir_imax(&b, srcs[0], srcs[1]);
2228 else
2229 result = nir_umax(&b, srcs[0], srcs[1]);
2230 break;
2231 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
2232 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
2233 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
2234 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
2235 case ir_binop_logic_and:
2236 result = nir_iand(&b, srcs[0], srcs[1]);
2237 break;
2238 case ir_binop_logic_or:
2239 result = nir_ior(&b, srcs[0], srcs[1]);
2240 break;
2241 case ir_binop_logic_xor:
2242 result = nir_ixor(&b, srcs[0], srcs[1]);
2243 break;
2244 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
2245 case ir_binop_rshift:
2246 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
2247 : nir_ushr(&b, srcs[0], srcs[1]);
2248 break;
2249 case ir_binop_imul_high:
2250 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
2251 : nir_umul_high(&b, srcs[0], srcs[1]);
2252 break;
2253 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
2254 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
2255 case ir_binop_less:
2256 if (type_is_float(types[0]))
2257 result = nir_flt(&b, srcs[0], srcs[1]);
2258 else if (type_is_signed(types[0]))
2259 result = nir_ilt(&b, srcs[0], srcs[1]);
2260 else
2261 result = nir_ult(&b, srcs[0], srcs[1]);
2262 break;
2263 case ir_binop_gequal:
2264 if (type_is_float(types[0]))
2265 result = nir_fge(&b, srcs[0], srcs[1]);
2266 else if (type_is_signed(types[0]))
2267 result = nir_ige(&b, srcs[0], srcs[1]);
2268 else
2269 result = nir_uge(&b, srcs[0], srcs[1]);
2270 break;
2271 case ir_binop_equal:
2272 if (type_is_float(types[0]))
2273 result = nir_feq(&b, srcs[0], srcs[1]);
2274 else
2275 result = nir_ieq(&b, srcs[0], srcs[1]);
2276 break;
2277 case ir_binop_nequal:
2278 if (type_is_float(types[0]))
2279 result = nir_fne(&b, srcs[0], srcs[1]);
2280 else
2281 result = nir_ine(&b, srcs[0], srcs[1]);
2282 break;
2283 case ir_binop_all_equal:
2284 if (type_is_float(types[0])) {
2285 switch (ir->operands[0]->type->vector_elements) {
2286 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
2287 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
2288 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
2289 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
2290 default:
2291 unreachable("not reached");
2292 }
2293 } else {
2294 switch (ir->operands[0]->type->vector_elements) {
2295 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
2296 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
2297 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
2298 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
2299 default:
2300 unreachable("not reached");
2301 }
2302 }
2303 break;
2304 case ir_binop_any_nequal:
2305 if (type_is_float(types[0])) {
2306 switch (ir->operands[0]->type->vector_elements) {
2307 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
2308 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
2309 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
2310 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
2311 default:
2312 unreachable("not reached");
2313 }
2314 } else {
2315 switch (ir->operands[0]->type->vector_elements) {
2316 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
2317 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
2318 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
2319 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
2320 default:
2321 unreachable("not reached");
2322 }
2323 }
2324 break;
2325 case ir_binop_dot:
2326 switch (ir->operands[0]->type->vector_elements) {
2327 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
2328 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
2329 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
2330 default:
2331 unreachable("not reached");
2332 }
2333 break;
2334 case ir_binop_vector_extract: {
2335 result = nir_channel(&b, srcs[0], 0);
2336 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
2337 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
2338 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
2339 swizzled, result);
2340 }
2341 break;
2342 }
2343
2344 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
2345 case ir_triop_fma:
2346 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
2347 break;
2348 case ir_triop_lrp:
2349 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
2350 break;
2351 case ir_triop_csel:
2352 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
2353 break;
2354 case ir_triop_bitfield_extract:
2355 result = (out_type == GLSL_TYPE_INT) ?
2356 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
2357 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
2358 break;
2359 case ir_quadop_bitfield_insert:
2360 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
2361 break;
2362 case ir_quadop_vector:
2363 result = nir_vec(&b, srcs, ir->type->vector_elements);
2364 break;
2365
2366 default:
2367 unreachable("not reached");
2368 }
2369 }
2370
2371 void
2372 nir_visitor::visit(ir_swizzle *ir)
2373 {
2374 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
2375 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
2376 ir->type->vector_elements);
2377 }
2378
2379 void
2380 nir_visitor::visit(ir_texture *ir)
2381 {
2382 unsigned num_srcs;
2383 nir_texop op;
2384 switch (ir->op) {
2385 case ir_tex:
2386 op = nir_texop_tex;
2387 num_srcs = 1; /* coordinate */
2388 break;
2389
2390 case ir_txb:
2391 case ir_txl:
2392 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
2393 num_srcs = 2; /* coordinate, bias/lod */
2394 break;
2395
2396 case ir_txd:
2397 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
2398 num_srcs = 3;
2399 break;
2400
2401 case ir_txf:
2402 op = nir_texop_txf;
2403 if (ir->lod_info.lod != NULL)
2404 num_srcs = 2; /* coordinate, lod */
2405 else
2406 num_srcs = 1; /* coordinate */
2407 break;
2408
2409 case ir_txf_ms:
2410 op = nir_texop_txf_ms;
2411 num_srcs = 2; /* coordinate, sample_index */
2412 break;
2413
2414 case ir_txs:
2415 op = nir_texop_txs;
2416 if (ir->lod_info.lod != NULL)
2417 num_srcs = 1; /* lod */
2418 else
2419 num_srcs = 0;
2420 break;
2421
2422 case ir_lod:
2423 op = nir_texop_lod;
2424 num_srcs = 1; /* coordinate */
2425 break;
2426
2427 case ir_tg4:
2428 op = nir_texop_tg4;
2429 num_srcs = 1; /* coordinate */
2430 break;
2431
2432 case ir_query_levels:
2433 op = nir_texop_query_levels;
2434 num_srcs = 0;
2435 break;
2436
2437 case ir_texture_samples:
2438 op = nir_texop_texture_samples;
2439 num_srcs = 0;
2440 break;
2441
2442 case ir_samples_identical:
2443 op = nir_texop_samples_identical;
2444 num_srcs = 1; /* coordinate */
2445 break;
2446
2447 default:
2448 unreachable("not reached");
2449 }
2450
2451 if (ir->projector != NULL)
2452 num_srcs++;
2453 if (ir->shadow_comparator != NULL)
2454 num_srcs++;
2455 /* offsets are constants we store inside nir_tex_intrs.offsets */
2456 if (ir->offset != NULL && !ir->offset->type->is_array())
2457 num_srcs++;
2458
2459 /* Add one for the texture deref */
2460 num_srcs += 2;
2461
2462 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2463
2464 instr->op = op;
2465 instr->sampler_dim =
2466 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2467 instr->is_array = ir->sampler->type->sampler_array;
2468 instr->is_shadow = ir->sampler->type->sampler_shadow;
2469 if (instr->is_shadow)
2470 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2471 switch (ir->type->base_type) {
2472 case GLSL_TYPE_FLOAT:
2473 instr->dest_type = nir_type_float;
2474 break;
2475 case GLSL_TYPE_INT:
2476 instr->dest_type = nir_type_int;
2477 break;
2478 case GLSL_TYPE_BOOL:
2479 case GLSL_TYPE_UINT:
2480 instr->dest_type = nir_type_uint;
2481 break;
2482 default:
2483 unreachable("not reached");
2484 }
2485
2486 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2487
2488 /* check for bindless handles */
2489 if (sampler_deref->mode != nir_var_uniform ||
2490 nir_deref_instr_get_variable(sampler_deref)->data.bindless) {
2491 nir_ssa_def *load = nir_load_deref(&b, sampler_deref);
2492 instr->src[0].src = nir_src_for_ssa(load);
2493 instr->src[0].src_type = nir_tex_src_texture_handle;
2494 instr->src[1].src = nir_src_for_ssa(load);
2495 instr->src[1].src_type = nir_tex_src_sampler_handle;
2496 } else {
2497 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2498 instr->src[0].src_type = nir_tex_src_texture_deref;
2499 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2500 instr->src[1].src_type = nir_tex_src_sampler_deref;
2501 }
2502
2503 unsigned src_number = 2;
2504
2505 if (ir->coordinate != NULL) {
2506 instr->coord_components = ir->coordinate->type->vector_elements;
2507 instr->src[src_number].src =
2508 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2509 instr->src[src_number].src_type = nir_tex_src_coord;
2510 src_number++;
2511 }
2512
2513 if (ir->projector != NULL) {
2514 instr->src[src_number].src =
2515 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2516 instr->src[src_number].src_type = nir_tex_src_projector;
2517 src_number++;
2518 }
2519
2520 if (ir->shadow_comparator != NULL) {
2521 instr->src[src_number].src =
2522 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2523 instr->src[src_number].src_type = nir_tex_src_comparator;
2524 src_number++;
2525 }
2526
2527 if (ir->offset != NULL) {
2528 if (ir->offset->type->is_array()) {
2529 for (int i = 0; i < ir->offset->type->array_size(); i++) {
2530 const ir_constant *c =
2531 ir->offset->as_constant()->get_array_element(i);
2532
2533 for (unsigned j = 0; j < 2; ++j) {
2534 int val = c->get_int_component(j);
2535 assert(val <= 31 && val >= -32);
2536 instr->tg4_offsets[i][j] = val;
2537 }
2538 }
2539 } else {
2540 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2541
2542 instr->src[src_number].src =
2543 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2544 instr->src[src_number].src_type = nir_tex_src_offset;
2545 src_number++;
2546 }
2547 }
2548
2549 switch (ir->op) {
2550 case ir_txb:
2551 instr->src[src_number].src =
2552 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2553 instr->src[src_number].src_type = nir_tex_src_bias;
2554 src_number++;
2555 break;
2556
2557 case ir_txl:
2558 case ir_txf:
2559 case ir_txs:
2560 if (ir->lod_info.lod != NULL) {
2561 instr->src[src_number].src =
2562 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2563 instr->src[src_number].src_type = nir_tex_src_lod;
2564 src_number++;
2565 }
2566 break;
2567
2568 case ir_txd:
2569 instr->src[src_number].src =
2570 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2571 instr->src[src_number].src_type = nir_tex_src_ddx;
2572 src_number++;
2573 instr->src[src_number].src =
2574 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2575 instr->src[src_number].src_type = nir_tex_src_ddy;
2576 src_number++;
2577 break;
2578
2579 case ir_txf_ms:
2580 instr->src[src_number].src =
2581 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2582 instr->src[src_number].src_type = nir_tex_src_ms_index;
2583 src_number++;
2584 break;
2585
2586 case ir_tg4:
2587 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2588 break;
2589
2590 default:
2591 break;
2592 }
2593
2594 assert(src_number == num_srcs);
2595
2596 unsigned bit_size = glsl_get_bit_size(ir->type);
2597 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2598 }
2599
2600 void
2601 nir_visitor::visit(ir_constant *ir)
2602 {
2603 /*
2604 * We don't know if this variable is an array or struct that gets
2605 * dereferenced, so do the safe thing an make it a variable with a
2606 * constant initializer and return a dereference.
2607 */
2608
2609 nir_variable *var =
2610 nir_local_variable_create(this->impl, ir->type, "const_temp");
2611 var->data.read_only = true;
2612 var->constant_initializer = constant_copy(ir, var);
2613
2614 this->deref = nir_build_deref_var(&b, var);
2615 }
2616
2617 void
2618 nir_visitor::visit(ir_dereference_variable *ir)
2619 {
2620 if (ir->variable_referenced()->data.mode == ir_var_function_out) {
2621 unsigned i = (sig->return_type != glsl_type::void_type) ? 1 : 0;
2622
2623 foreach_in_list(ir_variable, param, &sig->parameters) {
2624 if (param == ir->variable_referenced()) {
2625 break;
2626 }
2627 i++;
2628 }
2629
2630 this->deref = nir_build_deref_cast(&b, nir_load_param(&b, i),
2631 nir_var_function_temp, ir->type, 0);
2632 return;
2633 }
2634
2635 assert(ir->variable_referenced()->data.mode != ir_var_function_inout);
2636
2637 struct hash_entry *entry =
2638 _mesa_hash_table_search(this->var_table, ir->var);
2639 assert(entry);
2640 nir_variable *var = (nir_variable *) entry->data;
2641
2642 this->deref = nir_build_deref_var(&b, var);
2643 }
2644
2645 void
2646 nir_visitor::visit(ir_dereference_record *ir)
2647 {
2648 ir->record->accept(this);
2649
2650 int field_index = ir->field_idx;
2651 assert(field_index >= 0);
2652
2653 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2654 }
2655
2656 void
2657 nir_visitor::visit(ir_dereference_array *ir)
2658 {
2659 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2660
2661 ir->array->accept(this);
2662
2663 this->deref = nir_build_deref_array(&b, this->deref, index);
2664 }
2665
2666 void
2667 nir_visitor::visit(ir_barrier *)
2668 {
2669 nir_intrinsic_instr *instr =
2670 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2671 nir_builder_instr_insert(&b, &instr->instr);
2672 }
2673
2674 nir_shader *
2675 glsl_float64_funcs_to_nir(struct gl_context *ctx,
2676 const nir_shader_compiler_options *options)
2677 {
2678 /* We pretend it's a vertex shader. Ultimately, the stage shouldn't
2679 * matter because we're not optimizing anything here.
2680 */
2681 struct gl_shader *sh = _mesa_new_shader(-1, MESA_SHADER_VERTEX);
2682 sh->Source = float64_source;
2683 sh->CompileStatus = COMPILE_FAILURE;
2684 _mesa_glsl_compile_shader(ctx, sh, false, false, true);
2685
2686 if (!sh->CompileStatus) {
2687 if (sh->InfoLog) {
2688 _mesa_problem(ctx,
2689 "fp64 software impl compile failed:\n%s\nsource:\n%s\n",
2690 sh->InfoLog, float64_source);
2691 }
2692 return NULL;
2693 }
2694
2695 nir_shader *nir = nir_shader_create(NULL, MESA_SHADER_VERTEX, options, NULL);
2696
2697 nir_visitor v1(ctx, nir);
2698 nir_function_visitor v2(&v1);
2699 v2.run(sh->ir);
2700 visit_exec_list(sh->ir, &v1);
2701
2702 /* _mesa_delete_shader will try to free sh->Source but it's static const */
2703 sh->Source = NULL;
2704 _mesa_delete_shader(ctx, sh);
2705
2706 nir_validate_shader(nir, "float64_funcs_to_nir");
2707
2708 NIR_PASS_V(nir, nir_lower_constant_initializers, nir_var_function_temp);
2709 NIR_PASS_V(nir, nir_lower_returns);
2710 NIR_PASS_V(nir, nir_inline_functions);
2711 NIR_PASS_V(nir, nir_opt_deref);
2712
2713 /* Do some optimizations to clean up the shader now. By optimizing the
2714 * functions in the library, we avoid having to re-do that work every
2715 * time we inline a copy of a function. Reducing basic blocks also helps
2716 * with compile times.
2717 */
2718 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
2719 NIR_PASS_V(nir, nir_copy_prop);
2720 NIR_PASS_V(nir, nir_opt_dce);
2721 NIR_PASS_V(nir, nir_opt_cse);
2722 NIR_PASS_V(nir, nir_opt_gcm, true);
2723 NIR_PASS_V(nir, nir_opt_peephole_select, 1, false, false);
2724 NIR_PASS_V(nir, nir_opt_dce);
2725
2726 return nir;
2727 }