Major changes to how SimObjects are created and initialized. Almost all
[gem5.git] / src / cpu / ozone / simple_cpu_builder.cc
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31 #include <string>
32
33 #include "cpu/checker/cpu.hh"
34 #include "cpu/inst_seq.hh"
35 #include "cpu/ozone/cpu_impl.hh"
36 #include "cpu/ozone/simple_impl.hh"
37 #include "cpu/ozone/simple_params.hh"
38 #include "mem/cache/base_cache.hh"
39 #include "sim/SimpleOzoneCPU.hh"
40 #include "sim/process.hh"
41 #include "sim/sim_object.hh"
42
43 template
44 class OzoneCPU<SimpleImpl>;
45
46 class SimpleOzoneCPU : public OzoneCPU<SimpleImpl>
47 {
48 public:
49 SimpleOzoneCPU(SimpleParams *p)
50 : OzoneCPU<SimpleImpl>(p)
51 { }
52 };
53
54 ////////////////////////////////////////////////////////////////////////
55 //
56 // OzoneCPU Simulation Object
57 //
58 SimpleOzoneCPU *
59 SimpleOzoneCPUParams::create()
60 {
61 SimpleOzoneCPU *cpu;
62
63 #if FULL_SYSTEM
64 // Full-system only supports a single thread for the moment.
65 int actual_num_threads = 1;
66 #else
67 // In non-full-system mode, we infer the number of threads from
68 // the workload if it's not explicitly specified.
69 int actual_num_threads =
70 numThreads.isValid() ? numThreads : workload.size();
71
72 if (workload.size() == 0) {
73 fatal("Must specify at least one workload!");
74 }
75
76 #endif
77
78 SimpleParams *params = new SimpleParams;
79
80 params->clock = clock;
81
82 params->name = name;
83 params->numberOfThreads = actual_num_threads;
84
85 #if FULL_SYSTEM
86 params->system = system;
87 params->cpu_id = cpu_id;
88 params->itb = itb;
89 params->dtb = dtb;
90 #else
91 params->workload = workload;
92 // params->pTable = page_table;
93 #endif // FULL_SYSTEM
94
95 params->mem = mem;
96 params->checker = checker;
97 params->max_insts_any_thread = max_insts_any_thread;
98 params->max_insts_all_threads = max_insts_all_threads;
99 params->max_loads_any_thread = max_loads_any_thread;
100 params->max_loads_all_threads = max_loads_all_threads;
101
102 //
103 // Caches
104 //
105 params->icacheInterface = icache ? icache->getInterface() : NULL;
106 params->dcacheInterface = dcache ? dcache->getInterface() : NULL;
107 params->cachePorts = cachePorts;
108
109 params->width = width;
110 params->frontEndWidth = frontEndWidth;
111 params->backEndWidth = backEndWidth;
112 params->backEndSquashLatency = backEndSquashLatency;
113 params->backEndLatency = backEndLatency;
114 params->maxInstBufferSize = maxInstBufferSize;
115 params->numPhysicalRegs = numPhysIntRegs + numPhysFloatRegs;
116
117 params->decodeToFetchDelay = decodeToFetchDelay;
118 params->renameToFetchDelay = renameToFetchDelay;
119 params->iewToFetchDelay = iewToFetchDelay;
120 params->commitToFetchDelay = commitToFetchDelay;
121 params->fetchWidth = fetchWidth;
122
123 params->renameToDecodeDelay = renameToDecodeDelay;
124 params->iewToDecodeDelay = iewToDecodeDelay;
125 params->commitToDecodeDelay = commitToDecodeDelay;
126 params->fetchToDecodeDelay = fetchToDecodeDelay;
127 params->decodeWidth = decodeWidth;
128
129 params->iewToRenameDelay = iewToRenameDelay;
130 params->commitToRenameDelay = commitToRenameDelay;
131 params->decodeToRenameDelay = decodeToRenameDelay;
132 params->renameWidth = renameWidth;
133
134 params->commitToIEWDelay = commitToIEWDelay;
135 params->renameToIEWDelay = renameToIEWDelay;
136 params->issueToExecuteDelay = issueToExecuteDelay;
137 params->issueWidth = issueWidth;
138 params->executeWidth = executeWidth;
139 params->executeIntWidth = executeIntWidth;
140 params->executeFloatWidth = executeFloatWidth;
141 params->executeBranchWidth = executeBranchWidth;
142 params->executeMemoryWidth = executeMemoryWidth;
143
144 params->iewToCommitDelay = iewToCommitDelay;
145 params->renameToROBDelay = renameToROBDelay;
146 params->commitWidth = commitWidth;
147 params->squashWidth = squashWidth;
148
149 params->predType = predType;
150 params->localPredictorSize = localPredictorSize;
151 params->localCtrBits = localCtrBits;
152 params->localHistoryTableSize = localHistoryTableSize;
153 params->localHistoryBits = localHistoryBits;
154 params->globalPredictorSize = globalPredictorSize;
155 params->globalCtrBits = globalCtrBits;
156 params->globalHistoryBits = globalHistoryBits;
157 params->choicePredictorSize = choicePredictorSize;
158 params->choiceCtrBits = choiceCtrBits;
159
160 params->BTBEntries = BTBEntries;
161 params->BTBTagSize = BTBTagSize;
162
163 params->RASSize = RASSize;
164
165 params->LQEntries = LQEntries;
166 params->SQEntries = SQEntries;
167
168 params->SSITSize = SSITSize;
169 params->LFSTSize = LFSTSize;
170
171 params->numPhysIntRegs = numPhysIntRegs;
172 params->numPhysFloatRegs = numPhysFloatRegs;
173 params->numIQEntries = numIQEntries;
174 params->numROBEntries = numROBEntries;
175
176 params->decoupledFrontEnd = decoupledFrontEnd;
177 params->dispatchWidth = dispatchWidth;
178 params->wbWidth = wbWidth;
179
180 params->smtNumFetchingThreads = smtNumFetchingThreads;
181 params->smtFetchPolicy = smtFetchPolicy;
182 params->smtIQPolicy = smtIQPolicy;
183 params->smtLSQPolicy = smtLSQPolicy;
184 params->smtLSQThreshold = smtLSQThreshold;
185 params->smtROBPolicy = smtROBPolicy;
186 params->smtROBThreshold = smtROBThreshold;
187 params->smtCommitPolicy = smtCommitPolicy;
188
189 params->instShiftAmt = 2;
190
191 params->deferRegistration = defer_registration;
192
193 params->functionTrace = function_trace;
194 params->functionTraceStart = function_trace_start;
195
196 cpu = new SimpleOzoneCPU(params);
197
198 return cpu;
199 }