Major changes to how SimObjects are created and initialized. Almost all
[gem5.git] / src / dev / SConscript
1 # -*- mode:python -*-
2
3 # Copyright (c) 2006 The Regents of The University of Michigan
4 # All rights reserved.
5 #
6 # Redistribution and use in source and binary forms, with or without
7 # modification, are permitted provided that the following conditions are
8 # met: redistributions of source code must retain the above copyright
9 # notice, this list of conditions and the following disclaimer;
10 # redistributions in binary form must reproduce the above copyright
11 # notice, this list of conditions and the following disclaimer in the
12 # documentation and/or other materials provided with the distribution;
13 # neither the name of the copyright holders nor the names of its
14 # contributors may be used to endorse or promote products derived from
15 # this software without specific prior written permission.
16 #
17 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #
29 # Authors: Steve Reinhardt
30 # Gabe Black
31
32 Import('*')
33
34 if env['FULL_SYSTEM']:
35 SimObject('BadDevice.py')
36 SimObject('Device.py')
37 SimObject('DiskImage.py')
38 SimObject('Ethernet.py')
39 SimObject('Ide.py')
40 SimObject('Pci.py')
41 SimObject('Platform.py')
42 SimObject('SimConsole.py')
43 SimObject('SimpleDisk.py')
44 SimObject('Uart.py')
45
46 Source('baddev.cc')
47 Source('disk_image.cc')
48 Source('etherbus.cc')
49 Source('etherdump.cc')
50 Source('etherint.cc')
51 Source('etherlink.cc')
52 Source('etherpkt.cc')
53 Source('ethertap.cc')
54 Source('i8254xGBe.cc')
55 Source('ide_ctrl.cc')
56 Source('ide_disk.cc')
57 Source('io_device.cc')
58 Source('isa_fake.cc')
59 Source('ns_gige.cc')
60 Source('pciconfigall.cc')
61 Source('pcidev.cc')
62 Source('pktfifo.cc')
63 Source('platform.cc')
64 Source('simconsole.cc')
65 Source('simple_disk.cc')
66 Source('sinic.cc')
67 Source('uart.cc')
68 Source('uart8250.cc')