Major changes to how SimObjects are created and initialized. Almost all
[gem5.git] / src / dev / pciconfigall.cc
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Andrew Schultz
29 * Ali Saidi
30 */
31
32 /* @file
33 * PCI Configspace implementation
34 */
35
36 #include "base/trace.hh"
37 #include "dev/pciconfigall.hh"
38 #include "dev/pcireg.h"
39 #include "dev/platform.hh"
40 #include "mem/packet.hh"
41 #include "mem/packet_access.hh"
42 #include "params/PciConfigAll.hh"
43 #include "sim/system.hh"
44
45 using namespace std;
46
47 PciConfigAll::PciConfigAll(Params *p)
48 : PioDevice(p)
49 {
50 pioAddr = p->platform->calcConfigAddr(params()->bus,0,0);
51 }
52
53
54 Tick
55 PciConfigAll::read(PacketPtr pkt)
56 {
57 assert(pkt->result == Packet::Unknown);
58
59 pkt->allocate();
60
61 DPRINTF(PciConfigAll, "read va=%#x size=%d\n", pkt->getAddr(),
62 pkt->getSize());
63
64 switch (pkt->getSize()) {
65 case sizeof(uint32_t):
66 pkt->set<uint32_t>(0xFFFFFFFF);
67 break;
68 case sizeof(uint16_t):
69 pkt->set<uint16_t>(0xFFFF);
70 break;
71 case sizeof(uint8_t):
72 pkt->set<uint8_t>(0xFF);
73 break;
74 default:
75 panic("invalid access size(?) for PCI configspace!\n");
76 }
77 pkt->result = Packet::Success;
78 return params()->pio_delay;
79 }
80
81 Tick
82 PciConfigAll::write(PacketPtr pkt)
83 {
84 assert(pkt->result == Packet::Unknown);
85 panic("Attempting to write to config space on non-existant device\n");
86 M5_DUMMY_RETURN
87 }
88
89
90 void
91 PciConfigAll::addressRanges(AddrRangeList &range_list)
92 {
93 range_list.clear();
94 range_list.push_back(RangeSize(pioAddr, params()->size));
95 }
96
97
98 #ifndef DOXYGEN_SHOULD_SKIP_THIS
99
100 PciConfigAll *
101 PciConfigAllParams::create()
102 {
103 PciConfigAll::Params *p = new PciConfigAll::Params;
104 p->pio_delay = pio_latency;
105 p->platform = platform;
106 p->system = system;
107 p->bus = bus;
108 p->size = size;
109
110 return new PciConfigAll(p);
111 }
112
113 #endif // DOXYGEN_SHOULD_SKIP_THIS