nir: Combine lower_fmod16/32 back into a single lower_fmod.
[mesa.git] / src / freedreno / ir3 / ir3_nir.c
1 /*
2 * Copyright (C) 2015 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27
28 #include "util/debug.h"
29 #include "util/u_math.h"
30
31 #include "ir3_nir.h"
32 #include "ir3_compiler.h"
33 #include "ir3_shader.h"
34
35 static void ir3_setup_const_state(struct ir3_shader *shader, nir_shader *nir);
36
37 static const nir_shader_compiler_options options = {
38 .lower_fpow = true,
39 .lower_scmp = true,
40 .lower_flrp32 = true,
41 .lower_flrp64 = true,
42 .lower_ffract = true,
43 .lower_fmod = true,
44 .lower_fdiv = true,
45 .lower_isign = true,
46 .lower_ldexp = true,
47 .lower_uadd_carry = true,
48 .lower_mul_high = true,
49 .fuse_ffma = true,
50 .vertex_id_zero_based = true,
51 .lower_extract_byte = true,
52 .lower_extract_word = true,
53 .lower_all_io_to_elements = true,
54 .lower_helper_invocation = true,
55 .lower_bitfield_insert_to_shifts = true,
56 .lower_bitfield_extract_to_shifts = true,
57 .lower_bfm = true,
58 .use_interpolated_input_intrinsics = true,
59 };
60
61 /* we don't want to lower vertex_id to _zero_based on newer gpus: */
62 static const nir_shader_compiler_options options_a6xx = {
63 .lower_fpow = true,
64 .lower_scmp = true,
65 .lower_flrp32 = true,
66 .lower_flrp64 = true,
67 .lower_ffract = true,
68 .lower_fmod = true,
69 .lower_fdiv = true,
70 .lower_isign = true,
71 .lower_ldexp = true,
72 .lower_uadd_carry = true,
73 .lower_mul_high = true,
74 .fuse_ffma = true,
75 .vertex_id_zero_based = false,
76 .lower_extract_byte = true,
77 .lower_extract_word = true,
78 .lower_all_io_to_elements = true,
79 .lower_helper_invocation = true,
80 .lower_bitfield_insert_to_shifts = true,
81 .lower_bitfield_extract_to_shifts = true,
82 .lower_bfm = true,
83 .use_interpolated_input_intrinsics = true,
84 };
85
86 const nir_shader_compiler_options *
87 ir3_get_compiler_options(struct ir3_compiler *compiler)
88 {
89 if (compiler->gpu_id >= 600)
90 return &options_a6xx;
91 return &options;
92 }
93
94 /* for given shader key, are any steps handled in nir? */
95 bool
96 ir3_key_lowers_nir(const struct ir3_shader_key *key)
97 {
98 return key->fsaturate_s | key->fsaturate_t | key->fsaturate_r |
99 key->vsaturate_s | key->vsaturate_t | key->vsaturate_r |
100 key->ucp_enables | key->color_two_side |
101 key->fclamp_color | key->vclamp_color;
102 }
103
104 #define OPT(nir, pass, ...) ({ \
105 bool this_progress = false; \
106 NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__); \
107 this_progress; \
108 })
109
110 #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
111
112 static void
113 ir3_optimize_loop(nir_shader *s)
114 {
115 bool progress;
116 unsigned lower_flrp =
117 (s->options->lower_flrp16 ? 16 : 0) |
118 (s->options->lower_flrp32 ? 32 : 0) |
119 (s->options->lower_flrp64 ? 64 : 0);
120
121 do {
122 progress = false;
123
124 OPT_V(s, nir_lower_vars_to_ssa);
125 progress |= OPT(s, nir_opt_copy_prop_vars);
126 progress |= OPT(s, nir_opt_dead_write_vars);
127 progress |= OPT(s, nir_lower_alu_to_scalar, NULL);
128 progress |= OPT(s, nir_lower_phis_to_scalar);
129
130 progress |= OPT(s, nir_copy_prop);
131 progress |= OPT(s, nir_opt_dce);
132 progress |= OPT(s, nir_opt_cse);
133 static int gcm = -1;
134 if (gcm == -1)
135 gcm = env_var_as_unsigned("GCM", 0);
136 if (gcm == 1)
137 progress |= OPT(s, nir_opt_gcm, true);
138 else if (gcm == 2)
139 progress |= OPT(s, nir_opt_gcm, false);
140 progress |= OPT(s, nir_opt_peephole_select, 16, true, true);
141 progress |= OPT(s, nir_opt_intrinsics);
142 progress |= OPT(s, nir_opt_algebraic);
143 progress |= OPT(s, nir_opt_constant_folding);
144
145 if (lower_flrp != 0) {
146 if (OPT(s, nir_lower_flrp,
147 lower_flrp,
148 false /* always_precise */,
149 s->options->lower_ffma)) {
150 OPT(s, nir_opt_constant_folding);
151 progress = true;
152 }
153
154 /* Nothing should rematerialize any flrps, so we only
155 * need to do this lowering once.
156 */
157 lower_flrp = 0;
158 }
159
160 progress |= OPT(s, nir_opt_dead_cf);
161 if (OPT(s, nir_opt_trivial_continues)) {
162 progress |= true;
163 /* If nir_opt_trivial_continues makes progress, then we need to clean
164 * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll
165 * to make progress.
166 */
167 OPT(s, nir_copy_prop);
168 OPT(s, nir_opt_dce);
169 }
170 progress |= OPT(s, nir_opt_if, false);
171 progress |= OPT(s, nir_opt_remove_phis);
172 progress |= OPT(s, nir_opt_undef);
173
174 } while (progress);
175 }
176
177 struct nir_shader *
178 ir3_optimize_nir(struct ir3_shader *shader, nir_shader *s,
179 const struct ir3_shader_key *key)
180 {
181 struct nir_lower_tex_options tex_options = {
182 .lower_rect = 0,
183 .lower_tg4_offsets = true,
184 };
185
186 if (key) {
187 switch (shader->type) {
188 case MESA_SHADER_FRAGMENT:
189 tex_options.saturate_s = key->fsaturate_s;
190 tex_options.saturate_t = key->fsaturate_t;
191 tex_options.saturate_r = key->fsaturate_r;
192 break;
193 case MESA_SHADER_VERTEX:
194 tex_options.saturate_s = key->vsaturate_s;
195 tex_options.saturate_t = key->vsaturate_t;
196 tex_options.saturate_r = key->vsaturate_r;
197 break;
198 default:
199 /* TODO */
200 break;
201 }
202 }
203
204 if (shader->compiler->gpu_id >= 400) {
205 /* a4xx seems to have *no* sam.p */
206 tex_options.lower_txp = ~0; /* lower all txp */
207 } else {
208 /* a3xx just needs to avoid sam.p for 3d tex */
209 tex_options.lower_txp = (1 << GLSL_SAMPLER_DIM_3D);
210 }
211
212 if (ir3_shader_debug & IR3_DBG_DISASM) {
213 debug_printf("----------------------\n");
214 nir_print_shader(s, stdout);
215 debug_printf("----------------------\n");
216 }
217
218 OPT_V(s, nir_lower_regs_to_ssa);
219 OPT_V(s, ir3_nir_lower_io_offsets);
220
221 if (key) {
222 if (s->info.stage == MESA_SHADER_VERTEX) {
223 OPT_V(s, nir_lower_clip_vs, key->ucp_enables, false);
224 if (key->vclamp_color)
225 OPT_V(s, nir_lower_clamp_color_outputs);
226 } else if (s->info.stage == MESA_SHADER_FRAGMENT) {
227 OPT_V(s, nir_lower_clip_fs, key->ucp_enables);
228 if (key->fclamp_color)
229 OPT_V(s, nir_lower_clamp_color_outputs);
230 }
231 if (key->color_two_side) {
232 OPT_V(s, nir_lower_two_sided_color);
233 }
234 } else {
235 /* only want to do this the first time (when key is null)
236 * and not again on any potential 2nd variant lowering pass:
237 */
238 OPT_V(s, ir3_nir_apply_trig_workarounds);
239
240 /* This wouldn't hurt to run multiple times, but there is
241 * no need to:
242 */
243 if (shader->type == MESA_SHADER_FRAGMENT)
244 OPT_V(s, nir_lower_fb_read);
245 }
246
247 OPT_V(s, nir_lower_tex, &tex_options);
248 OPT_V(s, nir_lower_load_const_to_scalar);
249 if (shader->compiler->gpu_id < 500)
250 OPT_V(s, ir3_nir_lower_tg4_to_tex);
251
252 ir3_optimize_loop(s);
253
254 /* do ubo load and idiv lowering after first opt loop to get a chance to
255 * propagate constants for divide by immed power-of-two and constant ubo
256 * block/offsets:
257 *
258 * NOTE that UBO analysis pass should only be done once, before variants
259 */
260 const bool ubo_progress = !key && OPT(s, ir3_nir_analyze_ubo_ranges, shader);
261 const bool idiv_progress = OPT(s, nir_lower_idiv);
262 if (ubo_progress || idiv_progress)
263 ir3_optimize_loop(s);
264
265 OPT_V(s, nir_remove_dead_variables, nir_var_function_temp);
266
267 OPT_V(s, nir_move_load_const);
268
269 if (ir3_shader_debug & IR3_DBG_DISASM) {
270 debug_printf("----------------------\n");
271 nir_print_shader(s, stdout);
272 debug_printf("----------------------\n");
273 }
274
275 nir_sweep(s);
276
277 /* The first time thru, when not creating variant, do the one-time
278 * const_state layout setup. This should be done after ubo range
279 * analysis.
280 */
281 if (!key) {
282 ir3_setup_const_state(shader, s);
283 }
284
285 return s;
286 }
287
288 static void
289 ir3_nir_scan_driver_consts(nir_shader *shader,
290 struct ir3_const_state *layout)
291 {
292 nir_foreach_function(function, shader) {
293 if (!function->impl)
294 continue;
295
296 nir_foreach_block(block, function->impl) {
297 nir_foreach_instr(instr, block) {
298 if (instr->type != nir_instr_type_intrinsic)
299 continue;
300
301 nir_intrinsic_instr *intr =
302 nir_instr_as_intrinsic(instr);
303 unsigned idx;
304
305 switch (intr->intrinsic) {
306 case nir_intrinsic_get_buffer_size:
307 idx = nir_src_as_uint(intr->src[0]);
308 if (layout->ssbo_size.mask & (1 << idx))
309 break;
310 layout->ssbo_size.mask |= (1 << idx);
311 layout->ssbo_size.off[idx] =
312 layout->ssbo_size.count;
313 layout->ssbo_size.count += 1; /* one const per */
314 break;
315 case nir_intrinsic_image_deref_atomic_add:
316 case nir_intrinsic_image_deref_atomic_min:
317 case nir_intrinsic_image_deref_atomic_max:
318 case nir_intrinsic_image_deref_atomic_and:
319 case nir_intrinsic_image_deref_atomic_or:
320 case nir_intrinsic_image_deref_atomic_xor:
321 case nir_intrinsic_image_deref_atomic_exchange:
322 case nir_intrinsic_image_deref_atomic_comp_swap:
323 case nir_intrinsic_image_deref_store:
324 case nir_intrinsic_image_deref_size:
325 idx = nir_intrinsic_get_var(intr, 0)->data.driver_location;
326 if (layout->image_dims.mask & (1 << idx))
327 break;
328 layout->image_dims.mask |= (1 << idx);
329 layout->image_dims.off[idx] =
330 layout->image_dims.count;
331 layout->image_dims.count += 3; /* three const per */
332 break;
333 default:
334 break;
335 }
336 }
337 }
338 }
339 }
340
341 static void
342 ir3_setup_const_state(struct ir3_shader *shader, nir_shader *nir)
343 {
344 struct ir3_compiler *compiler = shader->compiler;
345 struct ir3_const_state *const_state = &shader->const_state;
346
347 memset(&const_state->offsets, ~0, sizeof(const_state->offsets));
348
349 ir3_nir_scan_driver_consts(nir, const_state);
350
351 const_state->num_uniforms = nir->num_uniforms;
352 const_state->num_ubos = nir->info.num_ubos;
353
354 debug_assert((shader->ubo_state.size % 16) == 0);
355 unsigned constoff = align(shader->ubo_state.size / 16, 4);
356 unsigned ptrsz = ir3_pointer_size(compiler);
357
358 if (const_state->num_ubos > 0) {
359 const_state->offsets.ubo = constoff;
360 constoff += align(nir->info.num_ubos * ptrsz, 4) / 4;
361 }
362
363 if (const_state->ssbo_size.count > 0) {
364 unsigned cnt = const_state->ssbo_size.count;
365 const_state->offsets.ssbo_sizes = constoff;
366 constoff += align(cnt, 4) / 4;
367 }
368
369 if (const_state->image_dims.count > 0) {
370 unsigned cnt = const_state->image_dims.count;
371 const_state->offsets.image_dims = constoff;
372 constoff += align(cnt, 4) / 4;
373 }
374
375 unsigned num_driver_params = 0;
376 if (shader->type == MESA_SHADER_VERTEX) {
377 num_driver_params = IR3_DP_VS_COUNT;
378 } else if (shader->type == MESA_SHADER_COMPUTE) {
379 num_driver_params = IR3_DP_CS_COUNT;
380 }
381
382 const_state->offsets.driver_param = constoff;
383 constoff += align(num_driver_params, 4) / 4;
384
385 if ((shader->type == MESA_SHADER_VERTEX) &&
386 (compiler->gpu_id < 500) &&
387 shader->stream_output.num_outputs > 0) {
388 const_state->offsets.tfbo = constoff;
389 constoff += align(IR3_MAX_SO_BUFFERS * ptrsz, 4) / 4;
390 }
391
392 const_state->offsets.immediate = constoff;
393 }