src/gallium/drivers/etnaviv/etnaviv_texture.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  */
  26
  27 #include "etnaviv_texture.h"
  28
  29 #include "hw/common.xml.h"
  30
  31 #include "etnaviv_clear_blit.h"
  32 #include "etnaviv_context.h"
  33 #include "etnaviv_emit.h"
  34 #include "etnaviv_format.h"
  35 #include "etnaviv_translate.h"
  36 #include "util/u_inlines.h"
  37 #include "util/u_memory.h"
  38
  39 #include <drm_fourcc.h>
  40
  41 static void *
  42 etna_create_sampler_state(struct pipe_context *pipe,
  43                           const struct pipe_sampler_state *ss)
  44 {
  45    struct etna_sampler_state *cs = CALLOC_STRUCT(etna_sampler_state);
  46
  47    if (!cs)
  48       return NULL;
  49
  50    cs->TE_SAMPLER_CONFIG0 =
  51       VIVS_TE_SAMPLER_CONFIG0_UWRAP(translate_texture_wrapmode(ss->wrap_s)) |
  52       VIVS_TE_SAMPLER_CONFIG0_VWRAP(translate_texture_wrapmode(ss->wrap_t)) |
  53       VIVS_TE_SAMPLER_CONFIG0_MIN(translate_texture_filter(ss->min_img_filter)) |
  54       VIVS_TE_SAMPLER_CONFIG0_MIP(translate_texture_mipfilter(ss->min_mip_filter)) |
  55       VIVS_TE_SAMPLER_CONFIG0_MAG(translate_texture_filter(ss->mag_img_filter)) |
  56       COND(ss->normalized_coords, VIVS_TE_SAMPLER_CONFIG0_ROUND_UV);
  57    cs->TE_SAMPLER_CONFIG1 = 0; /* VIVS_TE_SAMPLER_CONFIG1 (swizzle, extended
  58                                   format) fully determined by sampler view */
  59    cs->TE_SAMPLER_LOD_CONFIG =
  60       COND(ss->lod_bias != 0.0, VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE) |
  61       VIVS_TE_SAMPLER_LOD_CONFIG_BIAS(etna_float_to_fixp55(ss->lod_bias));
  62
  63    if (ss->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
  64       cs->min_lod = etna_float_to_fixp55(ss->min_lod);
  65       cs->max_lod = etna_float_to_fixp55(ss->max_lod);
  66    } else {
  67       /* when not mipmapping, we need to set max/min lod so that always
  68        * lowest LOD is selected */
  69       cs->min_lod = cs->max_lod = etna_float_to_fixp55(ss->min_lod);
  70    }
  71
  72    return cs;
  73 }
  74
  75 static void
  76 etna_bind_sampler_states(struct pipe_context *pctx, enum pipe_shader_type shader,
  77                          unsigned start_slot, unsigned num_samplers,
  78                          void **samplers)
  79 {
  80    /* bind fragment sampler */
  81    struct etna_context *ctx = etna_context(pctx);
  82    int offset;
  83
  84    switch (shader) {
  85    case PIPE_SHADER_FRAGMENT:
  86       offset = 0;
  87       ctx->num_fragment_samplers = num_samplers;
  88       break;
  89    case PIPE_SHADER_VERTEX:
  90       offset = ctx->specs.vertex_sampler_offset;
  91       break;
  92    default:
  93       assert(!"Invalid shader");
  94       return;
  95    }
  96
  97    uint32_t mask = 1 << offset;
  98    for (int idx = 0; idx < num_samplers; ++idx, mask <<= 1) {
  99       ctx->sampler[offset + idx] = samplers[idx];
 100       if (samplers[idx])
 101          ctx->active_samplers |= mask;
 102       else
 103          ctx->active_samplers &= ~mask;
 104    }
 105
 106    ctx->dirty |= ETNA_DIRTY_SAMPLERS;
 107 }
 108
 109 static void
 110 etna_delete_sampler_state(struct pipe_context *pctx, void *ss)
 111 {
 112    FREE(ss);
 113 }
 114
 115 /* Return true if the GPU can use sampler TS with this sampler view.
 116  * Sampler TS is an optimization used when rendering to textures, where
 117  * a resolve-in-place can be avoided when rendering has left a (valid) TS.
 118  */
 119 static bool
 120 etna_can_use_sampler_ts(struct pipe_sampler_view *view, int num)
 121 {
 122     /* Can use sampler TS when:
 123      * - the hardware supports sampler TS.
 124      * - the sampler view will be bound to sampler <VIVS_TS_SAMPLER__LEN.
 125      *   HALTI5 adds a mapping from sampler to sampler TS unit, but this is AFAIK
 126      *   absent on earlier models.
 127      * - it is a texture, not a buffer.
 128      * - the sampler view has a supported format for sampler TS.
 129      * - the sampler will have one LOD, and it happens to be level 0.
 130      *   (it is not sure if the hw supports it for other levels, but available
 131      *   state strongly suggests only one at a time).
 132      * - the resource TS is valid for level 0.
 133      */
 134    struct etna_resource *rsc = etna_resource(view->texture);
 135    struct etna_screen *screen = etna_screen(rsc->base.screen);
 136    return VIV_FEATURE(screen, chipMinorFeatures2, TEXTURE_TILED_READ) &&
 137       num < VIVS_TS_SAMPLER__LEN &&
 138       rsc->base.target != PIPE_BUFFER &&
 139       translate_ts_sampler_format(rsc->base.format) != ETNA_NO_MATCH &&
 140       view->u.tex.first_level == 0 && MIN2(view->u.tex.last_level, rsc->base.last_level) == 0 &&
 141       rsc->levels[0].ts_valid;
 142 }
 143
 144 static void
 145 etna_configure_sampler_ts(struct pipe_sampler_view *pview, bool enable)
 146 {
 147    struct etna_sampler_view *view = etna_sampler_view(pview);
 148    if (enable) {
 149       struct etna_resource *rsc = etna_resource(view->base.texture);
 150       struct etna_resource_level *lev = &rsc->levels[0];
 151       assert(rsc->ts_bo && lev->ts_valid);
 152
 153       view->TE_SAMPLER_CONFIG1 |= VIVS_TE_SAMPLER_CONFIG1_USE_TS;
 154       view->TS_SAMPLER_CONFIG =
 155          VIVS_TS_SAMPLER_CONFIG_ENABLE(1) |
 156          VIVS_TS_SAMPLER_CONFIG_FORMAT(translate_ts_sampler_format(rsc->base.format));
 157       view->TS_SAMPLER_CLEAR_VALUE = lev->clear_value;
 158       view->TS_SAMPLER_CLEAR_VALUE2 = lev->clear_value; /* To handle 64-bit formats this needs a different value */
 159       view->TS_SAMPLER_STATUS_BASE.bo = rsc->ts_bo;
 160       view->TS_SAMPLER_STATUS_BASE.offset = lev->ts_offset;
 161       view->TS_SAMPLER_STATUS_BASE.flags = ETNA_RELOC_READ;
 162    } else {
 163       view->TE_SAMPLER_CONFIG1 &= ~VIVS_TE_SAMPLER_CONFIG1_USE_TS;
 164       view->TS_SAMPLER_CONFIG = 0;
 165       view->TS_SAMPLER_STATUS_BASE.bo = NULL;
 166    }
 167    /* n.b.: relies on caller to mark ETNA_DIRTY_SAMPLER_VIEWS */
 168 }
 169
 170 static void
 171 etna_update_sampler_source(struct pipe_sampler_view *view, int num)
 172 {
 173    struct etna_resource *base = etna_resource(view->texture);
 174    struct etna_resource *to = base, *from = base;
 175    bool enable_sampler_ts = false;
 176
 177    if (base->external && etna_resource_newer(etna_resource(base->external), base))
 178       from = etna_resource(base->external);
 179
 180    if (base->texture)
 181       to = etna_resource(base->texture);
 182
 183    if ((to != from) && etna_resource_older(to, from)) {
 184       etna_copy_resource(view->context, &to->base, &from->base, 0,
 185                          view->texture->last_level);
 186       to->seqno = from->seqno;
 187    } else if ((to == from) && etna_resource_needs_flush(to)) {
 188       if (etna_can_use_sampler_ts(view, num)) {
 189          enable_sampler_ts = true;
 190          /* Do not set flush_seqno because the resolve-to-self was bypassed */
 191       } else {
 192          /* Resolve TS if needed */
 193          etna_copy_resource(view->context, &to->base, &from->base, 0,
 194                             view->texture->last_level);
 195          to->flush_seqno = from->seqno;
 196       }
 197    }
 198    etna_configure_sampler_ts(view, enable_sampler_ts);
 199 }
 200
 201 static bool
 202 etna_resource_sampler_compatible(struct etna_resource *res)
 203 {
 204    if (util_format_is_compressed(res->base.format))
 205       return true;
 206
 207    struct etna_screen *screen = etna_screen(res->base.screen);
 208    /* This GPU supports texturing from supertiled textures? */
 209    if (res->layout == ETNA_LAYOUT_SUPER_TILED && VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE))
 210       return true;
 211
 212    /* TODO: LINEAR_TEXTURE_SUPPORT */
 213
 214    /* Otherwise, only support tiled layouts */
 215    if (res->layout != ETNA_LAYOUT_TILED)
 216       return false;
 217
 218    /* If we have HALIGN support, we can allow for the RS padding */
 219    if (VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN))
 220       return true;
 221
 222    /* Non-HALIGN GPUs only accept 4x4 tile-aligned textures */
 223    if (res->halign != TEXTURE_HALIGN_FOUR)
 224       return false;
 225
 226    return true;
 227 }
 228
 229 struct etna_resource *
 230 etna_texture_handle_incompatible(struct pipe_context *pctx, struct pipe_resource *prsc)
 231 {
 232    struct etna_resource *res = etna_resource(prsc);
 233    if (!etna_resource_sampler_compatible(res)) {
 234       /* The original resource is not compatible with the sampler.
 235        * Allocate an appropriately tiled texture. */
 236       if (!res->texture) {
 237          struct pipe_resource templat = *prsc;
 238
 239          templat.bind &= ~(PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET |
 240                            PIPE_BIND_BLENDABLE);
 241          res->texture =
 242             etna_resource_alloc(pctx->screen, ETNA_LAYOUT_TILED,
 243                                 DRM_FORMAT_MOD_LINEAR, &templat);
 244       }
 245
 246       if (!res->texture) {
 247          return NULL;
 248       }
 249       res = etna_resource(res->texture);
 250    }
 251    return res;
 252 }
 253
 254 static struct pipe_sampler_view *
 255 etna_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
 256                          const struct pipe_sampler_view *so)
 257 {
 258    struct etna_sampler_view *sv = CALLOC_STRUCT(etna_sampler_view);
 259    struct etna_context *ctx = etna_context(pctx);
 260    const uint32_t format = translate_texture_format(so->format);
 261    const bool ext = !!(format & EXT_FORMAT);
 262    const bool astc = !!(format & ASTC_FORMAT);
 263    const uint32_t swiz = get_texture_swiz(so->format, so->swizzle_r,
 264                                           so->swizzle_g, so->swizzle_b,
 265                                           so->swizzle_a);
 266
 267    if (!sv)
 268       return NULL;
 269
 270    struct etna_resource *res = etna_texture_handle_incompatible(pctx, prsc);
 271    if (!res) {
 272       free(sv);
 273       return NULL;
 274    }
 275
 276    sv->base = *so;
 277    pipe_reference_init(&sv->base.reference, 1);
 278    sv->base.texture = NULL;
 279    pipe_resource_reference(&sv->base.texture, prsc);
 280    sv->base.context = pctx;
 281
 282    /* merged with sampler state */
 283    sv->TE_SAMPLER_CONFIG0 = COND(!ext && !astc, VIVS_TE_SAMPLER_CONFIG0_FORMAT(format));
 284    sv->TE_SAMPLER_CONFIG0_MASK = 0xffffffff;
 285
 286    switch (sv->base.target) {
 287    case PIPE_TEXTURE_1D:
 288       /* For 1D textures, we will have a height of 1, so we can use 2D
 289        * but set T wrap to repeat */
 290       sv->TE_SAMPLER_CONFIG0_MASK = ~VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK;
 291       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_REPEAT);
 292       /* fallthrough */
 293    case PIPE_TEXTURE_2D:
 294    case PIPE_TEXTURE_RECT:
 295       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_2D);
 296       break;
 297    case PIPE_TEXTURE_CUBE:
 298       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_CUBE_MAP);
 299       break;
 300    default:
 301       BUG("Unhandled texture target");
 302       free(sv);
 303       return NULL;
 304    }
 305
 306    sv->TE_SAMPLER_CONFIG1 = COND(ext, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(format)) |
 307                             COND(astc, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(TEXTURE_FORMAT_EXT_ASTC)) |
 308                             VIVS_TE_SAMPLER_CONFIG1_HALIGN(res->halign) | swiz;
 309    sv->TE_SAMPLER_ASTC0 = COND(astc, VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT(format)) |
 310                           VIVS_NTE_SAMPLER_ASTC0_UNK8(0xc) |
 311                           VIVS_NTE_SAMPLER_ASTC0_UNK16(0xc) |
 312                           VIVS_NTE_SAMPLER_ASTC0_UNK24(0xc);
 313    sv->TE_SAMPLER_SIZE = VIVS_TE_SAMPLER_SIZE_WIDTH(res->base.width0) |
 314                          VIVS_TE_SAMPLER_SIZE_HEIGHT(res->base.height0);
 315    sv->TE_SAMPLER_LOG_SIZE =
 316       VIVS_TE_SAMPLER_LOG_SIZE_WIDTH(etna_log2_fixp55(res->base.width0)) |
 317       VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT(etna_log2_fixp55(res->base.height0)) |
 318       COND(util_format_is_srgb(so->format) && !astc, VIVS_TE_SAMPLER_LOG_SIZE_SRGB) |
 319       COND(astc, VIVS_TE_SAMPLER_LOG_SIZE_ASTC);
 320
 321    /* Set up levels-of-detail */
 322    for (int lod = 0; lod <= res->base.last_level; ++lod) {
 323       sv->TE_SAMPLER_LOD_ADDR[lod].bo = res->bo;
 324       sv->TE_SAMPLER_LOD_ADDR[lod].offset = res->levels[lod].offset;
 325       sv->TE_SAMPLER_LOD_ADDR[lod].flags = ETNA_RELOC_READ;
 326    }
 327    sv->min_lod = sv->base.u.tex.first_level << 5;
 328    sv->max_lod = MIN2(sv->base.u.tex.last_level, res->base.last_level) << 5;
 329
 330    /* Workaround for npot textures -- it appears that only CLAMP_TO_EDGE is
 331     * supported when the appropriate capability is not set. */
 332    if (!ctx->specs.npot_tex_any_wrap &&
 333        (!util_is_power_of_two(res->base.width0) || !util_is_power_of_two(res->base.height0))) {
 334       sv->TE_SAMPLER_CONFIG0_MASK = ~(VIVS_TE_SAMPLER_CONFIG0_UWRAP__MASK |
 335                                       VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK);
 336       sv->TE_SAMPLER_CONFIG0 |=
 337          VIVS_TE_SAMPLER_CONFIG0_UWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE) |
 338          VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE);
 339    }
 340
 341    return &sv->base;
 342 }
 343
 344 static void
 345 etna_sampler_view_destroy(struct pipe_context *pctx,
 346                           struct pipe_sampler_view *view)
 347 {
 348    pipe_resource_reference(&view->texture, NULL);
 349    FREE(view);
 350 }
 351
 352 static void
 353 set_sampler_views(struct etna_context *ctx, unsigned start, unsigned end,
 354                   unsigned nr, struct pipe_sampler_view **views)
 355 {
 356    unsigned i, j;
 357    uint32_t mask = 1 << start;
 358    uint32_t prev_active_sampler_views = ctx->active_sampler_views;
 359
 360    for (i = start, j = 0; j < nr; i++, j++, mask <<= 1) {
 361       pipe_sampler_view_reference(&ctx->sampler_view[i], views[j]);
 362       if (views[j]) {
 363          ctx->active_sampler_views |= mask;
 364          ctx->dirty_sampler_views |= mask;
 365       } else
 366          ctx->active_sampler_views &= ~mask;
 367    }
 368
 369    for (; i < end; i++, mask <<= 1) {
 370       pipe_sampler_view_reference(&ctx->sampler_view[i], NULL);
 371       ctx->active_sampler_views &= ~mask;
 372    }
 373
 374    /* sampler views that changed state (even to inactive) are also dirty */
 375    ctx->dirty_sampler_views |= ctx->active_sampler_views ^ prev_active_sampler_views;
 376 }
 377
 378 static inline void
 379 etna_fragtex_set_sampler_views(struct etna_context *ctx, unsigned nr,
 380                                struct pipe_sampler_view **views)
 381 {
 382    unsigned start = 0;
 383    unsigned end = start + ctx->specs.fragment_sampler_count;
 384
 385    set_sampler_views(ctx, start, end, nr, views);
 386    ctx->num_fragment_sampler_views = nr;
 387 }
 388
 389
 390 static inline void
 391 etna_vertex_set_sampler_views(struct etna_context *ctx, unsigned nr,
 392                               struct pipe_sampler_view **views)
 393 {
 394    unsigned start = ctx->specs.vertex_sampler_offset;
 395    unsigned end = start + ctx->specs.vertex_sampler_count;
 396
 397    set_sampler_views(ctx, start, end, nr, views);
 398 }
 399
 400 static void
 401 etna_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
 402                        unsigned start_slot, unsigned num_views,
 403                        struct pipe_sampler_view **views)
 404 {
 405    struct etna_context *ctx = etna_context(pctx);
 406    assert(start_slot == 0);
 407
 408    ctx->dirty |= ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_TEXTURE_CACHES;
 409
 410    for (unsigned idx = 0; idx < num_views; ++idx) {
 411       if (views[idx])
 412          etna_update_sampler_source(views[idx], idx);
 413    }
 414
 415    switch (shader) {
 416    case PIPE_SHADER_FRAGMENT:
 417       etna_fragtex_set_sampler_views(ctx, num_views, views);
 418       break;
 419    case PIPE_SHADER_VERTEX:
 420       etna_vertex_set_sampler_views(ctx, num_views, views);
 421       break;
 422    default:;
 423    }
 424 }
 425
 426 static void
 427 etna_texture_barrier(struct pipe_context *pctx, unsigned flags)
 428 {
 429    struct etna_context *ctx = etna_context(pctx);
 430    /* clear color and texture cache to make sure that texture unit reads
 431     * what has been written */
 432    etna_set_state(ctx->stream, VIVS_GL_FLUSH_CACHE, VIVS_GL_FLUSH_CACHE_COLOR | VIVS_GL_FLUSH_CACHE_TEXTURE);
 433 }
 434
 435 void
 436 etna_texture_init(struct pipe_context *pctx)
 437 {
 438    pctx->create_sampler_state = etna_create_sampler_state;
 439    pctx->bind_sampler_states = etna_bind_sampler_states;
 440    pctx->delete_sampler_state = etna_delete_sampler_state;
 441    pctx->set_sampler_views = etna_set_sampler_views;
 442    pctx->create_sampler_view = etna_create_sampler_view;
 443    pctx->sampler_view_destroy = etna_sampler_view_destroy;
 444    pctx->texture_barrier = etna_texture_barrier;
 445 }