src/gallium/drivers/freedreno/a2xx/fd2_texture.c

   1 /*
   2  * Copyright (C) 2012-2013 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #include "pipe/p_state.h"
  28 #include "util/u_string.h"
  29 #include "util/u_memory.h"
  30 #include "util/u_inlines.h"
  31
  32 #include "fd2_texture.h"
  33 #include "fd2_util.h"
  34
  35 static enum sq_tex_clamp
  36 tex_clamp(unsigned wrap)
  37 {
  38         switch (wrap) {
  39         case PIPE_TEX_WRAP_REPEAT:
  40                 return SQ_TEX_WRAP;
  41         case PIPE_TEX_WRAP_CLAMP:
  42                 return SQ_TEX_CLAMP_HALF_BORDER;
  43         case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
  44                 return SQ_TEX_CLAMP_LAST_TEXEL;
  45         case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
  46                 return SQ_TEX_CLAMP_BORDER;
  47         case PIPE_TEX_WRAP_MIRROR_REPEAT:
  48                 return SQ_TEX_MIRROR;
  49         case PIPE_TEX_WRAP_MIRROR_CLAMP:
  50                 return SQ_TEX_MIRROR_ONCE_HALF_BORDER;
  51         case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
  52                 return SQ_TEX_MIRROR_ONCE_LAST_TEXEL;
  53         case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
  54                 return SQ_TEX_MIRROR_ONCE_BORDER;
  55         default:
  56                 DBG("invalid wrap: %u", wrap);
  57                 return 0;
  58         }
  59 }
  60
  61 static enum sq_tex_filter
  62 tex_filter(unsigned filter)
  63 {
  64         switch (filter) {
  65         case PIPE_TEX_FILTER_NEAREST:
  66                 return SQ_TEX_FILTER_POINT;
  67         case PIPE_TEX_FILTER_LINEAR:
  68                 return SQ_TEX_FILTER_BILINEAR;
  69         default:
  70                 DBG("invalid filter: %u", filter);
  71                 return 0;
  72         }
  73 }
  74
  75 static enum sq_tex_filter
  76 mip_filter(unsigned filter)
  77 {
  78         switch (filter) {
  79         case PIPE_TEX_MIPFILTER_NONE:
  80                 return SQ_TEX_FILTER_BASEMAP;
  81         case PIPE_TEX_MIPFILTER_NEAREST:
  82                 return SQ_TEX_FILTER_POINT;
  83         case PIPE_TEX_MIPFILTER_LINEAR:
  84                 return SQ_TEX_FILTER_BILINEAR;
  85         default:
  86                 DBG("invalid filter: %u", filter);
  87                 return 0;
  88         }
  89 }
  90
  91 static void *
  92 fd2_sampler_state_create(struct pipe_context *pctx,
  93                 const struct pipe_sampler_state *cso)
  94 {
  95         struct fd2_sampler_stateobj *so = CALLOC_STRUCT(fd2_sampler_stateobj);
  96
  97         if (!so)
  98                 return NULL;
  99
 100         so->base = *cso;
 101
 102         /* TODO
 103          * cso->max_anisotropy
 104          * cso->normalized_coords (dealt with by shader for rect textures?)
 105          */
 106
 107         /* SQ_TEX0_PITCH() must be OR'd in later when we know the bound texture: */
 108         so->tex0 =
 109                 A2XX_SQ_TEX_0_CLAMP_X(tex_clamp(cso->wrap_s)) |
 110                 A2XX_SQ_TEX_0_CLAMP_Y(tex_clamp(cso->wrap_t)) |
 111                 A2XX_SQ_TEX_0_CLAMP_Z(tex_clamp(cso->wrap_r));
 112
 113         so->tex3 =
 114                 A2XX_SQ_TEX_3_XY_MAG_FILTER(tex_filter(cso->mag_img_filter)) |
 115                 A2XX_SQ_TEX_3_XY_MIN_FILTER(tex_filter(cso->min_img_filter)) |
 116                 A2XX_SQ_TEX_3_MIP_FILTER(mip_filter(cso->min_mip_filter));
 117
 118         so->tex4 = 0;
 119         if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE)
 120                 so->tex4 = A2XX_SQ_TEX_4_LOD_BIAS(cso->lod_bias);
 121
 122         return so;
 123 }
 124
 125 static void
 126 fd2_sampler_states_bind(struct pipe_context *pctx,
 127                 enum pipe_shader_type shader, unsigned start,
 128                 unsigned nr, void **hwcso)
 129 {
 130         if (!hwcso)
 131                 nr = 0;
 132
 133         if (shader == PIPE_SHADER_FRAGMENT) {
 134                 struct fd_context *ctx = fd_context(pctx);
 135
 136                 /* on a2xx, since there is a flat address space for textures/samplers,
 137                  * a change in # of fragment textures/samplers will trigger patching and
 138                  * re-emitting the vertex shader:
 139                  */
 140                 if (nr != ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers)
 141                         ctx->dirty |= FD_DIRTY_TEXSTATE;
 142         }
 143
 144         fd_sampler_states_bind(pctx, shader, start, nr, hwcso);
 145 }
 146
 147 static enum sq_tex_dimension
 148 tex_dimension(unsigned target)
 149 {
 150         switch (target) {
 151         default:
 152                 assert(0);
 153         case PIPE_TEXTURE_1D:
 154                 assert(0); /* TODO */
 155                 return SQ_TEX_DIMENSION_1D;
 156         case PIPE_TEXTURE_RECT:
 157         case PIPE_TEXTURE_2D:
 158                 return SQ_TEX_DIMENSION_2D;
 159         case PIPE_TEXTURE_3D:
 160                 assert(0); /* TODO */
 161                 return SQ_TEX_DIMENSION_3D;
 162         case PIPE_TEXTURE_CUBE:
 163                 return SQ_TEX_DIMENSION_CUBE;
 164         }
 165 }
 166
 167 static struct pipe_sampler_view *
 168 fd2_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
 169                 const struct pipe_sampler_view *cso)
 170 {
 171         struct fd2_pipe_sampler_view *so = CALLOC_STRUCT(fd2_pipe_sampler_view);
 172         struct fd_resource *rsc = fd_resource(prsc);
 173
 174         if (!so)
 175                 return NULL;
 176
 177         so->base = *cso;
 178         pipe_reference(NULL, &prsc->reference);
 179         so->base.texture = prsc;
 180         so->base.reference.count = 1;
 181         so->base.context = pctx;
 182
 183         so->tex0 =
 184                 A2XX_SQ_TEX_0_PITCH(rsc->slices[0].pitch) |
 185                 COND(rsc->tile_mode, A2XX_SQ_TEX_0_TILED);
 186         so->tex1 =
 187                 A2XX_SQ_TEX_1_FORMAT(fd2_pipe2surface(cso->format)) |
 188                 A2XX_SQ_TEX_1_CLAMP_POLICY(SQ_TEX_CLAMP_POLICY_OGL);
 189         so->tex2 =
 190                 A2XX_SQ_TEX_2_HEIGHT(prsc->height0 - 1) |
 191                 A2XX_SQ_TEX_2_WIDTH(prsc->width0 - 1);
 192         so->tex3 = fd2_tex_swiz(cso->format, cso->swizzle_r, cso->swizzle_g,
 193                         cso->swizzle_b, cso->swizzle_a);
 194
 195         so->tex4 =
 196                 A2XX_SQ_TEX_4_MIP_MIN_LEVEL(fd_sampler_first_level(cso)) |
 197                 A2XX_SQ_TEX_4_MIP_MAX_LEVEL(fd_sampler_last_level(cso));
 198
 199         so->tex5 = A2XX_SQ_TEX_5_DIMENSION(tex_dimension(prsc->target));
 200
 201         return &so->base;
 202 }
 203
 204 static void
 205 fd2_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
 206                 unsigned start, unsigned nr,
 207                 struct pipe_sampler_view **views)
 208 {
 209         if (shader == PIPE_SHADER_FRAGMENT) {
 210                 struct fd_context *ctx = fd_context(pctx);
 211
 212                 /* on a2xx, since there is a flat address space for textures/samplers,
 213                  * a change in # of fragment textures/samplers will trigger patching and
 214                  * re-emitting the vertex shader:
 215                  */
 216                 if (nr != ctx->tex[PIPE_SHADER_FRAGMENT].num_textures)
 217                         ctx->dirty |= FD_DIRTY_TEXSTATE;
 218         }
 219
 220         fd_set_sampler_views(pctx, shader, start, nr, views);
 221 }
 222
 223 /* map gallium sampler-id to hw const-idx.. adreno uses a flat address
 224  * space of samplers (const-idx), so we need to map the gallium sampler-id
 225  * which is per-shader to a global const-idx space.
 226  *
 227  * Fragment shader sampler maps directly to const-idx, and vertex shader
 228  * is offset by the # of fragment shader samplers.  If the # of fragment
 229  * shader samplers changes, this shifts the vertex shader indexes.
 230  *
 231  * TODO maybe we can do frag shader 0..N  and vert shader N..0 to avoid
 232  * this??
 233  */
 234 unsigned
 235 fd2_get_const_idx(struct fd_context *ctx, struct fd_texture_stateobj *tex,
 236                 unsigned samp_id)
 237 {
 238         if (tex == &ctx->tex[PIPE_SHADER_FRAGMENT])
 239                 return samp_id;
 240         return samp_id + ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers;
 241 }
 242
 243 void
 244 fd2_texture_init(struct pipe_context *pctx)
 245 {
 246         pctx->create_sampler_state = fd2_sampler_state_create;
 247         pctx->bind_sampler_states = fd2_sampler_states_bind;
 248         pctx->create_sampler_view = fd2_sampler_view_create;
 249         pctx->set_sampler_views = fd2_set_sampler_views;
 250 }