2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Rob Clark <robclark@freedesktop.org>
27 #include "util/u_format.h"
28 #include "util/u_format_rgtc.h"
29 #include "util/u_format_zs.h"
30 #include "util/u_inlines.h"
31 #include "util/u_transfer.h"
32 #include "util/u_string.h"
33 #include "util/u_surface.h"
36 #include "freedreno_resource.h"
37 #include "freedreno_batch_cache.h"
38 #include "freedreno_fence.h"
39 #include "freedreno_screen.h"
40 #include "freedreno_surface.h"
41 #include "freedreno_context.h"
42 #include "freedreno_query_hw.h"
43 #include "freedreno_util.h"
47 /* XXX this should go away, needed for 'struct winsys_handle' */
48 #include "state_tracker/drm_driver.h"
51 * Go through the entire state and see if the resource is bound
52 * anywhere. If it is, mark the relevant state as dirty. This is
53 * called on realloc_bo to ensure the neccessary state is re-
54 * emitted so the GPU looks at the new backing bo.
57 rebind_resource(struct fd_context
*ctx
, struct pipe_resource
*prsc
)
60 for (unsigned i
= 0; i
< ctx
->vtx
.vertexbuf
.count
&& !(ctx
->dirty
& FD_DIRTY_VTXBUF
); i
++) {
61 if (ctx
->vtx
.vertexbuf
.vb
[i
].buffer
.resource
== prsc
)
62 ctx
->dirty
|= FD_DIRTY_VTXBUF
;
65 /* per-shader-stage resources: */
66 for (unsigned stage
= 0; stage
< PIPE_SHADER_TYPES
; stage
++) {
67 /* Constbufs.. note that constbuf[0] is normal uniforms emitted in
68 * cmdstream rather than by pointer..
70 const unsigned num_ubos
= util_last_bit(ctx
->constbuf
[stage
].enabled_mask
);
71 for (unsigned i
= 1; i
< num_ubos
; i
++) {
72 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_CONST
)
74 if (ctx
->constbuf
[stage
].cb
[i
].buffer
== prsc
)
75 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_CONST
;
79 for (unsigned i
= 0; i
< ctx
->tex
[stage
].num_textures
; i
++) {
80 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_TEX
)
82 if (ctx
->tex
[stage
].textures
[i
] && (ctx
->tex
[stage
].textures
[i
]->texture
== prsc
))
83 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_TEX
;
87 const unsigned num_ssbos
= util_last_bit(ctx
->shaderbuf
[stage
].enabled_mask
);
88 for (unsigned i
= 0; i
< num_ssbos
; i
++) {
89 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_SSBO
)
91 if (ctx
->shaderbuf
[stage
].sb
[i
].buffer
== prsc
)
92 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_SSBO
;
98 realloc_bo(struct fd_resource
*rsc
, uint32_t size
)
100 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
101 uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
102 DRM_FREEDRENO_GEM_TYPE_KMEM
|
103 COND(rsc
->base
.bind
& PIPE_BIND_SCANOUT
, DRM_FREEDRENO_GEM_SCANOUT
);
104 /* TODO other flags? */
106 /* if we start using things other than write-combine,
107 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
113 rsc
->bo
= fd_bo_new(screen
->dev
, size
, flags
);
114 rsc
->seqno
= p_atomic_inc_return(&screen
->rsc_seqno
);
115 util_range_set_empty(&rsc
->valid_buffer_range
);
116 fd_bc_invalidate_resource(rsc
, true);
120 do_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*blit
, bool fallback
)
122 /* TODO size threshold too?? */
124 /* do blit on gpu: */
125 fd_blitter_pipe_begin(ctx
, false, true, FD_STAGE_BLIT
);
126 ctx
->blit(ctx
, blit
);
127 fd_blitter_pipe_end(ctx
);
129 /* do blit on cpu: */
130 util_resource_copy_region(&ctx
->base
,
131 blit
->dst
.resource
, blit
->dst
.level
, blit
->dst
.box
.x
,
132 blit
->dst
.box
.y
, blit
->dst
.box
.z
,
133 blit
->src
.resource
, blit
->src
.level
, &blit
->src
.box
);
138 fd_try_shadow_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
,
139 unsigned level
, const struct pipe_box
*box
)
141 struct pipe_context
*pctx
= &ctx
->base
;
142 struct pipe_resource
*prsc
= &rsc
->base
;
143 bool fallback
= false;
148 /* TODO: somehow munge dimensions and format to copy unsupported
149 * render target format to something that is supported?
151 if (!pctx
->screen
->is_format_supported(pctx
->screen
,
152 prsc
->format
, prsc
->target
, prsc
->nr_samples
,
153 prsc
->nr_storage_samples
,
154 PIPE_BIND_RENDER_TARGET
))
157 /* do shadowing back-blits on the cpu for buffers: */
158 if (prsc
->target
== PIPE_BUFFER
)
161 bool whole_level
= util_texrange_covers_whole_level(prsc
, level
,
162 box
->x
, box
->y
, box
->z
, box
->width
, box
->height
, box
->depth
);
164 /* TODO need to be more clever about current level */
165 if ((prsc
->target
>= PIPE_TEXTURE_2D
) && !whole_level
)
168 struct pipe_resource
*pshadow
=
169 pctx
->screen
->resource_create(pctx
->screen
, prsc
);
174 assert(!ctx
->in_shadow
);
175 ctx
->in_shadow
= true;
177 /* get rid of any references that batch-cache might have to us (which
178 * should empty/destroy rsc->batches hashset)
180 fd_bc_invalidate_resource(rsc
, false);
182 mtx_lock(&ctx
->screen
->lock
);
184 /* Swap the backing bo's, so shadow becomes the old buffer,
185 * blit from shadow to new buffer. From here on out, we
188 * Note that we need to do it in this order, otherwise if
189 * we go down cpu blit path, the recursive transfer_map()
190 * sees the wrong status..
192 struct fd_resource
*shadow
= fd_resource(pshadow
);
194 DBG("shadow: %p (%d) -> %p (%d)\n", rsc
, rsc
->base
.reference
.count
,
195 shadow
, shadow
->base
.reference
.count
);
197 /* TODO valid_buffer_range?? */
198 swap(rsc
->bo
, shadow
->bo
);
199 swap(rsc
->write_batch
, shadow
->write_batch
);
200 rsc
->seqno
= p_atomic_inc_return(&ctx
->screen
->rsc_seqno
);
202 /* at this point, the newly created shadow buffer is not referenced
203 * by any batches, but the existing rsc (probably) is. We need to
204 * transfer those references over:
206 debug_assert(shadow
->batch_mask
== 0);
207 struct fd_batch
*batch
;
208 foreach_batch(batch
, &ctx
->screen
->batch_cache
, rsc
->batch_mask
) {
209 struct set_entry
*entry
= _mesa_set_search(batch
->resources
, rsc
);
210 _mesa_set_remove(batch
->resources
, entry
);
211 _mesa_set_add(batch
->resources
, shadow
);
213 swap(rsc
->batch_mask
, shadow
->batch_mask
);
215 mtx_unlock(&ctx
->screen
->lock
);
217 struct pipe_blit_info blit
= {};
218 blit
.dst
.resource
= prsc
;
219 blit
.dst
.format
= prsc
->format
;
220 blit
.src
.resource
= pshadow
;
221 blit
.src
.format
= pshadow
->format
;
222 blit
.mask
= util_format_get_mask(prsc
->format
);
223 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
225 #define set_box(field, val) do { \
226 blit.dst.field = (val); \
227 blit.src.field = (val); \
230 /* blit the other levels in their entirety: */
231 for (unsigned l
= 0; l
<= prsc
->last_level
; l
++) {
235 /* just blit whole level: */
237 set_box(box
.width
, u_minify(prsc
->width0
, l
));
238 set_box(box
.height
, u_minify(prsc
->height0
, l
));
239 set_box(box
.depth
, u_minify(prsc
->depth0
, l
));
241 do_blit(ctx
, &blit
, fallback
);
244 /* deal w/ current level specially, since we might need to split
245 * it up into a couple blits:
248 set_box(level
, level
);
250 switch (prsc
->target
) {
252 case PIPE_TEXTURE_1D
:
255 set_box(box
.height
, 1);
256 set_box(box
.depth
, 1);
260 set_box(box
.width
, box
->x
);
262 do_blit(ctx
, &blit
, fallback
);
264 if ((box
->x
+ box
->width
) < u_minify(prsc
->width0
, level
)) {
265 set_box(box
.x
, box
->x
+ box
->width
);
266 set_box(box
.width
, u_minify(prsc
->width0
, level
) - (box
->x
+ box
->width
));
268 do_blit(ctx
, &blit
, fallback
);
271 case PIPE_TEXTURE_2D
:
278 ctx
->in_shadow
= false;
280 pipe_resource_reference(&pshadow
, NULL
);
285 static struct fd_resource
*
286 fd_alloc_staging(struct fd_context
*ctx
, struct fd_resource
*rsc
,
287 unsigned level
, const struct pipe_box
*box
)
289 struct pipe_context
*pctx
= &ctx
->base
;
290 struct pipe_resource tmpl
= rsc
->base
;
292 tmpl
.width0
= box
->width
;
293 tmpl
.height0
= box
->height
;
294 tmpl
.depth0
= box
->depth
;
297 tmpl
.bind
|= PIPE_BIND_LINEAR
;
299 struct pipe_resource
*pstaging
=
300 pctx
->screen
->resource_create(pctx
->screen
, &tmpl
);
304 return fd_resource(pstaging
);
308 fd_blit_from_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
310 struct pipe_resource
*dst
= trans
->base
.resource
;
311 struct pipe_blit_info blit
= {};
313 blit
.dst
.resource
= dst
;
314 blit
.dst
.format
= dst
->format
;
315 blit
.dst
.level
= trans
->base
.level
;
316 blit
.dst
.box
= trans
->base
.box
;
317 blit
.src
.resource
= trans
->staging_prsc
;
318 blit
.src
.format
= trans
->staging_prsc
->format
;
320 blit
.src
.box
= trans
->staging_box
;
321 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
322 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
324 do_blit(ctx
, &blit
, false);
328 fd_blit_to_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
330 struct pipe_resource
*src
= trans
->base
.resource
;
331 struct pipe_blit_info blit
= {};
333 blit
.src
.resource
= src
;
334 blit
.src
.format
= src
->format
;
335 blit
.src
.level
= trans
->base
.level
;
336 blit
.src
.box
= trans
->base
.box
;
337 blit
.dst
.resource
= trans
->staging_prsc
;
338 blit
.dst
.format
= trans
->staging_prsc
->format
;
340 blit
.dst
.box
= trans
->staging_box
;
341 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
342 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
344 do_blit(ctx
, &blit
, false);
348 fd_resource_layer_offset(struct fd_resource
*rsc
,
349 struct fd_resource_slice
*slice
,
352 if (rsc
->layer_first
)
353 return layer
* rsc
->layer_size
;
355 return layer
* slice
->size0
;
358 static void fd_resource_transfer_flush_region(struct pipe_context
*pctx
,
359 struct pipe_transfer
*ptrans
,
360 const struct pipe_box
*box
)
362 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
364 if (ptrans
->resource
->target
== PIPE_BUFFER
)
365 util_range_add(&rsc
->valid_buffer_range
,
366 ptrans
->box
.x
+ box
->x
,
367 ptrans
->box
.x
+ box
->x
+ box
->width
);
371 flush_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
, unsigned usage
)
373 struct fd_batch
*write_batch
= NULL
;
375 fd_batch_reference(&write_batch
, rsc
->write_batch
);
377 if (usage
& PIPE_TRANSFER_WRITE
) {
378 struct fd_batch
*batch
, *batches
[32] = {};
381 /* This is a bit awkward, probably a fd_batch_flush_locked()
382 * would make things simpler.. but we need to hold the lock
383 * to iterate the batches which reference this resource. So
384 * we must first grab references under a lock, then flush.
386 mtx_lock(&ctx
->screen
->lock
);
387 batch_mask
= rsc
->batch_mask
;
388 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
389 fd_batch_reference(&batches
[batch
->idx
], batch
);
390 mtx_unlock(&ctx
->screen
->lock
);
392 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
393 fd_batch_flush(batch
, false, false);
395 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
) {
396 fd_batch_sync(batch
);
397 fd_batch_reference(&batches
[batch
->idx
], NULL
);
399 assert(rsc
->batch_mask
== 0);
400 } else if (write_batch
) {
401 fd_batch_flush(write_batch
, true, false);
404 fd_batch_reference(&write_batch
, NULL
);
406 assert(!rsc
->write_batch
);
410 fd_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
412 flush_resource(fd_context(pctx
), fd_resource(prsc
), PIPE_TRANSFER_READ
);
416 fd_resource_transfer_unmap(struct pipe_context
*pctx
,
417 struct pipe_transfer
*ptrans
)
419 struct fd_context
*ctx
= fd_context(pctx
);
420 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
421 struct fd_transfer
*trans
= fd_transfer(ptrans
);
423 if (trans
->staging_prsc
) {
424 if (ptrans
->usage
& PIPE_TRANSFER_WRITE
)
425 fd_blit_from_staging(ctx
, trans
);
426 pipe_resource_reference(&trans
->staging_prsc
, NULL
);
429 if (!(ptrans
->usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
430 fd_bo_cpu_fini(rsc
->bo
);
433 util_range_add(&rsc
->valid_buffer_range
,
435 ptrans
->box
.x
+ ptrans
->box
.width
);
437 pipe_resource_reference(&ptrans
->resource
, NULL
);
438 slab_free(&ctx
->transfer_pool
, ptrans
);
442 fd_resource_transfer_map(struct pipe_context
*pctx
,
443 struct pipe_resource
*prsc
,
444 unsigned level
, unsigned usage
,
445 const struct pipe_box
*box
,
446 struct pipe_transfer
**pptrans
)
448 struct fd_context
*ctx
= fd_context(pctx
);
449 struct fd_resource
*rsc
= fd_resource(prsc
);
450 struct fd_resource_slice
*slice
= fd_resource_slice(rsc
, level
);
451 struct fd_transfer
*trans
;
452 struct pipe_transfer
*ptrans
;
453 enum pipe_format format
= prsc
->format
;
459 DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc
, level
, usage
,
460 box
->width
, box
->height
, box
->x
, box
->y
);
462 ptrans
= slab_alloc(&ctx
->transfer_pool
);
466 /* slab_alloc_st() doesn't zero: */
467 trans
= fd_transfer(ptrans
);
468 memset(trans
, 0, sizeof(*trans
));
470 pipe_resource_reference(&ptrans
->resource
, prsc
);
471 ptrans
->level
= level
;
472 ptrans
->usage
= usage
;
474 ptrans
->stride
= util_format_get_nblocksx(format
, slice
->pitch
) * rsc
->cpp
;
475 ptrans
->layer_stride
= rsc
->layer_first
? rsc
->layer_size
: slice
->size0
;
477 /* we always need a staging texture for tiled buffers:
479 * TODO we might sometimes want to *also* shadow the resource to avoid
480 * splitting a batch.. for ex, mid-frame texture uploads to a tiled
483 if (rsc
->tile_mode
) {
484 struct fd_resource
*staging_rsc
;
486 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
488 // TODO for PIPE_TRANSFER_READ, need to do untiling blit..
489 trans
->staging_prsc
= &staging_rsc
->base
;
490 trans
->base
.stride
= util_format_get_nblocksx(format
,
491 staging_rsc
->slices
[0].pitch
) * staging_rsc
->cpp
;
492 trans
->base
.layer_stride
= staging_rsc
->layer_first
?
493 staging_rsc
->layer_size
: staging_rsc
->slices
[0].size0
;
494 trans
->staging_box
= *box
;
495 trans
->staging_box
.x
= 0;
496 trans
->staging_box
.y
= 0;
497 trans
->staging_box
.z
= 0;
499 if (usage
& PIPE_TRANSFER_READ
) {
500 fd_blit_to_staging(ctx
, trans
);
501 fd_bo_cpu_prep(rsc
->bo
, ctx
->pipe
, DRM_FREEDRENO_PREP_READ
);
504 buf
= fd_bo_map(staging_rsc
->bo
);
509 ctx
->stats
.staging_uploads
++;
515 if (ctx
->in_shadow
&& !(usage
& PIPE_TRANSFER_READ
))
516 usage
|= PIPE_TRANSFER_UNSYNCHRONIZED
;
518 if (usage
& PIPE_TRANSFER_READ
)
519 op
|= DRM_FREEDRENO_PREP_READ
;
521 if (usage
& PIPE_TRANSFER_WRITE
)
522 op
|= DRM_FREEDRENO_PREP_WRITE
;
524 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
525 realloc_bo(rsc
, fd_bo_size(rsc
->bo
));
526 rebind_resource(ctx
, prsc
);
527 } else if ((usage
& PIPE_TRANSFER_WRITE
) &&
528 prsc
->target
== PIPE_BUFFER
&&
529 !util_ranges_intersect(&rsc
->valid_buffer_range
,
530 box
->x
, box
->x
+ box
->width
)) {
531 /* We are trying to write to a previously uninitialized range. No need
534 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
535 struct fd_batch
*write_batch
= NULL
;
537 /* hold a reference, so it doesn't disappear under us: */
538 fd_batch_reference(&write_batch
, rsc
->write_batch
);
540 if ((usage
& PIPE_TRANSFER_WRITE
) && write_batch
&&
541 write_batch
->back_blit
) {
542 /* if only thing pending is a back-blit, we can discard it: */
543 fd_batch_reset(write_batch
);
546 /* If the GPU is writing to the resource, or if it is reading from the
547 * resource and we're trying to write to it, flush the renders.
549 bool needs_flush
= pending(rsc
, !!(usage
& PIPE_TRANSFER_WRITE
));
550 bool busy
= needs_flush
|| (0 != fd_bo_cpu_prep(rsc
->bo
,
551 ctx
->pipe
, op
| DRM_FREEDRENO_PREP_NOSYNC
));
553 /* if we need to flush/stall, see if we can make a shadow buffer
556 * TODO we could go down this path !reorder && !busy_for_read
557 * ie. we only *don't* want to go down this path if the blit
558 * will trigger a flush!
560 if (ctx
->screen
->reorder
&& busy
&& !(usage
& PIPE_TRANSFER_READ
) &&
561 (usage
& PIPE_TRANSFER_DISCARD_RANGE
)) {
562 /* try shadowing only if it avoids a flush, otherwise staging would
565 if (needs_flush
&& fd_try_shadow_resource(ctx
, rsc
, level
, box
)) {
566 needs_flush
= busy
= false;
567 rebind_resource(ctx
, prsc
);
568 ctx
->stats
.shadow_uploads
++;
570 struct fd_resource
*staging_rsc
;
573 flush_resource(ctx
, rsc
, usage
);
577 /* in this case, we don't need to shadow the whole resource,
578 * since any draw that references the previous contents has
579 * already had rendering flushed for all tiles. So we can
580 * use a staging buffer to do the upload.
582 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
584 trans
->staging_prsc
= &staging_rsc
->base
;
585 trans
->base
.stride
= util_format_get_nblocksx(format
,
586 staging_rsc
->slices
[0].pitch
) * staging_rsc
->cpp
;
587 trans
->base
.layer_stride
= staging_rsc
->layer_first
?
588 staging_rsc
->layer_size
: staging_rsc
->slices
[0].size0
;
589 trans
->staging_box
= *box
;
590 trans
->staging_box
.x
= 0;
591 trans
->staging_box
.y
= 0;
592 trans
->staging_box
.z
= 0;
593 buf
= fd_bo_map(staging_rsc
->bo
);
598 fd_batch_reference(&write_batch
, NULL
);
600 ctx
->stats
.staging_uploads
++;
608 flush_resource(ctx
, rsc
, usage
);
612 fd_batch_reference(&write_batch
, NULL
);
614 /* The GPU keeps track of how the various bo's are being used, and
615 * will wait if necessary for the proper operation to have
619 ret
= fd_bo_cpu_prep(rsc
->bo
, ctx
->pipe
, op
);
625 buf
= fd_bo_map(rsc
->bo
);
626 offset
= slice
->offset
+
627 box
->y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
628 box
->x
/ util_format_get_blockwidth(format
) * rsc
->cpp
+
629 fd_resource_layer_offset(rsc
, slice
, box
->z
);
631 if (usage
& PIPE_TRANSFER_WRITE
)
639 fd_resource_transfer_unmap(pctx
, ptrans
);
644 fd_resource_destroy(struct pipe_screen
*pscreen
,
645 struct pipe_resource
*prsc
)
647 struct fd_resource
*rsc
= fd_resource(prsc
);
648 fd_bc_invalidate_resource(rsc
, true);
651 util_range_destroy(&rsc
->valid_buffer_range
);
656 fd_resource_get_handle(struct pipe_screen
*pscreen
,
657 struct pipe_context
*pctx
,
658 struct pipe_resource
*prsc
,
659 struct winsys_handle
*handle
,
662 struct fd_resource
*rsc
= fd_resource(prsc
);
664 return fd_screen_bo_get_handle(pscreen
, rsc
->bo
,
665 rsc
->slices
[0].pitch
* rsc
->cpp
, handle
);
669 setup_slices(struct fd_resource
*rsc
, uint32_t alignment
, enum pipe_format format
)
671 struct pipe_resource
*prsc
= &rsc
->base
;
672 struct fd_screen
*screen
= fd_screen(prsc
->screen
);
673 enum util_format_layout layout
= util_format_description(format
)->layout
;
674 uint32_t pitchalign
= screen
->gmem_alignw
;
675 uint32_t level
, size
= 0;
676 uint32_t width
= prsc
->width0
;
677 uint32_t height
= prsc
->height0
;
678 uint32_t depth
= prsc
->depth0
;
679 /* in layer_first layout, the level (slice) contains just one
680 * layer (since in fact the layer contains the slices)
682 uint32_t layers_in_level
= rsc
->layer_first
? 1 : prsc
->array_size
;
684 for (level
= 0; level
<= prsc
->last_level
; level
++) {
685 struct fd_resource_slice
*slice
= fd_resource_slice(rsc
, level
);
688 if (layout
== UTIL_FORMAT_LAYOUT_ASTC
)
689 slice
->pitch
= width
=
690 util_align_npot(width
, pitchalign
* util_format_get_blockwidth(format
));
692 slice
->pitch
= width
= align(width
, pitchalign
);
693 slice
->offset
= size
;
694 blocks
= util_format_get_nblocks(format
, width
, height
);
695 /* 1d array and 2d array textures must all have the same layer size
696 * for each miplevel on a3xx. 3d textures can have different layer
697 * sizes for high levels, but the hw auto-sizer is buggy (or at least
698 * different than what this code does), so as soon as the layer size
699 * range gets into range, we stop reducing it.
701 if (prsc
->target
== PIPE_TEXTURE_3D
&& (
703 (level
> 1 && rsc
->slices
[level
- 1].size0
> 0xf000)))
704 slice
->size0
= align(blocks
* rsc
->cpp
, alignment
);
705 else if (level
== 0 || rsc
->layer_first
|| alignment
== 1)
706 slice
->size0
= align(blocks
* rsc
->cpp
, alignment
);
708 slice
->size0
= rsc
->slices
[level
- 1].size0
;
710 size
+= slice
->size0
* depth
* layers_in_level
;
712 width
= u_minify(width
, 1);
713 height
= u_minify(height
, 1);
714 depth
= u_minify(depth
, 1);
721 slice_alignment(enum pipe_texture_target target
)
723 /* on a3xx, 2d array and 3d textures seem to want their
724 * layers aligned to page boundaries:
727 case PIPE_TEXTURE_3D
:
728 case PIPE_TEXTURE_1D_ARRAY
:
729 case PIPE_TEXTURE_2D_ARRAY
:
736 /* cross generation texture layout to plug in to screen->setup_slices()..
737 * replace with generation specific one as-needed.
739 * TODO for a4xx probably can extract out the a4xx specific logic int
740 * a small fd4_setup_slices() wrapper that sets up layer_first, and then
744 fd_setup_slices(struct fd_resource
*rsc
)
748 alignment
= slice_alignment(rsc
->base
.target
);
750 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
751 if (is_a4xx(screen
)) {
752 switch (rsc
->base
.target
) {
753 case PIPE_TEXTURE_3D
:
754 rsc
->layer_first
= false;
757 rsc
->layer_first
= true;
763 return setup_slices(rsc
, alignment
, rsc
->base
.format
);
766 /* special case to resize query buf after allocated.. */
768 fd_resource_resize(struct pipe_resource
*prsc
, uint32_t sz
)
770 struct fd_resource
*rsc
= fd_resource(prsc
);
772 debug_assert(prsc
->width0
== 0);
773 debug_assert(prsc
->target
== PIPE_BUFFER
);
774 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
777 realloc_bo(rsc
, fd_screen(prsc
->screen
)->setup_slices(rsc
));
780 // TODO common helper?
782 has_depth(enum pipe_format format
)
785 case PIPE_FORMAT_Z16_UNORM
:
786 case PIPE_FORMAT_Z32_UNORM
:
787 case PIPE_FORMAT_Z32_FLOAT
:
788 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
:
789 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
790 case PIPE_FORMAT_S8_UINT_Z24_UNORM
:
791 case PIPE_FORMAT_Z24X8_UNORM
:
792 case PIPE_FORMAT_X8Z24_UNORM
:
800 * Create a new texture object, using the given template info.
802 static struct pipe_resource
*
803 fd_resource_create(struct pipe_screen
*pscreen
,
804 const struct pipe_resource
*tmpl
)
806 struct fd_screen
*screen
= fd_screen(pscreen
);
807 struct fd_resource
*rsc
= CALLOC_STRUCT(fd_resource
);
808 struct pipe_resource
*prsc
= &rsc
->base
;
809 enum pipe_format format
= tmpl
->format
;
812 DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
813 "nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc
,
814 tmpl
->target
, util_format_name(format
),
815 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
816 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
817 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
825 (PIPE_BIND_SCANOUT | \
827 PIPE_BIND_DISPLAY_TARGET)
829 if (screen
->tile_mode
&&
830 (tmpl
->target
!= PIPE_BUFFER
) &&
831 (tmpl
->bind
& PIPE_BIND_SAMPLER_VIEW
) &&
832 !(tmpl
->bind
& LINEAR
)) {
833 rsc
->tile_mode
= screen
->tile_mode(tmpl
);
836 pipe_reference_init(&prsc
->reference
, 1);
838 prsc
->screen
= pscreen
;
840 util_range_init(&rsc
->valid_buffer_range
);
842 rsc
->internal_format
= format
;
843 rsc
->cpp
= util_format_get_blocksize(format
);
844 prsc
->nr_samples
= MAX2(1, prsc
->nr_samples
);
845 rsc
->cpp
*= prsc
->nr_samples
;
849 // XXX probably need some extra work if we hit rsc shadowing path w/ lrz..
850 if ((is_a5xx(screen
) || is_a6xx(screen
)) &&
851 (fd_mesa_debug
& FD_DBG_LRZ
) && has_depth(format
)) {
852 const uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
853 DRM_FREEDRENO_GEM_TYPE_KMEM
; /* TODO */
854 unsigned lrz_pitch
= align(DIV_ROUND_UP(tmpl
->width0
, 8), 64);
855 unsigned lrz_height
= DIV_ROUND_UP(tmpl
->height0
, 8);
857 /* LRZ buffer is super-sampled: */
858 switch (prsc
->nr_samples
) {
865 unsigned size
= lrz_pitch
* lrz_height
* 2;
867 size
+= 0x1000; /* for GRAS_LRZ_FAST_CLEAR_BUFFER */
869 rsc
->lrz_height
= lrz_height
;
870 rsc
->lrz_width
= lrz_pitch
;
871 rsc
->lrz_pitch
= lrz_pitch
;
872 rsc
->lrz
= fd_bo_new(screen
->dev
, size
, flags
);
875 size
= screen
->setup_slices(rsc
);
877 /* special case for hw-query buffer, which we need to allocate before we
881 /* note, semi-intention == instead of & */
882 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
886 if (rsc
->layer_first
) {
887 rsc
->layer_size
= align(size
, 4096);
888 size
= rsc
->layer_size
* prsc
->array_size
;
891 realloc_bo(rsc
, size
);
897 fd_resource_destroy(pscreen
, prsc
);
902 * Create a texture from a winsys_handle. The handle is often created in
903 * another process by first creating a pipe texture and then calling
904 * resource_get_handle.
906 static struct pipe_resource
*
907 fd_resource_from_handle(struct pipe_screen
*pscreen
,
908 const struct pipe_resource
*tmpl
,
909 struct winsys_handle
*handle
, unsigned usage
)
911 struct fd_resource
*rsc
= CALLOC_STRUCT(fd_resource
);
912 struct fd_resource_slice
*slice
= &rsc
->slices
[0];
913 struct pipe_resource
*prsc
= &rsc
->base
;
914 uint32_t pitchalign
= fd_screen(pscreen
)->gmem_alignw
;
916 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
917 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
918 tmpl
->target
, util_format_name(tmpl
->format
),
919 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
920 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
921 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
928 pipe_reference_init(&prsc
->reference
, 1);
930 prsc
->screen
= pscreen
;
932 util_range_init(&rsc
->valid_buffer_range
);
934 rsc
->bo
= fd_screen_bo_from_handle(pscreen
, handle
);
938 prsc
->nr_samples
= MAX2(1, prsc
->nr_samples
);
939 rsc
->internal_format
= tmpl
->format
;
940 rsc
->cpp
= prsc
->nr_samples
* util_format_get_blocksize(tmpl
->format
);
941 slice
->pitch
= handle
->stride
/ rsc
->cpp
;
942 slice
->offset
= handle
->offset
;
943 slice
->size0
= handle
->stride
* prsc
->height0
;
945 if ((slice
->pitch
< align(prsc
->width0
, pitchalign
)) ||
946 (slice
->pitch
& (pitchalign
- 1)))
954 fd_resource_destroy(pscreen
, prsc
);
959 * _copy_region using pipe (3d engine)
962 fd_blitter_pipe_copy_region(struct fd_context
*ctx
,
963 struct pipe_resource
*dst
,
965 unsigned dstx
, unsigned dsty
, unsigned dstz
,
966 struct pipe_resource
*src
,
968 const struct pipe_box
*src_box
)
970 /* not until we allow rendertargets to be buffers */
971 if (dst
->target
== PIPE_BUFFER
|| src
->target
== PIPE_BUFFER
)
974 if (!util_blitter_is_copy_supported(ctx
->blitter
, dst
, src
))
977 /* TODO we could discard if dst box covers dst level fully.. */
978 fd_blitter_pipe_begin(ctx
, false, false, FD_STAGE_BLIT
);
979 util_blitter_copy_texture(ctx
->blitter
,
980 dst
, dst_level
, dstx
, dsty
, dstz
,
981 src
, src_level
, src_box
);
982 fd_blitter_pipe_end(ctx
);
988 * Copy a block of pixels from one resource to another.
989 * The resource must be of the same format.
990 * Resources with nr_samples > 1 are not allowed.
993 fd_resource_copy_region(struct pipe_context
*pctx
,
994 struct pipe_resource
*dst
,
996 unsigned dstx
, unsigned dsty
, unsigned dstz
,
997 struct pipe_resource
*src
,
999 const struct pipe_box
*src_box
)
1001 struct fd_context
*ctx
= fd_context(pctx
);
1003 /* TODO if we have 2d core, or other DMA engine that could be used
1004 * for simple copies and reasonably easily synchronized with the 3d
1005 * core, this is where we'd plug it in..
1008 /* try blit on 3d pipe: */
1009 if (fd_blitter_pipe_copy_region(ctx
,
1010 dst
, dst_level
, dstx
, dsty
, dstz
,
1011 src
, src_level
, src_box
))
1014 /* else fallback to pure sw: */
1015 util_resource_copy_region(pctx
,
1016 dst
, dst_level
, dstx
, dsty
, dstz
,
1017 src
, src_level
, src_box
);
1021 fd_render_condition_check(struct pipe_context
*pctx
)
1023 struct fd_context
*ctx
= fd_context(pctx
);
1025 if (!ctx
->cond_query
)
1028 union pipe_query_result res
= { 0 };
1030 ctx
->cond_mode
!= PIPE_RENDER_COND_NO_WAIT
&&
1031 ctx
->cond_mode
!= PIPE_RENDER_COND_BY_REGION_NO_WAIT
;
1033 if (pctx
->get_query_result(pctx
, ctx
->cond_query
, wait
, &res
))
1034 return (bool)res
.u64
!= ctx
->cond_cond
;
1040 * Optimal hardware path for blitting pixels.
1041 * Scaling, format conversion, up- and downsampling (resolve) are allowed.
1044 fd_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
)
1046 struct fd_context
*ctx
= fd_context(pctx
);
1047 struct pipe_blit_info info
= *blit_info
;
1048 bool discard
= false;
1050 if (info
.render_condition_enable
&& !fd_render_condition_check(pctx
))
1053 if (!info
.scissor_enable
&& !info
.alpha_blend
) {
1054 discard
= util_texrange_covers_whole_level(info
.dst
.resource
,
1055 info
.dst
.level
, info
.dst
.box
.x
, info
.dst
.box
.y
,
1056 info
.dst
.box
.z
, info
.dst
.box
.width
,
1057 info
.dst
.box
.height
, info
.dst
.box
.depth
);
1060 if (util_try_blit_via_copy_region(pctx
, &info
)) {
1064 if (info
.mask
& PIPE_MASK_S
) {
1065 DBG("cannot blit stencil, skipping");
1066 info
.mask
&= ~PIPE_MASK_S
;
1069 if (!util_blitter_is_blit_supported(ctx
->blitter
, &info
)) {
1070 DBG("blit unsupported %s -> %s",
1071 util_format_short_name(info
.src
.resource
->format
),
1072 util_format_short_name(info
.dst
.resource
->format
));
1076 fd_blitter_pipe_begin(ctx
, info
.render_condition_enable
, discard
, FD_STAGE_BLIT
);
1077 ctx
->blit(ctx
, &info
);
1078 fd_blitter_pipe_end(ctx
);
1082 fd_blitter_pipe_begin(struct fd_context
*ctx
, bool render_cond
, bool discard
,
1083 enum fd_render_stage stage
)
1085 fd_fence_ref(ctx
->base
.screen
, &ctx
->last_fence
, NULL
);
1087 util_blitter_save_fragment_constant_buffer_slot(ctx
->blitter
,
1088 ctx
->constbuf
[PIPE_SHADER_FRAGMENT
].cb
);
1089 util_blitter_save_vertex_buffer_slot(ctx
->blitter
, ctx
->vtx
.vertexbuf
.vb
);
1090 util_blitter_save_vertex_elements(ctx
->blitter
, ctx
->vtx
.vtx
);
1091 util_blitter_save_vertex_shader(ctx
->blitter
, ctx
->prog
.vp
);
1092 util_blitter_save_so_targets(ctx
->blitter
, ctx
->streamout
.num_targets
,
1093 ctx
->streamout
.targets
);
1094 util_blitter_save_rasterizer(ctx
->blitter
, ctx
->rasterizer
);
1095 util_blitter_save_viewport(ctx
->blitter
, &ctx
->viewport
);
1096 util_blitter_save_scissor(ctx
->blitter
, &ctx
->scissor
);
1097 util_blitter_save_fragment_shader(ctx
->blitter
, ctx
->prog
.fp
);
1098 util_blitter_save_blend(ctx
->blitter
, ctx
->blend
);
1099 util_blitter_save_depth_stencil_alpha(ctx
->blitter
, ctx
->zsa
);
1100 util_blitter_save_stencil_ref(ctx
->blitter
, &ctx
->stencil_ref
);
1101 util_blitter_save_sample_mask(ctx
->blitter
, ctx
->sample_mask
);
1102 util_blitter_save_framebuffer(ctx
->blitter
, &ctx
->framebuffer
);
1103 util_blitter_save_fragment_sampler_states(ctx
->blitter
,
1104 ctx
->tex
[PIPE_SHADER_FRAGMENT
].num_samplers
,
1105 (void **)ctx
->tex
[PIPE_SHADER_FRAGMENT
].samplers
);
1106 util_blitter_save_fragment_sampler_views(ctx
->blitter
,
1107 ctx
->tex
[PIPE_SHADER_FRAGMENT
].num_textures
,
1108 ctx
->tex
[PIPE_SHADER_FRAGMENT
].textures
);
1110 util_blitter_save_render_condition(ctx
->blitter
,
1111 ctx
->cond_query
, ctx
->cond_cond
, ctx
->cond_mode
);
1114 fd_batch_set_stage(ctx
->batch
, stage
);
1116 ctx
->in_blit
= discard
;
1120 fd_blitter_pipe_end(struct fd_context
*ctx
)
1123 fd_batch_set_stage(ctx
->batch
, FD_STAGE_NULL
);
1124 ctx
->in_blit
= false;
1128 fd_invalidate_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
1130 struct fd_resource
*rsc
= fd_resource(prsc
);
1133 * TODO I guess we could track that the resource is invalidated and
1134 * use that as a hint to realloc rather than stall in _transfer_map(),
1135 * even in the non-DISCARD_WHOLE_RESOURCE case?
1138 if (rsc
->write_batch
) {
1139 struct fd_batch
*batch
= rsc
->write_batch
;
1140 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
1142 if (pfb
->zsbuf
&& pfb
->zsbuf
->texture
== prsc
)
1143 batch
->resolve
&= ~(FD_BUFFER_DEPTH
| FD_BUFFER_STENCIL
);
1145 for (unsigned i
= 0; i
< pfb
->nr_cbufs
; i
++) {
1146 if (pfb
->cbufs
[i
] && pfb
->cbufs
[i
]->texture
== prsc
) {
1147 batch
->resolve
&= ~(PIPE_CLEAR_COLOR0
<< i
);
1155 static enum pipe_format
1156 fd_resource_get_internal_format(struct pipe_resource
*prsc
)
1158 return fd_resource(prsc
)->internal_format
;
1162 fd_resource_set_stencil(struct pipe_resource
*prsc
,
1163 struct pipe_resource
*stencil
)
1165 fd_resource(prsc
)->stencil
= fd_resource(stencil
);
1168 static struct pipe_resource
*
1169 fd_resource_get_stencil(struct pipe_resource
*prsc
)
1171 struct fd_resource
*rsc
= fd_resource(prsc
);
1173 return &rsc
->stencil
->base
;
1177 static const struct u_transfer_vtbl transfer_vtbl
= {
1178 .resource_create
= fd_resource_create
,
1179 .resource_destroy
= fd_resource_destroy
,
1180 .transfer_map
= fd_resource_transfer_map
,
1181 .transfer_flush_region
= fd_resource_transfer_flush_region
,
1182 .transfer_unmap
= fd_resource_transfer_unmap
,
1183 .get_internal_format
= fd_resource_get_internal_format
,
1184 .set_stencil
= fd_resource_set_stencil
,
1185 .get_stencil
= fd_resource_get_stencil
,
1189 fd_resource_screen_init(struct pipe_screen
*pscreen
)
1191 struct fd_screen
*screen
= fd_screen(pscreen
);
1192 bool fake_rgtc
= screen
->gpu_id
< 400;
1194 pscreen
->resource_create
= u_transfer_helper_resource_create
;
1195 pscreen
->resource_from_handle
= fd_resource_from_handle
;
1196 pscreen
->resource_get_handle
= fd_resource_get_handle
;
1197 pscreen
->resource_destroy
= u_transfer_helper_resource_destroy
;
1199 pscreen
->transfer_helper
= u_transfer_helper_create(&transfer_vtbl
,
1200 true, false, fake_rgtc
, true);
1202 if (!screen
->setup_slices
)
1203 screen
->setup_slices
= fd_setup_slices
;
1207 fd_get_sample_position(struct pipe_context
*context
,
1208 unsigned sample_count
, unsigned sample_index
,
1211 /* The following is copied from nouveau/nv50 except for position
1212 * values, which are taken from blob driver */
1213 static const uint8_t pos1
[1][2] = { { 0x8, 0x8 } };
1214 static const uint8_t pos2
[2][2] = {
1215 { 0xc, 0xc }, { 0x4, 0x4 } };
1216 static const uint8_t pos4
[4][2] = {
1217 { 0x6, 0x2 }, { 0xe, 0x6 },
1218 { 0x2, 0xa }, { 0xa, 0xe } };
1219 /* TODO needs to be verified on supported hw */
1220 static const uint8_t pos8
[8][2] = {
1221 { 0x9, 0x5 }, { 0x7, 0xb },
1222 { 0xd, 0x9 }, { 0x5, 0x3 },
1223 { 0x3, 0xd }, { 0x1, 0x7 },
1224 { 0xb, 0xf }, { 0xf, 0x1 } };
1226 const uint8_t (*ptr
)[2];
1228 switch (sample_count
) {
1246 pos_out
[0] = ptr
[sample_index
][0] / 16.0f
;
1247 pos_out
[1] = ptr
[sample_index
][1] / 16.0f
;
1251 fd_resource_context_init(struct pipe_context
*pctx
)
1253 pctx
->transfer_map
= u_transfer_helper_transfer_map
;
1254 pctx
->transfer_flush_region
= u_transfer_helper_transfer_flush_region
;
1255 pctx
->transfer_unmap
= u_transfer_helper_transfer_unmap
;
1256 pctx
->buffer_subdata
= u_default_buffer_subdata
;
1257 pctx
->texture_subdata
= u_default_texture_subdata
;
1258 pctx
->create_surface
= fd_create_surface
;
1259 pctx
->surface_destroy
= fd_surface_destroy
;
1260 pctx
->resource_copy_region
= fd_resource_copy_region
;
1261 pctx
->blit
= fd_blit
;
1262 pctx
->flush_resource
= fd_flush_resource
;
1263 pctx
->invalidate_resource
= fd_invalidate_resource
;
1264 pctx
->get_sample_position
= fd_get_sample_position
;