src/gallium/drivers/i915/i915_screen.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 VMware, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "draw/draw_context.h"
  30 #include "os/os_misc.h"
  31 #include "util/u_format.h"
  32 #include "util/u_format_s3tc.h"
  33 #include "util/u_inlines.h"
  34 #include "util/u_memory.h"
  35 #include "util/u_string.h"
  36
  37 #include "i915_reg.h"
  38 #include "i915_debug.h"
  39 #include "i915_context.h"
  40 #include "i915_screen.h"
  41 #include "i915_resource.h"
  42 #include "i915_winsys.h"
  43 #include "i915_public.h"
  44
  45
  46 /*
  47  * Probe functions
  48  */
  49
  50
  51 static const char *
  52 i915_get_vendor(struct pipe_screen *screen)
  53 {
  54    return "Mesa Project";
  55 }
  56
  57 static const char *
  58 i915_get_name(struct pipe_screen *screen)
  59 {
  60    static char buffer[128];
  61    const char *chipset;
  62
  63    switch (i915_screen(screen)->iws->pci_id) {
  64    case PCI_CHIP_I915_G:
  65       chipset = "915G";
  66       break;
  67    case PCI_CHIP_I915_GM:
  68       chipset = "915GM";
  69       break;
  70    case PCI_CHIP_I945_G:
  71       chipset = "945G";
  72       break;
  73    case PCI_CHIP_I945_GM:
  74       chipset = "945GM";
  75       break;
  76    case PCI_CHIP_I945_GME:
  77       chipset = "945GME";
  78       break;
  79    case PCI_CHIP_G33_G:
  80       chipset = "G33";
  81       break;
  82    case PCI_CHIP_Q35_G:
  83       chipset = "Q35";
  84       break;
  85    case PCI_CHIP_Q33_G:
  86       chipset = "Q33";
  87       break;
  88    case PCI_CHIP_PINEVIEW_G:
  89       chipset = "Pineview G";
  90       break;
  91    case PCI_CHIP_PINEVIEW_M:
  92       chipset = "Pineview M";
  93       break;
  94    default:
  95       chipset = "unknown";
  96       break;
  97    }
  98
  99    util_snprintf(buffer, sizeof(buffer), "i915 (chipset: %s)", chipset);
 100    return buffer;
 101 }
 102
 103 static int
 104 i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap cap)
 105 {
 106    switch(shader) {
 107    case PIPE_SHADER_VERTEX:
 108       switch (cap) {
 109       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 110       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 111          if (debug_get_bool_option("DRAW_USE_LLVM", TRUE))
 112             return PIPE_MAX_SAMPLERS;
 113          else
 114             return 0;
 115        default:
 116          return draw_get_shader_param(shader, cap);
 117       }
 118    case PIPE_SHADER_FRAGMENT:
 119       /* XXX: some of these are just shader model 2.0 values, fix this! */
 120       switch(cap) {
 121       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 122          return I915_MAX_ALU_INSN + I915_MAX_TEX_INSN;
 123       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 124          return I915_MAX_ALU_INSN;
 125       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 126          return I915_MAX_TEX_INSN;
 127       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 128          return 8;
 129       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 130          return 0;
 131       case PIPE_SHADER_CAP_MAX_INPUTS:
 132          return 10;
 133       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 134          return 1;
 135       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 136          return 32 * sizeof(float[4]);
 137       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 138          return 1;
 139       case PIPE_SHADER_CAP_MAX_TEMPS:
 140          return 12; /* XXX: 12 -> 32 ? */
 141       case PIPE_SHADER_CAP_MAX_PREDS:
 142          return 0;
 143       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 144       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 145          return 0;
 146       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 147       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 148       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 149       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 150          return 1;
 151       case PIPE_SHADER_CAP_SUBROUTINES:
 152          return 0;
 153       case PIPE_SHADER_CAP_INTEGERS:
 154          return 0;
 155       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 156       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 157          return I915_TEX_UNITS;
 158       case PIPE_SHADER_CAP_DOUBLES:
 159       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 160       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 161          return 0;
 162       default:
 163          debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
 164          return 0;
 165       }
 166       break;
 167    default:
 168       return 0;
 169    }
 170
 171 }
 172
 173 static int
 174 i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
 175 {
 176    struct i915_screen *is = i915_screen(screen);
 177
 178    switch (cap) {
 179    /* Supported features (boolean caps). */
 180    case PIPE_CAP_ANISOTROPIC_FILTER:
 181    case PIPE_CAP_NPOT_TEXTURES:
 182    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 183    case PIPE_CAP_POINT_SPRITE:
 184    case PIPE_CAP_PRIMITIVE_RESTART: /* draw module */
 185    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 186    case PIPE_CAP_TWO_SIDED_STENCIL:
 187    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 188    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 189    case PIPE_CAP_TGSI_INSTANCEID:
 190    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 191    case PIPE_CAP_USER_VERTEX_BUFFERS:
 192    case PIPE_CAP_USER_INDEX_BUFFERS:
 193    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 194       return 1;
 195
 196    /* Unsupported features (boolean caps). */
 197    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 198    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 199    case PIPE_CAP_INDEP_BLEND_ENABLE:
 200    case PIPE_CAP_INDEP_BLEND_FUNC:
 201    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 202    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 203    case PIPE_CAP_TEXTURE_SWIZZLE:
 204    case PIPE_CAP_QUERY_TIME_ELAPSED:
 205    case PIPE_CAP_SM3:
 206    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 207    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 208    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 209    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 210    case PIPE_CAP_CONDITIONAL_RENDER:
 211    case PIPE_CAP_TEXTURE_BARRIER:
 212    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 213    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 214    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 215    case PIPE_CAP_START_INSTANCE:
 216    case PIPE_CAP_QUERY_TIMESTAMP:
 217    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 218    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 219    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 220    case PIPE_CAP_CUBE_MAP_ARRAY:
 221    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 222    case PIPE_CAP_TGSI_TEXCOORD:
 223    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 224    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 225    case PIPE_CAP_TEXTURE_GATHER_SM5:
 226    case PIPE_CAP_FAKE_SW_MSAA:
 227    case PIPE_CAP_TEXTURE_QUERY_LOD:
 228    case PIPE_CAP_SAMPLE_SHADING:
 229    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 230    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 231    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 232    case PIPE_CAP_CLIP_HALFZ:
 233    case PIPE_CAP_VERTEXID_NOBASE:
 234    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 235    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 236    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 237       return 0;
 238
 239    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 240    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 241    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 242    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 243    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 244    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 245    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 246    case PIPE_CAP_DRAW_INDIRECT:
 247    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 248    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 249       return 0;
 250
 251    case PIPE_CAP_MAX_VIEWPORTS:
 252       return 1;
 253
 254    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 255       return 64;
 256
 257    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 258       return 120;
 259
 260    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 261       return 16;
 262
 263    /* Features we can lie about (boolean caps). */
 264    case PIPE_CAP_OCCLUSION_QUERY:
 265       return is->debug.lie ? 1 : 0;
 266
 267    /* Texturing. */
 268    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 269       return I915_MAX_TEXTURE_2D_LEVELS;
 270    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 271       return I915_MAX_TEXTURE_3D_LEVELS;
 272    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 273       return I915_MAX_TEXTURE_2D_LEVELS;
 274    case PIPE_CAP_MIN_TEXEL_OFFSET:
 275    case PIPE_CAP_MAX_TEXEL_OFFSET:
 276    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 277    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 278    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 279    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 280    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 281       return 0;
 282
 283    /* Render targets. */
 284    case PIPE_CAP_MAX_RENDER_TARGETS:
 285       return 1;
 286
 287    /* Geometry shader output, unsupported. */
 288    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 289    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 290    case PIPE_CAP_MAX_VERTEX_STREAMS:
 291       return 0;
 292
 293    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 294       return 2048;
 295
 296    /* Fragment coordinate conventions. */
 297    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 298    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 299       return 1;
 300    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 301    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 302       return 0;
 303    case PIPE_CAP_ENDIANNESS:
 304       return PIPE_ENDIAN_LITTLE;
 305
 306    case PIPE_CAP_VENDOR_ID:
 307       return 0x8086;
 308    case PIPE_CAP_DEVICE_ID:
 309       return is->iws->pci_id;
 310    case PIPE_CAP_ACCELERATED:
 311       return 1;
 312    case PIPE_CAP_VIDEO_MEMORY: {
 313       /* Once a batch uses more than 75% of the maximum mappable size, we
 314        * assume that there's some fragmentation, and we start doing extra
 315        * flushing, etc.  That's the big cliff apps will care about.
 316        */
 317       const int gpu_mappable_megabytes = is->iws->aperture_size(is->iws) * 3 / 4;
 318       uint64_t system_memory;
 319
 320       if (!os_get_total_physical_memory(&system_memory))
 321          return 0;
 322
 323       return MIN2(gpu_mappable_megabytes, (int)(system_memory >> 20));
 324    }
 325    case PIPE_CAP_UMA:
 326       return 1;
 327
 328    default:
 329       debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
 330       return 0;
 331    }
 332 }
 333
 334 static float
 335 i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
 336 {
 337    switch(cap) {
 338    case PIPE_CAPF_MAX_LINE_WIDTH:
 339       /* fall-through */
 340    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 341       return 7.5;
 342
 343    case PIPE_CAPF_MAX_POINT_WIDTH:
 344       /* fall-through */
 345    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 346       return 255.0;
 347
 348    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 349       return 4.0;
 350
 351    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 352       return 16.0;
 353
 354    default:
 355       debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
 356       return 0;
 357    }
 358 }
 359
 360 boolean
 361 i915_is_format_supported(struct pipe_screen *screen,
 362                          enum pipe_format format,
 363                          enum pipe_texture_target target,
 364                          unsigned sample_count,
 365                          unsigned tex_usage)
 366 {
 367    static const enum pipe_format tex_supported[] = {
 368       PIPE_FORMAT_B8G8R8A8_UNORM,
 369       PIPE_FORMAT_B8G8R8A8_SRGB,
 370       PIPE_FORMAT_B8G8R8X8_UNORM,
 371       PIPE_FORMAT_R8G8B8A8_UNORM,
 372       PIPE_FORMAT_R8G8B8X8_UNORM,
 373       PIPE_FORMAT_B4G4R4A4_UNORM,
 374       PIPE_FORMAT_B5G6R5_UNORM,
 375       PIPE_FORMAT_B5G5R5A1_UNORM,
 376       PIPE_FORMAT_B10G10R10A2_UNORM,
 377       PIPE_FORMAT_L8_UNORM,
 378       PIPE_FORMAT_A8_UNORM,
 379       PIPE_FORMAT_I8_UNORM,
 380       PIPE_FORMAT_L8A8_UNORM,
 381       PIPE_FORMAT_UYVY,
 382       PIPE_FORMAT_YUYV,
 383       /* XXX why not?
 384       PIPE_FORMAT_Z16_UNORM, */
 385       PIPE_FORMAT_DXT1_RGB,
 386       PIPE_FORMAT_DXT1_RGBA,
 387       PIPE_FORMAT_DXT3_RGBA,
 388       PIPE_FORMAT_DXT5_RGBA,
 389       PIPE_FORMAT_Z24X8_UNORM,
 390       PIPE_FORMAT_Z24_UNORM_S8_UINT,
 391       PIPE_FORMAT_NONE  /* list terminator */
 392    };
 393    static const enum pipe_format render_supported[] = {
 394       PIPE_FORMAT_B8G8R8A8_UNORM,
 395       PIPE_FORMAT_B8G8R8X8_UNORM,
 396       PIPE_FORMAT_R8G8B8A8_UNORM,
 397       PIPE_FORMAT_R8G8B8X8_UNORM,
 398       PIPE_FORMAT_B5G6R5_UNORM,
 399       PIPE_FORMAT_B5G5R5A1_UNORM,
 400       PIPE_FORMAT_B4G4R4A4_UNORM,
 401       PIPE_FORMAT_B10G10R10A2_UNORM,
 402       PIPE_FORMAT_L8_UNORM,
 403       PIPE_FORMAT_A8_UNORM,
 404       PIPE_FORMAT_I8_UNORM,
 405       PIPE_FORMAT_NONE  /* list terminator */
 406    };
 407    static const enum pipe_format depth_supported[] = {
 408       /* XXX why not?
 409       PIPE_FORMAT_Z16_UNORM, */
 410       PIPE_FORMAT_Z24X8_UNORM,
 411       PIPE_FORMAT_Z24_UNORM_S8_UINT,
 412       PIPE_FORMAT_NONE  /* list terminator */
 413    };
 414    const enum pipe_format *list;
 415    uint i;
 416
 417    if (!util_format_is_supported(format, tex_usage))
 418       return FALSE;
 419
 420    if (sample_count > 1)
 421       return FALSE;
 422
 423    if(tex_usage & PIPE_BIND_DEPTH_STENCIL)
 424       list = depth_supported;
 425    else if (tex_usage & PIPE_BIND_RENDER_TARGET)
 426       list = render_supported;
 427    else if (tex_usage & PIPE_BIND_SAMPLER_VIEW)
 428       list = tex_supported;
 429    else
 430       return TRUE; /* PIPE_BIND_{VERTEX,INDEX}_BUFFER */
 431
 432    for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
 433       if (list[i] == format)
 434          return TRUE;
 435    }
 436
 437    return FALSE;
 438 }
 439
 440
 441 /*
 442  * Fence functions
 443  */
 444
 445
 446 static void
 447 i915_fence_reference(struct pipe_screen *screen,
 448                      struct pipe_fence_handle **ptr,
 449                      struct pipe_fence_handle *fence)
 450 {
 451    struct i915_screen *is = i915_screen(screen);
 452
 453    is->iws->fence_reference(is->iws, ptr, fence);
 454 }
 455
 456 static boolean
 457 i915_fence_signalled(struct pipe_screen *screen,
 458                      struct pipe_fence_handle *fence)
 459 {
 460    struct i915_screen *is = i915_screen(screen);
 461
 462    return is->iws->fence_signalled(is->iws, fence) == 1;
 463 }
 464
 465 static boolean
 466 i915_fence_finish(struct pipe_screen *screen,
 467                   struct pipe_fence_handle *fence,
 468                   uint64_t timeout)
 469 {
 470    struct i915_screen *is = i915_screen(screen);
 471
 472    return is->iws->fence_finish(is->iws, fence) == 1;
 473 }
 474
 475
 476 /*
 477  * Generic functions
 478  */
 479
 480
 481 static void
 482 i915_flush_frontbuffer(struct pipe_screen *screen,
 483                        struct pipe_resource *resource,
 484                        unsigned level, unsigned layer,
 485                        void *winsys_drawable_handle,
 486                        struct pipe_box *sub_box)
 487 {
 488    /* XXX: Dummy right now. */
 489    (void)screen;
 490    (void)resource;
 491    (void)level;
 492    (void)layer;
 493    (void)winsys_drawable_handle;
 494    (void)sub_box;
 495 }
 496
 497 static void
 498 i915_destroy_screen(struct pipe_screen *screen)
 499 {
 500    struct i915_screen *is = i915_screen(screen);
 501
 502    if (is->iws)
 503       is->iws->destroy(is->iws);
 504
 505    FREE(is);
 506 }
 507
 508 /**
 509  * Create a new i915_screen object
 510  */
 511 struct pipe_screen *
 512 i915_screen_create(struct i915_winsys *iws)
 513 {
 514    struct i915_screen *is = CALLOC_STRUCT(i915_screen);
 515
 516    if (!is)
 517       return NULL;
 518
 519    switch (iws->pci_id) {
 520    case PCI_CHIP_I915_G:
 521    case PCI_CHIP_I915_GM:
 522       is->is_i945 = FALSE;
 523       break;
 524
 525    case PCI_CHIP_I945_G:
 526    case PCI_CHIP_I945_GM:
 527    case PCI_CHIP_I945_GME:
 528    case PCI_CHIP_G33_G:
 529    case PCI_CHIP_Q33_G:
 530    case PCI_CHIP_Q35_G:
 531    case PCI_CHIP_PINEVIEW_G:
 532    case PCI_CHIP_PINEVIEW_M:
 533       is->is_i945 = TRUE;
 534       break;
 535
 536    default:
 537       debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
 538                    __FUNCTION__, iws->pci_id);
 539       FREE(is);
 540       return NULL;
 541    }
 542
 543    is->iws = iws;
 544
 545    is->base.destroy = i915_destroy_screen;
 546    is->base.flush_frontbuffer = i915_flush_frontbuffer;
 547
 548    is->base.get_name = i915_get_name;
 549    is->base.get_vendor = i915_get_vendor;
 550    is->base.get_param = i915_get_param;
 551    is->base.get_shader_param = i915_get_shader_param;
 552    is->base.get_paramf = i915_get_paramf;
 553    is->base.is_format_supported = i915_is_format_supported;
 554
 555    is->base.context_create = i915_create_context;
 556
 557    is->base.fence_reference = i915_fence_reference;
 558    is->base.fence_signalled = i915_fence_signalled;
 559    is->base.fence_finish = i915_fence_finish;
 560
 561    i915_init_screen_resource_functions(is);
 562
 563    i915_debug_init(is);
 564
 565    util_format_s3tc_init();
 566
 567    return &is->base;
 568 }