1 /**************************************************************************
3 * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "draw/draw_context.h"
30 #include "util/u_format.h"
31 #include "util/u_format_s3tc.h"
32 #include "util/u_inlines.h"
33 #include "util/u_memory.h"
34 #include "util/u_string.h"
37 #include "i915_debug.h"
38 #include "i915_context.h"
39 #include "i915_screen.h"
40 #include "i915_resource.h"
41 #include "i915_winsys.h"
42 #include "i915_public.h"
51 i915_get_vendor(struct pipe_screen
*screen
)
53 return "VMware, Inc.";
57 i915_get_name(struct pipe_screen
*screen
)
59 static char buffer
[128];
62 switch (i915_screen(screen
)->iws
->pci_id
) {
66 case PCI_CHIP_I915_GM
:
72 case PCI_CHIP_I945_GM
:
75 case PCI_CHIP_I945_GME
:
87 case PCI_CHIP_PINEVIEW_G
:
88 chipset
= "Pineview G";
90 case PCI_CHIP_PINEVIEW_M
:
91 chipset
= "Pineview M";
98 util_snprintf(buffer
, sizeof(buffer
), "i915 (chipset: %s)", chipset
);
103 i915_get_shader_param(struct pipe_screen
*screen
, unsigned shader
, enum pipe_shader_cap cap
)
106 case PIPE_SHADER_VERTEX
:
108 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
109 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS
:
110 if (debug_get_bool_option("DRAW_USE_LLVM", TRUE
))
111 return PIPE_MAX_SAMPLERS
;
115 return draw_get_shader_param(shader
, cap
);
117 case PIPE_SHADER_FRAGMENT
:
118 /* XXX: some of these are just shader model 2.0 values, fix this! */
120 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
121 return I915_MAX_ALU_INSN
+ I915_MAX_TEX_INSN
;
122 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
123 return I915_MAX_ALU_INSN
;
124 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
125 return I915_MAX_TEX_INSN
;
126 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
128 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
130 case PIPE_SHADER_CAP_MAX_INPUTS
:
132 case PIPE_SHADER_CAP_MAX_CONSTS
:
134 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
136 case PIPE_SHADER_CAP_MAX_TEMPS
:
137 return 12; /* XXX: 12 -> 32 ? */
138 case PIPE_SHADER_CAP_MAX_ADDRS
:
140 case PIPE_SHADER_CAP_MAX_PREDS
:
142 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
143 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
145 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
146 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
147 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
148 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
150 case PIPE_SHADER_CAP_SUBROUTINES
:
152 case PIPE_SHADER_CAP_INTEGERS
:
154 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
155 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS
:
156 return I915_TEX_UNITS
;
158 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__
, cap
);
169 i915_get_param(struct pipe_screen
*screen
, enum pipe_cap cap
)
171 struct i915_screen
*is
= i915_screen(screen
);
174 /* Supported features (boolean caps). */
175 case PIPE_CAP_ANISOTROPIC_FILTER
:
176 case PIPE_CAP_NPOT_TEXTURES
:
177 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
:
178 case PIPE_CAP_POINT_SPRITE
:
179 case PIPE_CAP_PRIMITIVE_RESTART
: /* draw module */
180 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
181 case PIPE_CAP_TWO_SIDED_STENCIL
:
182 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
183 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
184 case PIPE_CAP_TGSI_INSTANCEID
:
185 case PIPE_CAP_VERTEX_COLOR_CLAMPED
:
186 case PIPE_CAP_USER_VERTEX_BUFFERS
:
187 case PIPE_CAP_USER_INDEX_BUFFERS
:
188 case PIPE_CAP_USER_CONSTANT_BUFFERS
:
190 case PIPE_CAP_TGSI_TEXCOORD
:
193 /* Unsupported features (boolean caps). */
194 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
195 case PIPE_CAP_DEPTH_CLIP_DISABLE
:
196 case PIPE_CAP_INDEP_BLEND_ENABLE
:
197 case PIPE_CAP_INDEP_BLEND_FUNC
:
198 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
199 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
200 case PIPE_CAP_TEXTURE_SWIZZLE
:
201 case PIPE_CAP_QUERY_TIME_ELAPSED
:
203 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
204 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
:
205 case PIPE_CAP_SCALED_RESOLVE
:
206 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED
:
207 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
208 case PIPE_CAP_CONDITIONAL_RENDER
:
209 case PIPE_CAP_TEXTURE_BARRIER
:
210 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS
:
211 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED
:
212 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION
:
213 case PIPE_CAP_START_INSTANCE
:
214 case PIPE_CAP_QUERY_TIMESTAMP
:
215 case PIPE_CAP_QUERY_PIPELINE_STATISTICS
:
216 case PIPE_CAP_TEXTURE_MULTISAMPLE
:
217 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT
:
218 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK
:
220 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS
:
221 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME
:
222 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY
:
223 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY
:
224 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY
:
227 case PIPE_CAP_GLSL_FEATURE_LEVEL
:
230 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
:
233 /* Features we can lie about (boolean caps). */
234 case PIPE_CAP_OCCLUSION_QUERY
:
235 return is
->debug
.lie
? 1 : 0;
238 case PIPE_CAP_MAX_COMBINED_SAMPLERS
:
239 return i915_get_shader_param(screen
,
241 PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
) +
242 i915_get_shader_param(screen
,
243 PIPE_SHADER_FRAGMENT
,
244 PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
);
245 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
246 return I915_MAX_TEXTURE_2D_LEVELS
;
247 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
248 return I915_MAX_TEXTURE_3D_LEVELS
;
249 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
250 return I915_MAX_TEXTURE_2D_LEVELS
;
251 case PIPE_CAP_MIN_TEXEL_OFFSET
:
252 case PIPE_CAP_MAX_TEXEL_OFFSET
:
253 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS
:
254 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS
:
255 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS
:
258 /* Render targets. */
259 case PIPE_CAP_MAX_RENDER_TARGETS
:
262 /* Fragment coordinate conventions. */
263 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
264 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
266 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
267 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
269 case PIPE_CAP_ENDIANNESS
:
270 return PIPE_ENDIAN_LITTLE
;
273 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__
, cap
);
279 i915_get_paramf(struct pipe_screen
*screen
, enum pipe_capf cap
)
282 case PIPE_CAPF_MAX_LINE_WIDTH
:
284 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
287 case PIPE_CAPF_MAX_POINT_WIDTH
:
289 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
292 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
295 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
299 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__
, cap
);
305 i915_is_format_supported(struct pipe_screen
*screen
,
306 enum pipe_format format
,
307 enum pipe_texture_target target
,
308 unsigned sample_count
,
311 static const enum pipe_format tex_supported
[] = {
312 PIPE_FORMAT_B8G8R8A8_UNORM
,
313 PIPE_FORMAT_B8G8R8A8_SRGB
,
314 PIPE_FORMAT_B8G8R8X8_UNORM
,
315 PIPE_FORMAT_R8G8B8A8_UNORM
,
316 PIPE_FORMAT_R8G8B8X8_UNORM
,
317 PIPE_FORMAT_B5G6R5_UNORM
,
318 PIPE_FORMAT_B10G10R10A2_UNORM
,
319 PIPE_FORMAT_L8_UNORM
,
320 PIPE_FORMAT_A8_UNORM
,
321 PIPE_FORMAT_I8_UNORM
,
322 PIPE_FORMAT_L8A8_UNORM
,
326 PIPE_FORMAT_Z16_UNORM, */
327 PIPE_FORMAT_DXT1_RGB
,
328 PIPE_FORMAT_DXT1_RGBA
,
329 PIPE_FORMAT_DXT3_RGBA
,
330 PIPE_FORMAT_DXT5_RGBA
,
331 PIPE_FORMAT_Z24X8_UNORM
,
332 PIPE_FORMAT_Z24_UNORM_S8_UINT
,
333 PIPE_FORMAT_NONE
/* list terminator */
335 static const enum pipe_format render_supported
[] = {
336 PIPE_FORMAT_B8G8R8A8_UNORM
,
337 PIPE_FORMAT_B8G8R8X8_UNORM
,
338 PIPE_FORMAT_R8G8B8A8_UNORM
,
339 PIPE_FORMAT_R8G8B8X8_UNORM
,
340 PIPE_FORMAT_B5G6R5_UNORM
,
341 PIPE_FORMAT_B10G10R10A2_UNORM
,
342 PIPE_FORMAT_L8_UNORM
,
343 PIPE_FORMAT_A8_UNORM
,
344 PIPE_FORMAT_I8_UNORM
,
345 PIPE_FORMAT_NONE
/* list terminator */
347 static const enum pipe_format depth_supported
[] = {
349 PIPE_FORMAT_Z16_UNORM, */
350 PIPE_FORMAT_Z24X8_UNORM
,
351 PIPE_FORMAT_Z24_UNORM_S8_UINT
,
352 PIPE_FORMAT_NONE
/* list terminator */
354 const enum pipe_format
*list
;
357 if (!util_format_is_supported(format
, tex_usage
))
360 if (sample_count
> 1)
363 if(tex_usage
& PIPE_BIND_DEPTH_STENCIL
)
364 list
= depth_supported
;
365 else if (tex_usage
& PIPE_BIND_RENDER_TARGET
)
366 list
= render_supported
;
367 else if (tex_usage
& PIPE_BIND_SAMPLER_VIEW
)
368 list
= tex_supported
;
370 return TRUE
; /* PIPE_BIND_{VERTEX,INDEX}_BUFFER */
372 for (i
= 0; list
[i
] != PIPE_FORMAT_NONE
; i
++) {
373 if (list
[i
] == format
)
387 i915_fence_reference(struct pipe_screen
*screen
,
388 struct pipe_fence_handle
**ptr
,
389 struct pipe_fence_handle
*fence
)
391 struct i915_screen
*is
= i915_screen(screen
);
393 is
->iws
->fence_reference(is
->iws
, ptr
, fence
);
397 i915_fence_signalled(struct pipe_screen
*screen
,
398 struct pipe_fence_handle
*fence
)
400 struct i915_screen
*is
= i915_screen(screen
);
402 return is
->iws
->fence_signalled(is
->iws
, fence
) == 1;
406 i915_fence_finish(struct pipe_screen
*screen
,
407 struct pipe_fence_handle
*fence
,
410 struct i915_screen
*is
= i915_screen(screen
);
412 return is
->iws
->fence_finish(is
->iws
, fence
) == 1;
422 i915_flush_frontbuffer(struct pipe_screen
*screen
,
423 struct pipe_resource
*resource
,
424 unsigned level
, unsigned layer
,
425 void *winsys_drawable_handle
)
427 /* XXX: Dummy right now. */
432 (void)winsys_drawable_handle
;
436 i915_destroy_screen(struct pipe_screen
*screen
)
438 struct i915_screen
*is
= i915_screen(screen
);
441 is
->iws
->destroy(is
->iws
);
447 * Create a new i915_screen object
450 i915_screen_create(struct i915_winsys
*iws
)
452 struct i915_screen
*is
= CALLOC_STRUCT(i915_screen
);
457 switch (iws
->pci_id
) {
458 case PCI_CHIP_I915_G
:
459 case PCI_CHIP_I915_GM
:
463 case PCI_CHIP_I945_G
:
464 case PCI_CHIP_I945_GM
:
465 case PCI_CHIP_I945_GME
:
469 case PCI_CHIP_PINEVIEW_G
:
470 case PCI_CHIP_PINEVIEW_M
:
475 debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
476 __FUNCTION__
, iws
->pci_id
);
483 is
->base
.destroy
= i915_destroy_screen
;
484 is
->base
.flush_frontbuffer
= i915_flush_frontbuffer
;
486 is
->base
.get_name
= i915_get_name
;
487 is
->base
.get_vendor
= i915_get_vendor
;
488 is
->base
.get_param
= i915_get_param
;
489 is
->base
.get_shader_param
= i915_get_shader_param
;
490 is
->base
.get_paramf
= i915_get_paramf
;
491 is
->base
.is_format_supported
= i915_is_format_supported
;
493 is
->base
.context_create
= i915_create_context
;
495 is
->base
.fence_reference
= i915_fence_reference
;
496 is
->base
.fence_signalled
= i915_fence_signalled
;
497 is
->base
.fence_finish
= i915_fence_finish
;
499 i915_init_screen_resource_functions(is
);
503 util_format_s3tc_init();