gallium: new shader cap bit for the amount of sampler views
[mesa.git] / src / gallium / drivers / i915 / i915_screen.c
1 /**************************************************************************
2 *
3 * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "draw/draw_context.h"
30 #include "util/u_format.h"
31 #include "util/u_format_s3tc.h"
32 #include "util/u_inlines.h"
33 #include "util/u_memory.h"
34 #include "util/u_string.h"
35
36 #include "i915_reg.h"
37 #include "i915_debug.h"
38 #include "i915_context.h"
39 #include "i915_screen.h"
40 #include "i915_resource.h"
41 #include "i915_winsys.h"
42 #include "i915_public.h"
43
44
45 /*
46 * Probe functions
47 */
48
49
50 static const char *
51 i915_get_vendor(struct pipe_screen *screen)
52 {
53 return "VMware, Inc.";
54 }
55
56 static const char *
57 i915_get_name(struct pipe_screen *screen)
58 {
59 static char buffer[128];
60 const char *chipset;
61
62 switch (i915_screen(screen)->iws->pci_id) {
63 case PCI_CHIP_I915_G:
64 chipset = "915G";
65 break;
66 case PCI_CHIP_I915_GM:
67 chipset = "915GM";
68 break;
69 case PCI_CHIP_I945_G:
70 chipset = "945G";
71 break;
72 case PCI_CHIP_I945_GM:
73 chipset = "945GM";
74 break;
75 case PCI_CHIP_I945_GME:
76 chipset = "945GME";
77 break;
78 case PCI_CHIP_G33_G:
79 chipset = "G33";
80 break;
81 case PCI_CHIP_Q35_G:
82 chipset = "Q35";
83 break;
84 case PCI_CHIP_Q33_G:
85 chipset = "Q33";
86 break;
87 case PCI_CHIP_PINEVIEW_G:
88 chipset = "Pineview G";
89 break;
90 case PCI_CHIP_PINEVIEW_M:
91 chipset = "Pineview M";
92 break;
93 default:
94 chipset = "unknown";
95 break;
96 }
97
98 util_snprintf(buffer, sizeof(buffer), "i915 (chipset: %s)", chipset);
99 return buffer;
100 }
101
102 static int
103 i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap cap)
104 {
105 switch(shader) {
106 case PIPE_SHADER_VERTEX:
107 switch (cap) {
108 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
109 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
110 if (debug_get_bool_option("DRAW_USE_LLVM", TRUE))
111 return PIPE_MAX_SAMPLERS;
112 else
113 return 0;
114 default:
115 return draw_get_shader_param(shader, cap);
116 }
117 case PIPE_SHADER_FRAGMENT:
118 /* XXX: some of these are just shader model 2.0 values, fix this! */
119 switch(cap) {
120 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
121 return I915_MAX_ALU_INSN + I915_MAX_TEX_INSN;
122 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
123 return I915_MAX_ALU_INSN;
124 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
125 return I915_MAX_TEX_INSN;
126 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
127 return 8;
128 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
129 return 0;
130 case PIPE_SHADER_CAP_MAX_INPUTS:
131 return 10;
132 case PIPE_SHADER_CAP_MAX_CONSTS:
133 return 32;
134 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
135 return 1;
136 case PIPE_SHADER_CAP_MAX_TEMPS:
137 return 12; /* XXX: 12 -> 32 ? */
138 case PIPE_SHADER_CAP_MAX_ADDRS:
139 return 0;
140 case PIPE_SHADER_CAP_MAX_PREDS:
141 return 0;
142 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
143 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
144 return 0;
145 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
146 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
147 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
148 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
149 return 1;
150 case PIPE_SHADER_CAP_SUBROUTINES:
151 return 0;
152 case PIPE_SHADER_CAP_INTEGERS:
153 return 0;
154 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
155 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
156 return I915_TEX_UNITS;
157 default:
158 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
159 return 0;
160 }
161 break;
162 default:
163 return 0;
164 }
165
166 }
167
168 static int
169 i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
170 {
171 struct i915_screen *is = i915_screen(screen);
172
173 switch (cap) {
174 /* Supported features (boolean caps). */
175 case PIPE_CAP_ANISOTROPIC_FILTER:
176 case PIPE_CAP_NPOT_TEXTURES:
177 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
178 case PIPE_CAP_POINT_SPRITE:
179 case PIPE_CAP_PRIMITIVE_RESTART: /* draw module */
180 case PIPE_CAP_TEXTURE_SHADOW_MAP:
181 case PIPE_CAP_TWO_SIDED_STENCIL:
182 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
183 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
184 case PIPE_CAP_TGSI_INSTANCEID:
185 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
186 case PIPE_CAP_USER_VERTEX_BUFFERS:
187 case PIPE_CAP_USER_INDEX_BUFFERS:
188 case PIPE_CAP_USER_CONSTANT_BUFFERS:
189 return 1;
190 case PIPE_CAP_TGSI_TEXCOORD:
191 return 0;
192
193 /* Unsupported features (boolean caps). */
194 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
195 case PIPE_CAP_DEPTH_CLIP_DISABLE:
196 case PIPE_CAP_INDEP_BLEND_ENABLE:
197 case PIPE_CAP_INDEP_BLEND_FUNC:
198 case PIPE_CAP_SHADER_STENCIL_EXPORT:
199 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
200 case PIPE_CAP_TEXTURE_SWIZZLE:
201 case PIPE_CAP_QUERY_TIME_ELAPSED:
202 case PIPE_CAP_SM3:
203 case PIPE_CAP_SEAMLESS_CUBE_MAP:
204 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
205 case PIPE_CAP_SCALED_RESOLVE:
206 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
207 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
208 case PIPE_CAP_CONDITIONAL_RENDER:
209 case PIPE_CAP_TEXTURE_BARRIER:
210 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
211 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
212 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
213 case PIPE_CAP_START_INSTANCE:
214 case PIPE_CAP_QUERY_TIMESTAMP:
215 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
216 case PIPE_CAP_TEXTURE_MULTISAMPLE:
217 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
218 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
219 return 0;
220 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
221 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
222 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
223 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
224 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
225 return 0;
226
227 case PIPE_CAP_GLSL_FEATURE_LEVEL:
228 return 120;
229
230 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
231 return 16;
232
233 /* Features we can lie about (boolean caps). */
234 case PIPE_CAP_OCCLUSION_QUERY:
235 return is->debug.lie ? 1 : 0;
236
237 /* Texturing. */
238 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
239 return i915_get_shader_param(screen,
240 PIPE_SHADER_VERTEX,
241 PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS) +
242 i915_get_shader_param(screen,
243 PIPE_SHADER_FRAGMENT,
244 PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS);
245 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
246 return I915_MAX_TEXTURE_2D_LEVELS;
247 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
248 return I915_MAX_TEXTURE_3D_LEVELS;
249 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
250 return I915_MAX_TEXTURE_2D_LEVELS;
251 case PIPE_CAP_MIN_TEXEL_OFFSET:
252 case PIPE_CAP_MAX_TEXEL_OFFSET:
253 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
254 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
255 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
256 return 0;
257
258 /* Render targets. */
259 case PIPE_CAP_MAX_RENDER_TARGETS:
260 return 1;
261
262 /* Fragment coordinate conventions. */
263 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
264 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
265 return 1;
266 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
267 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
268 return 0;
269 case PIPE_CAP_ENDIANNESS:
270 return PIPE_ENDIAN_LITTLE;
271
272 default:
273 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
274 return 0;
275 }
276 }
277
278 static float
279 i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
280 {
281 switch(cap) {
282 case PIPE_CAPF_MAX_LINE_WIDTH:
283 /* fall-through */
284 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
285 return 7.5;
286
287 case PIPE_CAPF_MAX_POINT_WIDTH:
288 /* fall-through */
289 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
290 return 255.0;
291
292 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
293 return 4.0;
294
295 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
296 return 16.0;
297
298 default:
299 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
300 return 0;
301 }
302 }
303
304 boolean
305 i915_is_format_supported(struct pipe_screen *screen,
306 enum pipe_format format,
307 enum pipe_texture_target target,
308 unsigned sample_count,
309 unsigned tex_usage)
310 {
311 static const enum pipe_format tex_supported[] = {
312 PIPE_FORMAT_B8G8R8A8_UNORM,
313 PIPE_FORMAT_B8G8R8A8_SRGB,
314 PIPE_FORMAT_B8G8R8X8_UNORM,
315 PIPE_FORMAT_R8G8B8A8_UNORM,
316 PIPE_FORMAT_R8G8B8X8_UNORM,
317 PIPE_FORMAT_B5G6R5_UNORM,
318 PIPE_FORMAT_B10G10R10A2_UNORM,
319 PIPE_FORMAT_L8_UNORM,
320 PIPE_FORMAT_A8_UNORM,
321 PIPE_FORMAT_I8_UNORM,
322 PIPE_FORMAT_L8A8_UNORM,
323 PIPE_FORMAT_UYVY,
324 PIPE_FORMAT_YUYV,
325 /* XXX why not?
326 PIPE_FORMAT_Z16_UNORM, */
327 PIPE_FORMAT_DXT1_RGB,
328 PIPE_FORMAT_DXT1_RGBA,
329 PIPE_FORMAT_DXT3_RGBA,
330 PIPE_FORMAT_DXT5_RGBA,
331 PIPE_FORMAT_Z24X8_UNORM,
332 PIPE_FORMAT_Z24_UNORM_S8_UINT,
333 PIPE_FORMAT_NONE /* list terminator */
334 };
335 static const enum pipe_format render_supported[] = {
336 PIPE_FORMAT_B8G8R8A8_UNORM,
337 PIPE_FORMAT_B8G8R8X8_UNORM,
338 PIPE_FORMAT_R8G8B8A8_UNORM,
339 PIPE_FORMAT_R8G8B8X8_UNORM,
340 PIPE_FORMAT_B5G6R5_UNORM,
341 PIPE_FORMAT_B10G10R10A2_UNORM,
342 PIPE_FORMAT_L8_UNORM,
343 PIPE_FORMAT_A8_UNORM,
344 PIPE_FORMAT_I8_UNORM,
345 PIPE_FORMAT_NONE /* list terminator */
346 };
347 static const enum pipe_format depth_supported[] = {
348 /* XXX why not?
349 PIPE_FORMAT_Z16_UNORM, */
350 PIPE_FORMAT_Z24X8_UNORM,
351 PIPE_FORMAT_Z24_UNORM_S8_UINT,
352 PIPE_FORMAT_NONE /* list terminator */
353 };
354 const enum pipe_format *list;
355 uint i;
356
357 if (!util_format_is_supported(format, tex_usage))
358 return FALSE;
359
360 if (sample_count > 1)
361 return FALSE;
362
363 if(tex_usage & PIPE_BIND_DEPTH_STENCIL)
364 list = depth_supported;
365 else if (tex_usage & PIPE_BIND_RENDER_TARGET)
366 list = render_supported;
367 else if (tex_usage & PIPE_BIND_SAMPLER_VIEW)
368 list = tex_supported;
369 else
370 return TRUE; /* PIPE_BIND_{VERTEX,INDEX}_BUFFER */
371
372 for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
373 if (list[i] == format)
374 return TRUE;
375 }
376
377 return FALSE;
378 }
379
380
381 /*
382 * Fence functions
383 */
384
385
386 static void
387 i915_fence_reference(struct pipe_screen *screen,
388 struct pipe_fence_handle **ptr,
389 struct pipe_fence_handle *fence)
390 {
391 struct i915_screen *is = i915_screen(screen);
392
393 is->iws->fence_reference(is->iws, ptr, fence);
394 }
395
396 static boolean
397 i915_fence_signalled(struct pipe_screen *screen,
398 struct pipe_fence_handle *fence)
399 {
400 struct i915_screen *is = i915_screen(screen);
401
402 return is->iws->fence_signalled(is->iws, fence) == 1;
403 }
404
405 static boolean
406 i915_fence_finish(struct pipe_screen *screen,
407 struct pipe_fence_handle *fence,
408 uint64_t timeout)
409 {
410 struct i915_screen *is = i915_screen(screen);
411
412 return is->iws->fence_finish(is->iws, fence) == 1;
413 }
414
415
416 /*
417 * Generic functions
418 */
419
420
421 static void
422 i915_flush_frontbuffer(struct pipe_screen *screen,
423 struct pipe_resource *resource,
424 unsigned level, unsigned layer,
425 void *winsys_drawable_handle)
426 {
427 /* XXX: Dummy right now. */
428 (void)screen;
429 (void)resource;
430 (void)level;
431 (void)layer;
432 (void)winsys_drawable_handle;
433 }
434
435 static void
436 i915_destroy_screen(struct pipe_screen *screen)
437 {
438 struct i915_screen *is = i915_screen(screen);
439
440 if (is->iws)
441 is->iws->destroy(is->iws);
442
443 FREE(is);
444 }
445
446 /**
447 * Create a new i915_screen object
448 */
449 struct pipe_screen *
450 i915_screen_create(struct i915_winsys *iws)
451 {
452 struct i915_screen *is = CALLOC_STRUCT(i915_screen);
453
454 if (!is)
455 return NULL;
456
457 switch (iws->pci_id) {
458 case PCI_CHIP_I915_G:
459 case PCI_CHIP_I915_GM:
460 is->is_i945 = FALSE;
461 break;
462
463 case PCI_CHIP_I945_G:
464 case PCI_CHIP_I945_GM:
465 case PCI_CHIP_I945_GME:
466 case PCI_CHIP_G33_G:
467 case PCI_CHIP_Q33_G:
468 case PCI_CHIP_Q35_G:
469 case PCI_CHIP_PINEVIEW_G:
470 case PCI_CHIP_PINEVIEW_M:
471 is->is_i945 = TRUE;
472 break;
473
474 default:
475 debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
476 __FUNCTION__, iws->pci_id);
477 FREE(is);
478 return NULL;
479 }
480
481 is->iws = iws;
482
483 is->base.destroy = i915_destroy_screen;
484 is->base.flush_frontbuffer = i915_flush_frontbuffer;
485
486 is->base.get_name = i915_get_name;
487 is->base.get_vendor = i915_get_vendor;
488 is->base.get_param = i915_get_param;
489 is->base.get_shader_param = i915_get_shader_param;
490 is->base.get_paramf = i915_get_paramf;
491 is->base.is_format_supported = i915_is_format_supported;
492
493 is->base.context_create = i915_create_context;
494
495 is->base.fence_reference = i915_fence_reference;
496 is->base.fence_signalled = i915_fence_signalled;
497 is->base.fence_finish = i915_fence_finish;
498
499 i915_init_screen_resource_functions(is);
500
501 i915_debug_init(is);
502
503 util_format_s3tc_init();
504
505 return &is->base;
506 }