src/gallium/drivers/i915/i915_screen.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 VMware, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "draw/draw_context.h"
  30 #include "os/os_misc.h"
  31 #include "util/u_format.h"
  32 #include "util/u_format_s3tc.h"
  33 #include "util/u_inlines.h"
  34 #include "util/u_memory.h"
  35 #include "util/u_string.h"
  36
  37 #include "i915_reg.h"
  38 #include "i915_debug.h"
  39 #include "i915_context.h"
  40 #include "i915_screen.h"
  41 #include "i915_resource.h"
  42 #include "i915_winsys.h"
  43 #include "i915_public.h"
  44
  45
  46 /*
  47  * Probe functions
  48  */
  49
  50
  51 static const char *
  52 i915_get_vendor(struct pipe_screen *screen)
  53 {
  54    return "Mesa Project";
  55 }
  56
  57 static const char *
  58 i915_get_name(struct pipe_screen *screen)
  59 {
  60    static char buffer[128];
  61    const char *chipset;
  62
  63    switch (i915_screen(screen)->iws->pci_id) {
  64    case PCI_CHIP_I915_G:
  65       chipset = "915G";
  66       break;
  67    case PCI_CHIP_I915_GM:
  68       chipset = "915GM";
  69       break;
  70    case PCI_CHIP_I945_G:
  71       chipset = "945G";
  72       break;
  73    case PCI_CHIP_I945_GM:
  74       chipset = "945GM";
  75       break;
  76    case PCI_CHIP_I945_GME:
  77       chipset = "945GME";
  78       break;
  79    case PCI_CHIP_G33_G:
  80       chipset = "G33";
  81       break;
  82    case PCI_CHIP_Q35_G:
  83       chipset = "Q35";
  84       break;
  85    case PCI_CHIP_Q33_G:
  86       chipset = "Q33";
  87       break;
  88    case PCI_CHIP_PINEVIEW_G:
  89       chipset = "Pineview G";
  90       break;
  91    case PCI_CHIP_PINEVIEW_M:
  92       chipset = "Pineview M";
  93       break;
  94    default:
  95       chipset = "unknown";
  96       break;
  97    }
  98
  99    util_snprintf(buffer, sizeof(buffer), "i915 (chipset: %s)", chipset);
 100    return buffer;
 101 }
 102
 103 static int
 104 i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap cap)
 105 {
 106    switch(shader) {
 107    case PIPE_SHADER_VERTEX:
 108       switch (cap) {
 109       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 110       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 111          if (debug_get_bool_option("DRAW_USE_LLVM", TRUE))
 112             return PIPE_MAX_SAMPLERS;
 113          else
 114             return 0;
 115        default:
 116          return draw_get_shader_param(shader, cap);
 117       }
 118    case PIPE_SHADER_FRAGMENT:
 119       /* XXX: some of these are just shader model 2.0 values, fix this! */
 120       switch(cap) {
 121       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 122          return I915_MAX_ALU_INSN + I915_MAX_TEX_INSN;
 123       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 124          return I915_MAX_ALU_INSN;
 125       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 126          return I915_MAX_TEX_INSN;
 127       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 128          return 8;
 129       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 130          return 0;
 131       case PIPE_SHADER_CAP_MAX_INPUTS:
 132          return 10;
 133       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 134          return 1;
 135       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 136          return 32 * sizeof(float[4]);
 137       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 138          return 1;
 139       case PIPE_SHADER_CAP_MAX_TEMPS:
 140          return 12; /* XXX: 12 -> 32 ? */
 141       case PIPE_SHADER_CAP_MAX_PREDS:
 142          return 0;
 143       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 144       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 145          return 0;
 146       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 147       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 148       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 149       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 150          return 1;
 151       case PIPE_SHADER_CAP_SUBROUTINES:
 152          return 0;
 153       case PIPE_SHADER_CAP_INTEGERS:
 154          return 0;
 155       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 156       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 157          return I915_TEX_UNITS;
 158       default:
 159          debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
 160          return 0;
 161       }
 162       break;
 163    default:
 164       return 0;
 165    }
 166
 167 }
 168
 169 static int
 170 i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
 171 {
 172    struct i915_screen *is = i915_screen(screen);
 173
 174    switch (cap) {
 175    /* Supported features (boolean caps). */
 176    case PIPE_CAP_ANISOTROPIC_FILTER:
 177    case PIPE_CAP_NPOT_TEXTURES:
 178    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 179    case PIPE_CAP_POINT_SPRITE:
 180    case PIPE_CAP_PRIMITIVE_RESTART: /* draw module */
 181    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 182    case PIPE_CAP_TWO_SIDED_STENCIL:
 183    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 184    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 185    case PIPE_CAP_TGSI_INSTANCEID:
 186    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 187    case PIPE_CAP_USER_VERTEX_BUFFERS:
 188    case PIPE_CAP_USER_INDEX_BUFFERS:
 189    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 190       return 1;
 191
 192    /* Unsupported features (boolean caps). */
 193    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 194    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 195    case PIPE_CAP_INDEP_BLEND_ENABLE:
 196    case PIPE_CAP_INDEP_BLEND_FUNC:
 197    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 198    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 199    case PIPE_CAP_TEXTURE_SWIZZLE:
 200    case PIPE_CAP_QUERY_TIME_ELAPSED:
 201    case PIPE_CAP_SM3:
 202    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 203    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 204    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 205    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 206    case PIPE_CAP_CONDITIONAL_RENDER:
 207    case PIPE_CAP_TEXTURE_BARRIER:
 208    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 209    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 210    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 211    case PIPE_CAP_START_INSTANCE:
 212    case PIPE_CAP_QUERY_TIMESTAMP:
 213    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 214    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 215    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 216    case PIPE_CAP_CUBE_MAP_ARRAY:
 217    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 218    case PIPE_CAP_TGSI_TEXCOORD:
 219    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 220    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 221    case PIPE_CAP_TEXTURE_GATHER_SM5:
 222    case PIPE_CAP_FAKE_SW_MSAA:
 223    case PIPE_CAP_TEXTURE_QUERY_LOD:
 224    case PIPE_CAP_SAMPLE_SHADING:
 225    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 226    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 227    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 228       return 0;
 229
 230    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 231    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 232    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 233    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 234    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 235    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 236    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 237    case PIPE_CAP_DRAW_INDIRECT:
 238    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 239    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 240       return 0;
 241
 242    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 243       return 64;
 244
 245    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 246       return 120;
 247
 248    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 249       return 16;
 250
 251    /* Features we can lie about (boolean caps). */
 252    case PIPE_CAP_OCCLUSION_QUERY:
 253       return is->debug.lie ? 1 : 0;
 254
 255    /* Texturing. */
 256    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 257       return I915_MAX_TEXTURE_2D_LEVELS;
 258    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 259       return I915_MAX_TEXTURE_3D_LEVELS;
 260    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 261       return I915_MAX_TEXTURE_2D_LEVELS;
 262    case PIPE_CAP_MIN_TEXEL_OFFSET:
 263    case PIPE_CAP_MAX_TEXEL_OFFSET:
 264    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 265    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 266    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 267    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 268    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 269       return 0;
 270
 271    /* Render targets. */
 272    case PIPE_CAP_MAX_RENDER_TARGETS:
 273       return 1;
 274
 275    /* Geometry shader output, unsupported. */
 276    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 277    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 278    case PIPE_CAP_MAX_VERTEX_STREAMS:
 279       return 0;
 280
 281    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 282       return 2048;
 283
 284    /* Fragment coordinate conventions. */
 285    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 286    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 287       return 1;
 288    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 289    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 290       return 0;
 291    case PIPE_CAP_ENDIANNESS:
 292       return PIPE_ENDIAN_LITTLE;
 293
 294    case PIPE_CAP_VENDOR_ID:
 295       return 0x8086;
 296    case PIPE_CAP_DEVICE_ID:
 297       return is->iws->pci_id;
 298    case PIPE_CAP_ACCELERATED:
 299       return 1;
 300    case PIPE_CAP_VIDEO_MEMORY: {
 301       /* Once a batch uses more than 75% of the maximum mappable size, we
 302        * assume that there's some fragmentation, and we start doing extra
 303        * flushing, etc.  That's the big cliff apps will care about.
 304        */
 305       const int gpu_mappable_megabytes = is->iws->aperture_size(is->iws) * 3 / 4;
 306       uint64_t system_memory;
 307
 308       if (!os_get_total_physical_memory(&system_memory))
 309          return 0;
 310
 311       return MIN2(gpu_mappable_megabytes, (int)(system_memory >> 20));
 312    }
 313    case PIPE_CAP_UMA:
 314       return 1;
 315
 316    default:
 317       debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
 318       return 0;
 319    }
 320 }
 321
 322 static float
 323 i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
 324 {
 325    switch(cap) {
 326    case PIPE_CAPF_MAX_LINE_WIDTH:
 327       /* fall-through */
 328    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 329       return 7.5;
 330
 331    case PIPE_CAPF_MAX_POINT_WIDTH:
 332       /* fall-through */
 333    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 334       return 255.0;
 335
 336    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 337       return 4.0;
 338
 339    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 340       return 16.0;
 341
 342    default:
 343       debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
 344       return 0;
 345    }
 346 }
 347
 348 boolean
 349 i915_is_format_supported(struct pipe_screen *screen,
 350                          enum pipe_format format,
 351                          enum pipe_texture_target target,
 352                          unsigned sample_count,
 353                          unsigned tex_usage)
 354 {
 355    static const enum pipe_format tex_supported[] = {
 356       PIPE_FORMAT_B8G8R8A8_UNORM,
 357       PIPE_FORMAT_B8G8R8A8_SRGB,
 358       PIPE_FORMAT_B8G8R8X8_UNORM,
 359       PIPE_FORMAT_R8G8B8A8_UNORM,
 360       PIPE_FORMAT_R8G8B8X8_UNORM,
 361       PIPE_FORMAT_B5G6R5_UNORM,
 362       PIPE_FORMAT_B10G10R10A2_UNORM,
 363       PIPE_FORMAT_L8_UNORM,
 364       PIPE_FORMAT_A8_UNORM,
 365       PIPE_FORMAT_I8_UNORM,
 366       PIPE_FORMAT_L8A8_UNORM,
 367       PIPE_FORMAT_UYVY,
 368       PIPE_FORMAT_YUYV,
 369       /* XXX why not?
 370       PIPE_FORMAT_Z16_UNORM, */
 371       PIPE_FORMAT_DXT1_RGB,
 372       PIPE_FORMAT_DXT1_RGBA,
 373       PIPE_FORMAT_DXT3_RGBA,
 374       PIPE_FORMAT_DXT5_RGBA,
 375       PIPE_FORMAT_Z24X8_UNORM,
 376       PIPE_FORMAT_Z24_UNORM_S8_UINT,
 377       PIPE_FORMAT_NONE  /* list terminator */
 378    };
 379    static const enum pipe_format render_supported[] = {
 380       PIPE_FORMAT_B8G8R8A8_UNORM,
 381       PIPE_FORMAT_B8G8R8X8_UNORM,
 382       PIPE_FORMAT_R8G8B8A8_UNORM,
 383       PIPE_FORMAT_R8G8B8X8_UNORM,
 384       PIPE_FORMAT_B5G6R5_UNORM,
 385       PIPE_FORMAT_B10G10R10A2_UNORM,
 386       PIPE_FORMAT_L8_UNORM,
 387       PIPE_FORMAT_A8_UNORM,
 388       PIPE_FORMAT_I8_UNORM,
 389       PIPE_FORMAT_NONE  /* list terminator */
 390    };
 391    static const enum pipe_format depth_supported[] = {
 392       /* XXX why not?
 393       PIPE_FORMAT_Z16_UNORM, */
 394       PIPE_FORMAT_Z24X8_UNORM,
 395       PIPE_FORMAT_Z24_UNORM_S8_UINT,
 396       PIPE_FORMAT_NONE  /* list terminator */
 397    };
 398    const enum pipe_format *list;
 399    uint i;
 400
 401    if (!util_format_is_supported(format, tex_usage))
 402       return FALSE;
 403
 404    if (sample_count > 1)
 405       return FALSE;
 406
 407    if(tex_usage & PIPE_BIND_DEPTH_STENCIL)
 408       list = depth_supported;
 409    else if (tex_usage & PIPE_BIND_RENDER_TARGET)
 410       list = render_supported;
 411    else if (tex_usage & PIPE_BIND_SAMPLER_VIEW)
 412       list = tex_supported;
 413    else
 414       return TRUE; /* PIPE_BIND_{VERTEX,INDEX}_BUFFER */
 415
 416    for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
 417       if (list[i] == format)
 418          return TRUE;
 419    }
 420
 421    return FALSE;
 422 }
 423
 424
 425 /*
 426  * Fence functions
 427  */
 428
 429
 430 static void
 431 i915_fence_reference(struct pipe_screen *screen,
 432                      struct pipe_fence_handle **ptr,
 433                      struct pipe_fence_handle *fence)
 434 {
 435    struct i915_screen *is = i915_screen(screen);
 436
 437    is->iws->fence_reference(is->iws, ptr, fence);
 438 }
 439
 440 static boolean
 441 i915_fence_signalled(struct pipe_screen *screen,
 442                      struct pipe_fence_handle *fence)
 443 {
 444    struct i915_screen *is = i915_screen(screen);
 445
 446    return is->iws->fence_signalled(is->iws, fence) == 1;
 447 }
 448
 449 static boolean
 450 i915_fence_finish(struct pipe_screen *screen,
 451                   struct pipe_fence_handle *fence,
 452                   uint64_t timeout)
 453 {
 454    struct i915_screen *is = i915_screen(screen);
 455
 456    return is->iws->fence_finish(is->iws, fence) == 1;
 457 }
 458
 459
 460 /*
 461  * Generic functions
 462  */
 463
 464
 465 static void
 466 i915_flush_frontbuffer(struct pipe_screen *screen,
 467                        struct pipe_resource *resource,
 468                        unsigned level, unsigned layer,
 469                        void *winsys_drawable_handle,
 470                        struct pipe_box *sub_box)
 471 {
 472    /* XXX: Dummy right now. */
 473    (void)screen;
 474    (void)resource;
 475    (void)level;
 476    (void)layer;
 477    (void)winsys_drawable_handle;
 478    (void)sub_box;
 479 }
 480
 481 static void
 482 i915_destroy_screen(struct pipe_screen *screen)
 483 {
 484    struct i915_screen *is = i915_screen(screen);
 485
 486    if (is->iws)
 487       is->iws->destroy(is->iws);
 488
 489    FREE(is);
 490 }
 491
 492 /**
 493  * Create a new i915_screen object
 494  */
 495 struct pipe_screen *
 496 i915_screen_create(struct i915_winsys *iws)
 497 {
 498    struct i915_screen *is = CALLOC_STRUCT(i915_screen);
 499
 500    if (!is)
 501       return NULL;
 502
 503    switch (iws->pci_id) {
 504    case PCI_CHIP_I915_G:
 505    case PCI_CHIP_I915_GM:
 506       is->is_i945 = FALSE;
 507       break;
 508
 509    case PCI_CHIP_I945_G:
 510    case PCI_CHIP_I945_GM:
 511    case PCI_CHIP_I945_GME:
 512    case PCI_CHIP_G33_G:
 513    case PCI_CHIP_Q33_G:
 514    case PCI_CHIP_Q35_G:
 515    case PCI_CHIP_PINEVIEW_G:
 516    case PCI_CHIP_PINEVIEW_M:
 517       is->is_i945 = TRUE;
 518       break;
 519
 520    default:
 521       debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
 522                    __FUNCTION__, iws->pci_id);
 523       FREE(is);
 524       return NULL;
 525    }
 526
 527    is->iws = iws;
 528
 529    is->base.destroy = i915_destroy_screen;
 530    is->base.flush_frontbuffer = i915_flush_frontbuffer;
 531
 532    is->base.get_name = i915_get_name;
 533    is->base.get_vendor = i915_get_vendor;
 534    is->base.get_param = i915_get_param;
 535    is->base.get_shader_param = i915_get_shader_param;
 536    is->base.get_paramf = i915_get_paramf;
 537    is->base.is_format_supported = i915_is_format_supported;
 538
 539    is->base.context_create = i915_create_context;
 540
 541    is->base.fence_reference = i915_fence_reference;
 542    is->base.fence_signalled = i915_fence_signalled;
 543    is->base.fence_finish = i915_fence_finish;
 544
 545    i915_init_screen_resource_functions(is);
 546
 547    i915_debug_init(is);
 548
 549    util_format_s3tc_init();
 550
 551    return &is->base;
 552 }