i915g: add pineview pci ids
[mesa.git] / src / gallium / drivers / i915 / i915_screen.c
1 /**************************************************************************
2 *
3 * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "draw/draw_context.h"
30 #include "util/u_inlines.h"
31 #include "util/u_memory.h"
32 #include "util/u_string.h"
33
34 #include "i915_reg.h"
35 #include "i915_debug.h"
36 #include "i915_context.h"
37 #include "i915_screen.h"
38 #include "i915_surface.h"
39 #include "i915_resource.h"
40 #include "i915_winsys.h"
41 #include "i915_public.h"
42
43
44 /*
45 * Probe functions
46 */
47
48
49 static const char *
50 i915_get_vendor(struct pipe_screen *screen)
51 {
52 return "VMware, Inc.";
53 }
54
55 static const char *
56 i915_get_name(struct pipe_screen *screen)
57 {
58 static char buffer[128];
59 const char *chipset;
60
61 switch (i915_screen(screen)->iws->pci_id) {
62 case PCI_CHIP_I915_G:
63 chipset = "915G";
64 break;
65 case PCI_CHIP_I915_GM:
66 chipset = "915GM";
67 break;
68 case PCI_CHIP_I945_G:
69 chipset = "945G";
70 break;
71 case PCI_CHIP_I945_GM:
72 chipset = "945GM";
73 break;
74 case PCI_CHIP_I945_GME:
75 chipset = "945GME";
76 break;
77 case PCI_CHIP_G33_G:
78 chipset = "G33";
79 break;
80 case PCI_CHIP_Q35_G:
81 chipset = "Q35";
82 break;
83 case PCI_CHIP_Q33_G:
84 chipset = "Q33";
85 break;
86 case PCI_CHIP_PINEVIEW_G:
87 chipset = "Pineview G";
88 break;
89 case PCI_CHIP_PINEVIEW_M:
90 chipset = "Pineview M";
91 break;
92 default:
93 chipset = "unknown";
94 break;
95 }
96
97 util_snprintf(buffer, sizeof(buffer), "i915 (chipset: %s)", chipset);
98 return buffer;
99 }
100
101 static int
102 i915_get_param(struct pipe_screen *screen, enum pipe_cap param)
103 {
104 switch (param) {
105 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
106 return 8;
107 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
108 return 0;
109 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
110 return 8;
111 case PIPE_CAP_NPOT_TEXTURES:
112 return 1;
113 case PIPE_CAP_TWO_SIDED_STENCIL:
114 return 1;
115 case PIPE_CAP_GLSL:
116 return 0;
117 case PIPE_CAP_ANISOTROPIC_FILTER:
118 return 0;
119 case PIPE_CAP_POINT_SPRITE:
120 return 0;
121 case PIPE_CAP_MAX_RENDER_TARGETS:
122 return 1;
123 case PIPE_CAP_OCCLUSION_QUERY:
124 return 0;
125 case PIPE_CAP_TIMER_QUERY:
126 return 0;
127 case PIPE_CAP_TEXTURE_SHADOW_MAP:
128 return 1;
129 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
130 return I915_MAX_TEXTURE_2D_LEVELS;
131 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
132 return I915_MAX_TEXTURE_3D_LEVELS;
133 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
134 return I915_MAX_TEXTURE_2D_LEVELS;
135 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
136 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
137 return 1;
138 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
139 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
140 return 0;
141 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
142 /* disable for now */
143 return 0;
144 default:
145 return 0;
146 }
147 }
148
149 static int
150 i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap param)
151 {
152 switch(shader) {
153 case PIPE_SHADER_VERTEX:
154 return draw_get_shader_param(shader, param);
155 case PIPE_SHADER_FRAGMENT:
156 break;
157 default:
158 return 0;
159 }
160
161 /* XXX: these are just shader model 2.0 values, fix this! */
162 switch(param) {
163 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
164 return 96;
165 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
166 return 64;
167 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
168 return 32;
169 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
170 return 8;
171 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
172 return 0;
173 case PIPE_SHADER_CAP_MAX_INPUTS:
174 return 10;
175 case PIPE_SHADER_CAP_MAX_CONSTS:
176 return 32;
177 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
178 return 1;
179 case PIPE_SHADER_CAP_MAX_TEMPS:
180 return 12; /* XXX: 12 -> 32 ? */
181 case PIPE_SHADER_CAP_MAX_ADDRS:
182 return 0;
183 case PIPE_SHADER_CAP_MAX_PREDS:
184 return 0;
185 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
186 return 0;
187 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
188 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
189 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
190 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
191 return 1;
192 default:
193 assert(0);
194 return 0;
195 }
196 }
197
198 static float
199 i915_get_paramf(struct pipe_screen *screen, enum pipe_cap param)
200 {
201 switch (param) {
202 case PIPE_CAP_MAX_LINE_WIDTH:
203 /* fall-through */
204 case PIPE_CAP_MAX_LINE_WIDTH_AA:
205 return 7.5;
206
207 case PIPE_CAP_MAX_POINT_WIDTH:
208 /* fall-through */
209 case PIPE_CAP_MAX_POINT_WIDTH_AA:
210 return 255.0;
211
212 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
213 return 4.0;
214
215 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
216 return 16.0;
217
218 default:
219 return 0;
220 }
221 }
222
223 static boolean
224 i915_is_format_supported(struct pipe_screen *screen,
225 enum pipe_format format,
226 enum pipe_texture_target target,
227 unsigned sample_count,
228 unsigned tex_usage,
229 unsigned geom_flags)
230 {
231 static const enum pipe_format tex_supported[] = {
232 PIPE_FORMAT_B8G8R8A8_UNORM,
233 PIPE_FORMAT_B8G8R8X8_UNORM,
234 PIPE_FORMAT_R8G8B8A8_UNORM,
235 #if 0
236 PIPE_FORMAT_R8G8B8X8_UNORM,
237 #endif
238 PIPE_FORMAT_B5G6R5_UNORM,
239 PIPE_FORMAT_L8_UNORM,
240 PIPE_FORMAT_A8_UNORM,
241 PIPE_FORMAT_I8_UNORM,
242 PIPE_FORMAT_L8A8_UNORM,
243 PIPE_FORMAT_UYVY,
244 PIPE_FORMAT_YUYV,
245 /* XXX why not?
246 PIPE_FORMAT_Z16_UNORM, */
247 PIPE_FORMAT_Z24X8_UNORM,
248 PIPE_FORMAT_Z24_UNORM_S8_USCALED,
249 PIPE_FORMAT_NONE /* list terminator */
250 };
251 static const enum pipe_format render_supported[] = {
252 PIPE_FORMAT_B8G8R8A8_UNORM,
253 PIPE_FORMAT_B5G6R5_UNORM,
254 PIPE_FORMAT_NONE /* list terminator */
255 };
256 static const enum pipe_format depth_supported[] = {
257 /* XXX why not?
258 PIPE_FORMAT_Z16_UNORM, */
259 PIPE_FORMAT_Z24X8_UNORM,
260 PIPE_FORMAT_Z24_UNORM_S8_USCALED,
261 PIPE_FORMAT_NONE /* list terminator */
262 };
263 const enum pipe_format *list;
264 uint i;
265
266 if (sample_count > 1)
267 return FALSE;
268
269 if(tex_usage & PIPE_BIND_DEPTH_STENCIL)
270 list = depth_supported;
271 else if (tex_usage & PIPE_BIND_RENDER_TARGET)
272 list = render_supported;
273 else
274 list = tex_supported;
275
276 for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
277 if (list[i] == format)
278 return TRUE;
279 }
280
281 return FALSE;
282 }
283
284
285 /*
286 * Fence functions
287 */
288
289
290 static void
291 i915_fence_reference(struct pipe_screen *screen,
292 struct pipe_fence_handle **ptr,
293 struct pipe_fence_handle *fence)
294 {
295 struct i915_screen *is = i915_screen(screen);
296
297 is->iws->fence_reference(is->iws, ptr, fence);
298 }
299
300 static int
301 i915_fence_signalled(struct pipe_screen *screen,
302 struct pipe_fence_handle *fence,
303 unsigned flags)
304 {
305 struct i915_screen *is = i915_screen(screen);
306
307 return is->iws->fence_signalled(is->iws, fence);
308 }
309
310 static int
311 i915_fence_finish(struct pipe_screen *screen,
312 struct pipe_fence_handle *fence,
313 unsigned flags)
314 {
315 struct i915_screen *is = i915_screen(screen);
316
317 return is->iws->fence_finish(is->iws, fence);
318 }
319
320
321 /*
322 * Generic functions
323 */
324
325
326 static void
327 i915_destroy_screen(struct pipe_screen *screen)
328 {
329 struct i915_screen *is = i915_screen(screen);
330
331 if (is->iws)
332 is->iws->destroy(is->iws);
333
334 FREE(is);
335 }
336
337 /**
338 * Create a new i915_screen object
339 */
340 struct pipe_screen *
341 i915_screen_create(struct i915_winsys *iws)
342 {
343 struct i915_screen *is = CALLOC_STRUCT(i915_screen);
344
345 if (!is)
346 return NULL;
347
348 switch (iws->pci_id) {
349 case PCI_CHIP_I915_G:
350 case PCI_CHIP_I915_GM:
351 is->is_i945 = FALSE;
352 break;
353
354 case PCI_CHIP_I945_G:
355 case PCI_CHIP_I945_GM:
356 case PCI_CHIP_I945_GME:
357 case PCI_CHIP_G33_G:
358 case PCI_CHIP_Q33_G:
359 case PCI_CHIP_Q35_G:
360 case PCI_CHIP_PINEVIEW_G:
361 case PCI_CHIP_PINEVIEW_M:
362 is->is_i945 = TRUE;
363 break;
364
365 default:
366 debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
367 __FUNCTION__, iws->pci_id);
368 FREE(is);
369 return NULL;
370 }
371
372 is->iws = iws;
373
374 is->base.winsys = NULL;
375
376 is->base.destroy = i915_destroy_screen;
377
378 is->base.get_name = i915_get_name;
379 is->base.get_vendor = i915_get_vendor;
380 is->base.get_param = i915_get_param;
381 is->base.get_shader_param = i915_get_shader_param;
382 is->base.get_paramf = i915_get_paramf;
383 is->base.is_format_supported = i915_is_format_supported;
384
385 is->base.context_create = i915_create_context;
386
387 is->base.fence_reference = i915_fence_reference;
388 is->base.fence_signalled = i915_fence_signalled;
389 is->base.fence_finish = i915_fence_finish;
390
391 i915_init_screen_resource_functions(is);
392 i915_init_screen_surface_functions(is);
393
394 i915_debug_init(is);
395
396 return &is->base;
397 }