gallium: add basic support for ARB_sample_shading
[mesa.git] / src / gallium / drivers / i915 / i915_screen.c
1 /**************************************************************************
2 *
3 * Copyright 2008 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "draw/draw_context.h"
30 #include "util/u_format.h"
31 #include "util/u_format_s3tc.h"
32 #include "util/u_inlines.h"
33 #include "util/u_memory.h"
34 #include "util/u_string.h"
35
36 #include "i915_reg.h"
37 #include "i915_debug.h"
38 #include "i915_context.h"
39 #include "i915_screen.h"
40 #include "i915_resource.h"
41 #include "i915_winsys.h"
42 #include "i915_public.h"
43
44
45 /*
46 * Probe functions
47 */
48
49
50 static const char *
51 i915_get_vendor(struct pipe_screen *screen)
52 {
53 return "Mesa Project";
54 }
55
56 static const char *
57 i915_get_name(struct pipe_screen *screen)
58 {
59 static char buffer[128];
60 const char *chipset;
61
62 switch (i915_screen(screen)->iws->pci_id) {
63 case PCI_CHIP_I915_G:
64 chipset = "915G";
65 break;
66 case PCI_CHIP_I915_GM:
67 chipset = "915GM";
68 break;
69 case PCI_CHIP_I945_G:
70 chipset = "945G";
71 break;
72 case PCI_CHIP_I945_GM:
73 chipset = "945GM";
74 break;
75 case PCI_CHIP_I945_GME:
76 chipset = "945GME";
77 break;
78 case PCI_CHIP_G33_G:
79 chipset = "G33";
80 break;
81 case PCI_CHIP_Q35_G:
82 chipset = "Q35";
83 break;
84 case PCI_CHIP_Q33_G:
85 chipset = "Q33";
86 break;
87 case PCI_CHIP_PINEVIEW_G:
88 chipset = "Pineview G";
89 break;
90 case PCI_CHIP_PINEVIEW_M:
91 chipset = "Pineview M";
92 break;
93 default:
94 chipset = "unknown";
95 break;
96 }
97
98 util_snprintf(buffer, sizeof(buffer), "i915 (chipset: %s)", chipset);
99 return buffer;
100 }
101
102 static int
103 i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap cap)
104 {
105 switch(shader) {
106 case PIPE_SHADER_VERTEX:
107 switch (cap) {
108 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
109 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
110 if (debug_get_bool_option("DRAW_USE_LLVM", TRUE))
111 return PIPE_MAX_SAMPLERS;
112 else
113 return 0;
114 default:
115 return draw_get_shader_param(shader, cap);
116 }
117 case PIPE_SHADER_FRAGMENT:
118 /* XXX: some of these are just shader model 2.0 values, fix this! */
119 switch(cap) {
120 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
121 return I915_MAX_ALU_INSN + I915_MAX_TEX_INSN;
122 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
123 return I915_MAX_ALU_INSN;
124 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
125 return I915_MAX_TEX_INSN;
126 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
127 return 8;
128 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
129 return 0;
130 case PIPE_SHADER_CAP_MAX_INPUTS:
131 return 10;
132 case PIPE_SHADER_CAP_MAX_CONSTS:
133 return 32;
134 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
135 return 1;
136 case PIPE_SHADER_CAP_MAX_TEMPS:
137 return 12; /* XXX: 12 -> 32 ? */
138 case PIPE_SHADER_CAP_MAX_ADDRS:
139 return 0;
140 case PIPE_SHADER_CAP_MAX_PREDS:
141 return 0;
142 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
143 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
144 return 0;
145 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
146 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
147 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
148 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
149 return 1;
150 case PIPE_SHADER_CAP_SUBROUTINES:
151 return 0;
152 case PIPE_SHADER_CAP_INTEGERS:
153 return 0;
154 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
155 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
156 return I915_TEX_UNITS;
157 default:
158 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
159 return 0;
160 }
161 break;
162 default:
163 return 0;
164 }
165
166 }
167
168 static int
169 i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
170 {
171 struct i915_screen *is = i915_screen(screen);
172
173 switch (cap) {
174 /* Supported features (boolean caps). */
175 case PIPE_CAP_ANISOTROPIC_FILTER:
176 case PIPE_CAP_NPOT_TEXTURES:
177 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
178 case PIPE_CAP_POINT_SPRITE:
179 case PIPE_CAP_PRIMITIVE_RESTART: /* draw module */
180 case PIPE_CAP_TEXTURE_SHADOW_MAP:
181 case PIPE_CAP_TWO_SIDED_STENCIL:
182 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
183 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
184 case PIPE_CAP_TGSI_INSTANCEID:
185 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
186 case PIPE_CAP_USER_VERTEX_BUFFERS:
187 case PIPE_CAP_USER_INDEX_BUFFERS:
188 case PIPE_CAP_USER_CONSTANT_BUFFERS:
189 return 1;
190
191 /* Unsupported features (boolean caps). */
192 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
193 case PIPE_CAP_DEPTH_CLIP_DISABLE:
194 case PIPE_CAP_INDEP_BLEND_ENABLE:
195 case PIPE_CAP_INDEP_BLEND_FUNC:
196 case PIPE_CAP_SHADER_STENCIL_EXPORT:
197 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
198 case PIPE_CAP_TEXTURE_SWIZZLE:
199 case PIPE_CAP_QUERY_TIME_ELAPSED:
200 case PIPE_CAP_SM3:
201 case PIPE_CAP_SEAMLESS_CUBE_MAP:
202 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
203 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
204 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
205 case PIPE_CAP_CONDITIONAL_RENDER:
206 case PIPE_CAP_TEXTURE_BARRIER:
207 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
208 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
209 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
210 case PIPE_CAP_START_INSTANCE:
211 case PIPE_CAP_QUERY_TIMESTAMP:
212 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
213 case PIPE_CAP_TEXTURE_MULTISAMPLE:
214 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
215 case PIPE_CAP_CUBE_MAP_ARRAY:
216 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
217 case PIPE_CAP_TGSI_TEXCOORD:
218 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
219 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
220 case PIPE_CAP_TEXTURE_GATHER_SM5:
221 case PIPE_CAP_FAKE_SW_MSAA:
222 case PIPE_CAP_TEXTURE_QUERY_LOD:
223 case PIPE_CAP_SAMPLE_SHADING:
224 return 0;
225
226 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
227 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
228 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
229 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
230 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
231 case PIPE_CAP_TGSI_VS_LAYER:
232 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
233 return 0;
234
235 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
236 return 64;
237
238 case PIPE_CAP_GLSL_FEATURE_LEVEL:
239 return 120;
240
241 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
242 return 16;
243
244 /* Features we can lie about (boolean caps). */
245 case PIPE_CAP_OCCLUSION_QUERY:
246 return is->debug.lie ? 1 : 0;
247
248 /* Texturing. */
249 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
250 return I915_MAX_TEXTURE_2D_LEVELS;
251 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
252 return I915_MAX_TEXTURE_3D_LEVELS;
253 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
254 return I915_MAX_TEXTURE_2D_LEVELS;
255 case PIPE_CAP_MIN_TEXEL_OFFSET:
256 case PIPE_CAP_MAX_TEXEL_OFFSET:
257 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
258 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
259 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
260 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
261 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
262 return 0;
263
264 /* Render targets. */
265 case PIPE_CAP_MAX_RENDER_TARGETS:
266 return 1;
267
268 /* Geometry shader output, unsupported. */
269 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
270 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
271 return 0;
272
273 /* Fragment coordinate conventions. */
274 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
275 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
276 return 1;
277 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
278 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
279 return 0;
280 case PIPE_CAP_ENDIANNESS:
281 return PIPE_ENDIAN_LITTLE;
282
283 default:
284 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
285 return 0;
286 }
287 }
288
289 static float
290 i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
291 {
292 switch(cap) {
293 case PIPE_CAPF_MAX_LINE_WIDTH:
294 /* fall-through */
295 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
296 return 7.5;
297
298 case PIPE_CAPF_MAX_POINT_WIDTH:
299 /* fall-through */
300 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
301 return 255.0;
302
303 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
304 return 4.0;
305
306 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
307 return 16.0;
308
309 default:
310 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
311 return 0;
312 }
313 }
314
315 boolean
316 i915_is_format_supported(struct pipe_screen *screen,
317 enum pipe_format format,
318 enum pipe_texture_target target,
319 unsigned sample_count,
320 unsigned tex_usage)
321 {
322 static const enum pipe_format tex_supported[] = {
323 PIPE_FORMAT_B8G8R8A8_UNORM,
324 PIPE_FORMAT_B8G8R8A8_SRGB,
325 PIPE_FORMAT_B8G8R8X8_UNORM,
326 PIPE_FORMAT_R8G8B8A8_UNORM,
327 PIPE_FORMAT_R8G8B8X8_UNORM,
328 PIPE_FORMAT_B5G6R5_UNORM,
329 PIPE_FORMAT_B10G10R10A2_UNORM,
330 PIPE_FORMAT_L8_UNORM,
331 PIPE_FORMAT_A8_UNORM,
332 PIPE_FORMAT_I8_UNORM,
333 PIPE_FORMAT_L8A8_UNORM,
334 PIPE_FORMAT_UYVY,
335 PIPE_FORMAT_YUYV,
336 /* XXX why not?
337 PIPE_FORMAT_Z16_UNORM, */
338 PIPE_FORMAT_DXT1_RGB,
339 PIPE_FORMAT_DXT1_RGBA,
340 PIPE_FORMAT_DXT3_RGBA,
341 PIPE_FORMAT_DXT5_RGBA,
342 PIPE_FORMAT_Z24X8_UNORM,
343 PIPE_FORMAT_Z24_UNORM_S8_UINT,
344 PIPE_FORMAT_NONE /* list terminator */
345 };
346 static const enum pipe_format render_supported[] = {
347 PIPE_FORMAT_B8G8R8A8_UNORM,
348 PIPE_FORMAT_B8G8R8X8_UNORM,
349 PIPE_FORMAT_R8G8B8A8_UNORM,
350 PIPE_FORMAT_R8G8B8X8_UNORM,
351 PIPE_FORMAT_B5G6R5_UNORM,
352 PIPE_FORMAT_B10G10R10A2_UNORM,
353 PIPE_FORMAT_L8_UNORM,
354 PIPE_FORMAT_A8_UNORM,
355 PIPE_FORMAT_I8_UNORM,
356 PIPE_FORMAT_NONE /* list terminator */
357 };
358 static const enum pipe_format depth_supported[] = {
359 /* XXX why not?
360 PIPE_FORMAT_Z16_UNORM, */
361 PIPE_FORMAT_Z24X8_UNORM,
362 PIPE_FORMAT_Z24_UNORM_S8_UINT,
363 PIPE_FORMAT_NONE /* list terminator */
364 };
365 const enum pipe_format *list;
366 uint i;
367
368 if (!util_format_is_supported(format, tex_usage))
369 return FALSE;
370
371 if (sample_count > 1)
372 return FALSE;
373
374 if(tex_usage & PIPE_BIND_DEPTH_STENCIL)
375 list = depth_supported;
376 else if (tex_usage & PIPE_BIND_RENDER_TARGET)
377 list = render_supported;
378 else if (tex_usage & PIPE_BIND_SAMPLER_VIEW)
379 list = tex_supported;
380 else
381 return TRUE; /* PIPE_BIND_{VERTEX,INDEX}_BUFFER */
382
383 for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
384 if (list[i] == format)
385 return TRUE;
386 }
387
388 return FALSE;
389 }
390
391
392 /*
393 * Fence functions
394 */
395
396
397 static void
398 i915_fence_reference(struct pipe_screen *screen,
399 struct pipe_fence_handle **ptr,
400 struct pipe_fence_handle *fence)
401 {
402 struct i915_screen *is = i915_screen(screen);
403
404 is->iws->fence_reference(is->iws, ptr, fence);
405 }
406
407 static boolean
408 i915_fence_signalled(struct pipe_screen *screen,
409 struct pipe_fence_handle *fence)
410 {
411 struct i915_screen *is = i915_screen(screen);
412
413 return is->iws->fence_signalled(is->iws, fence) == 1;
414 }
415
416 static boolean
417 i915_fence_finish(struct pipe_screen *screen,
418 struct pipe_fence_handle *fence,
419 uint64_t timeout)
420 {
421 struct i915_screen *is = i915_screen(screen);
422
423 return is->iws->fence_finish(is->iws, fence) == 1;
424 }
425
426
427 /*
428 * Generic functions
429 */
430
431
432 static void
433 i915_flush_frontbuffer(struct pipe_screen *screen,
434 struct pipe_resource *resource,
435 unsigned level, unsigned layer,
436 void *winsys_drawable_handle,
437 struct pipe_box *sub_box)
438 {
439 /* XXX: Dummy right now. */
440 (void)screen;
441 (void)resource;
442 (void)level;
443 (void)layer;
444 (void)winsys_drawable_handle;
445 (void)sub_box;
446 }
447
448 static void
449 i915_destroy_screen(struct pipe_screen *screen)
450 {
451 struct i915_screen *is = i915_screen(screen);
452
453 if (is->iws)
454 is->iws->destroy(is->iws);
455
456 FREE(is);
457 }
458
459 /**
460 * Create a new i915_screen object
461 */
462 struct pipe_screen *
463 i915_screen_create(struct i915_winsys *iws)
464 {
465 struct i915_screen *is = CALLOC_STRUCT(i915_screen);
466
467 if (!is)
468 return NULL;
469
470 switch (iws->pci_id) {
471 case PCI_CHIP_I915_G:
472 case PCI_CHIP_I915_GM:
473 is->is_i945 = FALSE;
474 break;
475
476 case PCI_CHIP_I945_G:
477 case PCI_CHIP_I945_GM:
478 case PCI_CHIP_I945_GME:
479 case PCI_CHIP_G33_G:
480 case PCI_CHIP_Q33_G:
481 case PCI_CHIP_Q35_G:
482 case PCI_CHIP_PINEVIEW_G:
483 case PCI_CHIP_PINEVIEW_M:
484 is->is_i945 = TRUE;
485 break;
486
487 default:
488 debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
489 __FUNCTION__, iws->pci_id);
490 FREE(is);
491 return NULL;
492 }
493
494 is->iws = iws;
495
496 is->base.destroy = i915_destroy_screen;
497 is->base.flush_frontbuffer = i915_flush_frontbuffer;
498
499 is->base.get_name = i915_get_name;
500 is->base.get_vendor = i915_get_vendor;
501 is->base.get_param = i915_get_param;
502 is->base.get_shader_param = i915_get_shader_param;
503 is->base.get_paramf = i915_get_paramf;
504 is->base.is_format_supported = i915_is_format_supported;
505
506 is->base.context_create = i915_create_context;
507
508 is->base.fence_reference = i915_fence_reference;
509 is->base.fence_signalled = i915_fence_signalled;
510 is->base.fence_finish = i915_fence_finish;
511
512 i915_init_screen_resource_functions(is);
513
514 i915_debug_init(is);
515
516 util_format_s3tc_init();
517
518 return &is->base;
519 }