r600/sfn: use the per shader atomic base
[mesa.git] / src / gallium / drivers / r600 / sfn / sfn_shader_geometry.cpp
1 /* -*- mesa-c++ -*-
2 *
3 * Copyright (c) 2018 Collabora LTD
4 *
5 * Author: Gert Wollny <gert.wollny@collabora.com>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * on the rights to use, copy, modify, merge, publish, distribute, sub
11 * license, and/or sell copies of the Software, and to permit persons to whom
12 * the Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26
27 #include "sfn_shader_geometry.h"
28 #include "sfn_instruction_misc.h"
29 #include "sfn_instruction_fetch.h"
30 #include "sfn_shaderio.h"
31
32 namespace r600 {
33
34 GeometryShaderFromNir::GeometryShaderFromNir(r600_pipe_shader *sh,
35 r600_pipe_shader_selector &sel,
36 const r600_shader_key &key,
37 enum chip_class chip_class):
38 VertexStage(PIPE_SHADER_GEOMETRY, sel, sh->shader,
39 sh->scratch_space_needed, chip_class, key.gs.first_atomic_counter),
40 m_pipe_shader(sh),
41 m_so_info(&sel.so),
42 m_first_vertex_emitted(false),
43 m_offset(0),
44 m_next_input_ring_offset(0),
45 m_key(key),
46 m_num_clip_dist(0),
47 m_cur_ring_output(0),
48 m_gs_tri_strip_adj_fix(false)
49 {
50 sh_info().atomic_base = key.gs.first_atomic_counter;
51 }
52
53 bool GeometryShaderFromNir::do_emit_load_deref(UNUSED const nir_variable *in_var, UNUSED nir_intrinsic_instr* instr)
54 {
55 return false;
56 }
57
58 bool GeometryShaderFromNir::do_emit_store_deref(const nir_variable *out_var, nir_intrinsic_instr* instr)
59 {
60 uint32_t write_mask = nir_intrinsic_write_mask(instr);
61 GPRVector::Swizzle swz = swizzle_from_mask(write_mask);
62 auto out_value = vec_from_nir_with_fetch_constant(instr->src[1], write_mask, swz, true);
63
64 sh_info().output[out_var->data.driver_location].write_mask = write_mask;
65
66 auto ir = new MemRingOutIntruction(cf_mem_ring, mem_write_ind, out_value,
67 4 * out_var->data.driver_location,
68 instr->num_components, m_export_base);
69 emit_instruction(ir);
70
71 return true;
72 }
73
74 bool GeometryShaderFromNir::scan_sysvalue_access(UNUSED nir_instr *instr)
75 {
76 return true;
77 }
78
79 bool GeometryShaderFromNir::do_process_inputs(nir_variable *input)
80 {
81
82 if (input->data.location == VARYING_SLOT_POS ||
83 input->data.location == VARYING_SLOT_PSIZ ||
84 input->data.location == VARYING_SLOT_FOGC ||
85 input->data.location == VARYING_SLOT_CLIP_VERTEX ||
86 input->data.location == VARYING_SLOT_CLIP_DIST0 ||
87 input->data.location == VARYING_SLOT_CLIP_DIST1 ||
88 input->data.location == VARYING_SLOT_COL0 ||
89 input->data.location == VARYING_SLOT_COL1 ||
90 input->data.location == VARYING_SLOT_BFC0 ||
91 input->data.location == VARYING_SLOT_BFC1 ||
92 input->data.location == VARYING_SLOT_PNTC ||
93 (input->data.location >= VARYING_SLOT_VAR0 &&
94 input->data.location <= VARYING_SLOT_VAR31) ||
95 (input->data.location >= VARYING_SLOT_TEX0 &&
96 input->data.location <= VARYING_SLOT_TEX7)) {
97
98 r600_shader_io& io = sh_info().input[input->data.driver_location];
99 auto semantic = r600_get_varying_semantic(input->data.location);
100 io.name = semantic.first;
101 io.sid = semantic.second;
102
103 io.ring_offset = 16 * input->data.driver_location;
104 ++sh_info().ninput;
105 m_next_input_ring_offset += 16;
106 return true;
107 }
108
109 return false;
110 }
111
112 bool GeometryShaderFromNir::do_process_outputs(nir_variable *output)
113 {
114 if (output->data.location == VARYING_SLOT_COL0 ||
115 output->data.location == VARYING_SLOT_COL1 ||
116 (output->data.location >= VARYING_SLOT_VAR0 &&
117 output->data.location <= VARYING_SLOT_VAR31) ||
118 (output->data.location >= VARYING_SLOT_TEX0 &&
119 output->data.location <= VARYING_SLOT_TEX7) ||
120 output->data.location == VARYING_SLOT_BFC0 ||
121 output->data.location == VARYING_SLOT_BFC1 ||
122 output->data.location == VARYING_SLOT_PNTC ||
123 output->data.location == VARYING_SLOT_CLIP_VERTEX ||
124 output->data.location == VARYING_SLOT_CLIP_DIST0 ||
125 output->data.location == VARYING_SLOT_CLIP_DIST1 ||
126 output->data.location == VARYING_SLOT_PRIMITIVE_ID ||
127 output->data.location == VARYING_SLOT_POS ||
128 output->data.location == VARYING_SLOT_PSIZ ||
129 output->data.location == VARYING_SLOT_LAYER ||
130 output->data.location == VARYING_SLOT_VIEWPORT ||
131 output->data.location == VARYING_SLOT_FOGC) {
132 r600_shader_io& io = sh_info().output[output->data.driver_location];
133
134 auto semantic = r600_get_varying_semantic(output->data.location);
135 io.name = semantic.first;
136 io.sid = semantic.second;
137
138 evaluate_spi_sid(io);
139 ++sh_info().noutput;
140
141 if (output->data.location == VARYING_SLOT_CLIP_DIST0 ||
142 output->data.location == VARYING_SLOT_CLIP_DIST1) {
143 m_num_clip_dist += 4;
144 }
145
146 if (output->data.location == VARYING_SLOT_VIEWPORT) {
147 sh_info().vs_out_viewport = 1;
148 sh_info().vs_out_misc_write = 1;
149 }
150 return true;
151 }
152 return false;
153 }
154
155
156 bool GeometryShaderFromNir::do_allocate_reserved_registers()
157 {
158 const int sel[6] = {0, 0 ,0, 1, 1, 1};
159 const int chan[6] = {0, 1 ,3, 0, 1, 2};
160
161 increment_reserved_registers();
162 increment_reserved_registers();
163
164 /* Reserve registers used by the shaders (should check how many
165 * components are actually used */
166 for (int i = 0; i < 6; ++i) {
167 auto reg = new GPRValue(sel[i], chan[i]);
168 reg->set_as_input();
169 m_per_vertex_offsets[i].reset(reg);
170 inject_register(sel[i], chan[i], m_per_vertex_offsets[i], false);
171 }
172 auto reg = new GPRValue(0, 2);
173 reg->set_as_input();
174 m_primitive_id.reset(reg);
175 inject_register(0, 2, m_primitive_id, false);
176
177 reg = new GPRValue(1, 3);
178 reg->set_as_input();
179 m_invocation_id.reset(reg);
180 inject_register(1, 3, m_invocation_id, false);
181
182 m_export_base = get_temp_register();
183 emit_instruction(new AluInstruction(op1_mov, m_export_base, Value::zero, {alu_write, alu_last_instr}));
184
185 sh_info().ring_item_sizes[0] = m_next_input_ring_offset;
186
187 if (m_key.gs.tri_strip_adj_fix)
188 emit_adj_fix();
189
190 return true;
191 }
192
193 void GeometryShaderFromNir::emit_adj_fix()
194 {
195 PValue adjhelp0(new GPRValue(m_export_base->sel(), 1));
196 emit_instruction(op2_and_int, adjhelp0, {m_primitive_id, Value::one_i}, {alu_write, alu_last_instr});
197
198 int help2 = allocate_temp_register();
199 int reg_indices[6];
200 int reg_chanels[6] = {0, 1, 2, 3, 2, 3};
201
202 int rotate_indices[6] = {4, 5, 0, 1, 2, 3};
203
204 reg_indices[0] = reg_indices[1] = reg_indices[2] = reg_indices[3] = help2;
205 reg_indices[4] = reg_indices[5] = m_export_base->sel();
206
207 std::array<PValue, 6> adjhelp;
208
209 AluInstruction *ir = nullptr;
210 for (int i = 0; i < 6; i++) {
211 adjhelp[i].reset(new GPRValue(reg_indices[i], reg_chanels[i]));
212 ir = new AluInstruction(op3_cnde_int, adjhelp[i],
213 {adjhelp0, m_per_vertex_offsets[i],
214 m_per_vertex_offsets[rotate_indices[i]]},
215 {alu_write});
216 if (i == 3)
217 ir->set_flag(alu_last_instr);
218 emit_instruction(ir);
219 }
220 ir->set_flag(alu_last_instr);
221
222 for (int i = 0; i < 6; i++)
223 m_per_vertex_offsets[i] = adjhelp[i];
224 }
225
226 bool GeometryShaderFromNir::emit_deref_instruction_override(nir_deref_instr* instr)
227 {
228 if (instr->deref_type == nir_deref_type_array) {
229 auto var = get_deref_location(instr->parent);
230 ArrayDeref ad = {var, &instr->arr.index};
231 assert(instr->dest.is_ssa);
232 m_in_array_deref[instr->dest.ssa.index] = ad;
233
234 /* Problem: nir_intrinsice_load_deref tries to lookup the
235 * variable, and will not find it, need to override that too */
236 return true;
237 }
238 return false;
239 }
240
241 bool GeometryShaderFromNir::emit_intrinsic_instruction_override(nir_intrinsic_instr* instr)
242 {
243 switch (instr->intrinsic) {
244 case nir_intrinsic_load_deref: {
245 auto& src = instr->src[0];
246 assert(src.is_ssa);
247 auto array = m_in_array_deref.find(src.ssa->index);
248 if (array != m_in_array_deref.end())
249 return emit_load_from_array(instr, array->second);
250 } break;
251 case nir_intrinsic_emit_vertex:
252 return emit_vertex(instr, false);
253 case nir_intrinsic_end_primitive:
254 return emit_vertex(instr, true);
255 case nir_intrinsic_load_primitive_id:
256 return load_preloaded_value(instr->dest, 0, m_primitive_id);
257 case nir_intrinsic_load_invocation_id:
258 return load_preloaded_value(instr->dest, 0, m_invocation_id);
259 default:
260 ;
261 }
262 return false;
263 }
264
265 bool GeometryShaderFromNir::emit_vertex(nir_intrinsic_instr* instr, bool cut)
266 {
267 int stream = nir_intrinsic_stream_id(instr);
268 assert(stream < 4);
269
270 emit_instruction(new EmitVertex(stream, cut));
271
272 if (!cut)
273 emit_instruction(new AluInstruction(op2_add_int, m_export_base, m_export_base,
274 PValue(new LiteralValue(sh_info().noutput)),
275 {alu_write, alu_last_instr}));
276
277 return true;
278 }
279
280 bool GeometryShaderFromNir::emit_load_from_array(nir_intrinsic_instr* instr,
281 const ArrayDeref& array_deref)
282 {
283 auto dest = vec_from_nir(instr->dest, instr->num_components);
284
285 const nir_load_const_instr* literal_index = nullptr;
286
287 if (array_deref.index->is_ssa)
288 literal_index = get_literal_constant(array_deref.index->ssa->index);
289
290 if (!literal_index) {
291 sfn_log << SfnLog::err << "GS: Indirect input addressing not (yet) supported\n";
292 return false;
293 }
294 assert(literal_index->value[0].u32 < 6);
295 PValue addr = m_per_vertex_offsets[literal_index->value[0].u32];
296
297 auto fetch = new FetchInstruction(vc_fetch, no_index_offset, dest, addr,
298 16 * array_deref.var->data.driver_location,
299 R600_GS_RING_CONST_BUFFER, PValue(), bim_none, true);
300 emit_instruction(fetch);
301 return true;
302 }
303
304 void GeometryShaderFromNir::do_finalize()
305 {
306 if (m_num_clip_dist) {
307 sh_info().cc_dist_mask = (1 << m_num_clip_dist) - 1;
308 sh_info().clip_dist_write = (1 << m_num_clip_dist) - 1;
309 }
310 }
311
312 }