2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
29 #include "gallivm/lp_bld_const.h"
30 #include "gallivm/lp_bld_gather.h"
31 #include "gallivm/lp_bld_intr.h"
32 #include "gallivm/lp_bld_logic.h"
33 #include "gallivm/lp_bld_arit.h"
34 #include "gallivm/lp_bld_flow.h"
35 #include "gallivm/lp_bld_misc.h"
36 #include "util/u_memory.h"
37 #include "util/u_string.h"
38 #include "tgsi/tgsi_build.h"
39 #include "tgsi/tgsi_util.h"
40 #include "tgsi/tgsi_dump.h"
42 #include "ac_binary.h"
43 #include "ac_llvm_util.h"
44 #include "si_shader_internal.h"
49 static const char *scratch_rsrc_dword0_symbol
=
50 "SCRATCH_RSRC_DWORD0";
52 static const char *scratch_rsrc_dword1_symbol
=
53 "SCRATCH_RSRC_DWORD1";
55 struct si_shader_output_values
57 LLVMValueRef values
[4];
58 unsigned semantic_name
;
59 unsigned semantic_index
;
60 ubyte vertex_stream
[4];
63 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
64 struct si_screen
*sscreen
,
65 struct si_shader
*shader
,
66 LLVMTargetMachineRef tm
);
68 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
69 struct lp_build_tgsi_context
*bld_base
,
70 struct lp_build_emit_data
*emit_data
);
72 static void si_dump_shader_key(unsigned shader
, struct si_shader_key
*key
,
75 static unsigned llvm_get_type_size(LLVMTypeRef type
);
77 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
78 union si_shader_part_key
*key
);
79 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
80 union si_shader_part_key
*key
);
81 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
82 union si_shader_part_key
*key
);
83 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
84 union si_shader_part_key
*key
);
85 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
86 union si_shader_part_key
*key
);
88 /* Ideally pass the sample mask input to the PS epilog as v13, which
89 * is its usual location, so that the shader doesn't have to add v_mov.
91 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 13
93 /* The VS location of the PrimitiveID input is the same in the epilog,
94 * so that the main shader part doesn't have to move it.
96 #define VS_EPILOG_PRIMID_LOC 2
100 LOCAL_ADDR_SPACE
= 3,
104 * Returns a unique index for a semantic name and index. The index must be
105 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
108 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
110 switch (semantic_name
) {
111 case TGSI_SEMANTIC_POSITION
:
113 case TGSI_SEMANTIC_PSIZE
:
115 case TGSI_SEMANTIC_CLIPDIST
:
118 case TGSI_SEMANTIC_GENERIC
:
122 assert(!"invalid generic index");
125 /* patch indices are completely separate and thus start from 0 */
126 case TGSI_SEMANTIC_TESSOUTER
:
128 case TGSI_SEMANTIC_TESSINNER
:
130 case TGSI_SEMANTIC_PATCH
:
134 assert(!"invalid semantic name");
139 unsigned si_shader_io_get_unique_index2(unsigned name
, unsigned index
)
142 case TGSI_SEMANTIC_FOG
:
144 case TGSI_SEMANTIC_LAYER
:
146 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
148 case TGSI_SEMANTIC_PRIMID
:
150 case TGSI_SEMANTIC_COLOR
: /* these alias */
151 case TGSI_SEMANTIC_BCOLOR
:
153 case TGSI_SEMANTIC_TEXCOORD
:
156 assert(!"invalid semantic name");
162 * Get the value of a shader input parameter and extract a bitfield.
164 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
165 unsigned param
, unsigned rshift
,
168 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
169 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
,
172 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
173 value
= bitcast(&ctx
->bld_base
,
174 TGSI_TYPE_UNSIGNED
, value
);
177 value
= LLVMBuildLShr(gallivm
->builder
, value
,
178 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
180 if (rshift
+ bitwidth
< 32) {
181 unsigned mask
= (1 << bitwidth
) - 1;
182 value
= LLVMBuildAnd(gallivm
->builder
, value
,
183 LLVMConstInt(ctx
->i32
, mask
, 0), "");
189 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
192 case PIPE_SHADER_TESS_CTRL
:
193 return unpack_param(ctx
, SI_PARAM_REL_IDS
, 0, 8);
195 case PIPE_SHADER_TESS_EVAL
:
196 return LLVMGetParam(ctx
->main_fn
,
197 ctx
->param_tes_rel_patch_id
);
205 /* Tessellation shaders pass outputs to the next shader using LDS.
207 * LS outputs = TCS inputs
208 * TCS outputs = TES inputs
211 * - TCS inputs for patch 0
212 * - TCS inputs for patch 1
213 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
215 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
216 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
217 * - TCS outputs for patch 1
218 * - Per-patch TCS outputs for patch 1
219 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
220 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
223 * All three shaders VS(LS), TCS, TES share the same LDS space.
227 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
229 if (ctx
->type
== PIPE_SHADER_VERTEX
)
230 return unpack_param(ctx
, SI_PARAM_VS_STATE_BITS
, 8, 13);
231 else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
232 return unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 8, 13);
240 get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
242 return unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 0, 13);
246 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
248 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
250 SI_PARAM_TCS_OUT_OFFSETS
,
256 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
258 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
260 SI_PARAM_TCS_OUT_OFFSETS
,
266 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
268 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
269 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
270 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
272 return LLVMBuildMul(gallivm
->builder
, patch_stride
, rel_patch_id
, "");
276 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
278 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
279 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
280 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
281 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
283 return LLVMBuildAdd(gallivm
->builder
, patch0_offset
,
284 LLVMBuildMul(gallivm
->builder
, patch_stride
,
290 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
292 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
293 LLVMValueRef patch0_patch_data_offset
=
294 get_tcs_out_patch0_patch_data_offset(ctx
);
295 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
296 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
298 return LLVMBuildAdd(gallivm
->builder
, patch0_patch_data_offset
,
299 LLVMBuildMul(gallivm
->builder
, patch_stride
,
304 static LLVMValueRef
get_instance_index_for_fetch(
305 struct si_shader_context
*ctx
,
306 unsigned param_start_instance
, unsigned divisor
)
308 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
310 LLVMValueRef result
= LLVMGetParam(ctx
->main_fn
,
311 ctx
->param_instance_id
);
313 /* The division must be done before START_INSTANCE is added. */
315 result
= LLVMBuildUDiv(gallivm
->builder
, result
,
316 LLVMConstInt(ctx
->i32
, divisor
, 0), "");
318 return LLVMBuildAdd(gallivm
->builder
, result
,
319 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
322 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
324 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
326 unsigned double_index
)
328 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
329 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->gallivm
.context
);
330 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
331 LLVMVectorType(f64
, 2), "");
332 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
333 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
334 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
337 static void declare_input_vs(
338 struct si_shader_context
*ctx
,
339 unsigned input_index
,
340 const struct tgsi_full_declaration
*decl
,
343 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
347 unsigned num_fetches
;
348 unsigned fetch_stride
;
350 LLVMValueRef t_list_ptr
;
351 LLVMValueRef t_offset
;
353 LLVMValueRef vertex_index
;
354 LLVMValueRef input
[3];
356 /* Load the T list */
357 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_VERTEX_BUFFERS
);
359 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
361 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
363 vertex_index
= LLVMGetParam(ctx
->main_fn
,
364 ctx
->param_vertex_index0
+
367 fix_fetch
= ctx
->shader
->key
.mono
.vs
.fix_fetch
[input_index
];
369 /* Do multiple loads for special formats. */
371 case SI_FIX_FETCH_RGB_64_FLOAT
:
372 num_fetches
= 3; /* 3 2-dword loads */
375 case SI_FIX_FETCH_RGBA_64_FLOAT
:
376 num_fetches
= 2; /* 2 4-dword loads */
379 case SI_FIX_FETCH_RGB_8
:
380 case SI_FIX_FETCH_RGB_8_INT
:
384 case SI_FIX_FETCH_RGB_16
:
385 case SI_FIX_FETCH_RGB_16_INT
:
394 for (unsigned i
= 0; i
< num_fetches
; i
++) {
395 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
397 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
398 vertex_index
, voffset
,
402 /* Break up the vec4 into individual components */
403 for (chan
= 0; chan
< 4; chan
++) {
404 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
405 out
[chan
] = LLVMBuildExtractElement(gallivm
->builder
,
406 input
[0], llvm_chan
, "");
410 case SI_FIX_FETCH_A2_SNORM
:
411 case SI_FIX_FETCH_A2_SSCALED
:
412 case SI_FIX_FETCH_A2_SINT
: {
413 /* The hardware returns an unsigned value; convert it to a
416 LLVMValueRef tmp
= out
[3];
417 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
419 /* First, recover the sign-extended signed integer value. */
420 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
421 tmp
= LLVMBuildFPToUI(gallivm
->builder
, tmp
, ctx
->i32
, "");
423 tmp
= LLVMBuildBitCast(gallivm
->builder
, tmp
, ctx
->i32
, "");
425 /* For the integer-like cases, do a natural sign extension.
427 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
428 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
431 tmp
= LLVMBuildShl(gallivm
->builder
, tmp
,
432 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
433 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
434 tmp
= LLVMBuildAShr(gallivm
->builder
, tmp
, c30
, "");
436 /* Convert back to the right type. */
437 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
439 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
440 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
441 clamp
= LLVMBuildFCmp(gallivm
->builder
, LLVMRealULT
, tmp
, neg_one
, "");
442 tmp
= LLVMBuildSelect(gallivm
->builder
, clamp
, neg_one
, tmp
, "");
443 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
444 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
450 case SI_FIX_FETCH_RGBA_32_UNORM
:
451 case SI_FIX_FETCH_RGBX_32_UNORM
:
452 for (chan
= 0; chan
< 4; chan
++) {
453 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
455 out
[chan
] = LLVMBuildUIToFP(gallivm
->builder
,
456 out
[chan
], ctx
->f32
, "");
457 out
[chan
] = LLVMBuildFMul(gallivm
->builder
, out
[chan
],
458 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
460 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
461 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
462 out
[3] = LLVMConstReal(ctx
->f32
, 1);
464 case SI_FIX_FETCH_RGBA_32_SNORM
:
465 case SI_FIX_FETCH_RGBX_32_SNORM
:
466 case SI_FIX_FETCH_RGBA_32_FIXED
:
467 case SI_FIX_FETCH_RGBX_32_FIXED
: {
469 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
470 scale
= 1.0 / 0x10000;
472 scale
= 1.0 / INT_MAX
;
474 for (chan
= 0; chan
< 4; chan
++) {
475 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
477 out
[chan
] = LLVMBuildSIToFP(gallivm
->builder
,
478 out
[chan
], ctx
->f32
, "");
479 out
[chan
] = LLVMBuildFMul(gallivm
->builder
, out
[chan
],
480 LLVMConstReal(ctx
->f32
, scale
), "");
482 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
483 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
484 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
485 out
[3] = LLVMConstReal(ctx
->f32
, 1);
488 case SI_FIX_FETCH_RGBA_32_USCALED
:
489 for (chan
= 0; chan
< 4; chan
++) {
490 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
492 out
[chan
] = LLVMBuildUIToFP(gallivm
->builder
,
493 out
[chan
], ctx
->f32
, "");
496 case SI_FIX_FETCH_RGBA_32_SSCALED
:
497 for (chan
= 0; chan
< 4; chan
++) {
498 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
500 out
[chan
] = LLVMBuildSIToFP(gallivm
->builder
,
501 out
[chan
], ctx
->f32
, "");
504 case SI_FIX_FETCH_RG_64_FLOAT
:
505 for (chan
= 0; chan
< 2; chan
++)
506 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
508 out
[2] = LLVMConstReal(ctx
->f32
, 0);
509 out
[3] = LLVMConstReal(ctx
->f32
, 1);
511 case SI_FIX_FETCH_RGB_64_FLOAT
:
512 for (chan
= 0; chan
< 3; chan
++)
513 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
515 out
[3] = LLVMConstReal(ctx
->f32
, 1);
517 case SI_FIX_FETCH_RGBA_64_FLOAT
:
518 for (chan
= 0; chan
< 4; chan
++) {
519 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
523 case SI_FIX_FETCH_RGB_8
:
524 case SI_FIX_FETCH_RGB_8_INT
:
525 case SI_FIX_FETCH_RGB_16
:
526 case SI_FIX_FETCH_RGB_16_INT
:
527 for (chan
= 0; chan
< 3; chan
++) {
528 out
[chan
] = LLVMBuildExtractElement(gallivm
->builder
,
532 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
533 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
534 out
[3] = LLVMConstReal(ctx
->f32
, 1);
536 out
[3] = LLVMBuildBitCast(gallivm
->builder
, ctx
->i32_1
,
543 static LLVMValueRef
get_primitive_id(struct lp_build_tgsi_context
*bld_base
,
546 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
552 case PIPE_SHADER_VERTEX
:
553 return LLVMGetParam(ctx
->main_fn
,
554 ctx
->param_vs_prim_id
);
555 case PIPE_SHADER_TESS_CTRL
:
556 return LLVMGetParam(ctx
->main_fn
,
558 case PIPE_SHADER_TESS_EVAL
:
559 return LLVMGetParam(ctx
->main_fn
,
560 ctx
->param_tes_patch_id
);
561 case PIPE_SHADER_GEOMETRY
:
562 return LLVMGetParam(ctx
->main_fn
,
563 SI_PARAM_PRIMITIVE_ID
);
571 * Return the value of tgsi_ind_register for indexing.
572 * This is the indirect index with the constant offset added to it.
574 static LLVMValueRef
get_indirect_index(struct si_shader_context
*ctx
,
575 const struct tgsi_ind_register
*ind
,
578 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
581 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
582 result
= LLVMBuildLoad(gallivm
->builder
, result
, "");
583 result
= LLVMBuildAdd(gallivm
->builder
, result
,
584 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
589 * Like get_indirect_index, but restricts the return value to a (possibly
590 * undefined) value inside [0..num).
592 static LLVMValueRef
get_bounded_indirect_index(struct si_shader_context
*ctx
,
593 const struct tgsi_ind_register
*ind
,
594 int rel_index
, unsigned num
)
596 LLVMValueRef result
= get_indirect_index(ctx
, ind
, rel_index
);
598 /* LLVM 3.8: If indirect resource indexing is used:
602 if (HAVE_LLVM
== 0x0308)
603 return LLVMGetUndef(ctx
->i32
);
605 return si_llvm_bound_index(ctx
, result
, num
);
610 * Calculate a dword address given an input or output register and a stride.
612 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
613 const struct tgsi_full_dst_register
*dst
,
614 const struct tgsi_full_src_register
*src
,
615 LLVMValueRef vertex_dw_stride
,
616 LLVMValueRef base_addr
)
618 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
619 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
620 ubyte
*name
, *index
, *array_first
;
622 struct tgsi_full_dst_register reg
;
624 /* Set the register description. The address computation is the same
625 * for sources and destinations. */
627 reg
.Register
.File
= src
->Register
.File
;
628 reg
.Register
.Index
= src
->Register
.Index
;
629 reg
.Register
.Indirect
= src
->Register
.Indirect
;
630 reg
.Register
.Dimension
= src
->Register
.Dimension
;
631 reg
.Indirect
= src
->Indirect
;
632 reg
.Dimension
= src
->Dimension
;
633 reg
.DimIndirect
= src
->DimIndirect
;
637 /* If the register is 2-dimensional (e.g. an array of vertices
638 * in a primitive), calculate the base address of the vertex. */
639 if (reg
.Register
.Dimension
) {
642 if (reg
.Dimension
.Indirect
)
643 index
= get_indirect_index(ctx
, ®
.DimIndirect
,
644 reg
.Dimension
.Index
);
646 index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
648 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
649 LLVMBuildMul(gallivm
->builder
, index
,
650 vertex_dw_stride
, ""), "");
653 /* Get information about the register. */
654 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
655 name
= info
->input_semantic_name
;
656 index
= info
->input_semantic_index
;
657 array_first
= info
->input_array_first
;
658 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
659 name
= info
->output_semantic_name
;
660 index
= info
->output_semantic_index
;
661 array_first
= info
->output_array_first
;
667 if (reg
.Register
.Indirect
) {
668 /* Add the relative address of the element. */
669 LLVMValueRef ind_index
;
671 if (reg
.Indirect
.ArrayID
)
672 first
= array_first
[reg
.Indirect
.ArrayID
];
674 first
= reg
.Register
.Index
;
676 ind_index
= get_indirect_index(ctx
, ®
.Indirect
,
677 reg
.Register
.Index
- first
);
679 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
680 LLVMBuildMul(gallivm
->builder
, ind_index
,
681 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
683 param
= si_shader_io_get_unique_index(name
[first
], index
[first
]);
685 param
= si_shader_io_get_unique_index(name
[reg
.Register
.Index
],
686 index
[reg
.Register
.Index
]);
689 /* Add the base address of the element. */
690 return LLVMBuildAdd(gallivm
->builder
, base_addr
,
691 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
694 /* The offchip buffer layout for TCS->TES is
696 * - attribute 0 of patch 0 vertex 0
697 * - attribute 0 of patch 0 vertex 1
698 * - attribute 0 of patch 0 vertex 2
700 * - attribute 0 of patch 1 vertex 0
701 * - attribute 0 of patch 1 vertex 1
703 * - attribute 1 of patch 0 vertex 0
704 * - attribute 1 of patch 0 vertex 1
706 * - per patch attribute 0 of patch 0
707 * - per patch attribute 0 of patch 1
710 * Note that every attribute has 4 components.
712 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
713 LLVMValueRef rel_patch_id
,
714 LLVMValueRef vertex_index
,
715 LLVMValueRef param_index
)
717 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
718 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
719 LLVMValueRef param_stride
, constant16
;
721 vertices_per_patch
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 9, 6);
722 num_patches
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 0, 9);
723 total_vertices
= LLVMBuildMul(gallivm
->builder
, vertices_per_patch
,
726 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
728 base_addr
= LLVMBuildMul(gallivm
->builder
, rel_patch_id
,
729 vertices_per_patch
, "");
731 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
734 param_stride
= total_vertices
;
736 base_addr
= rel_patch_id
;
737 param_stride
= num_patches
;
740 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
741 LLVMBuildMul(gallivm
->builder
, param_index
,
742 param_stride
, ""), "");
744 base_addr
= LLVMBuildMul(gallivm
->builder
, base_addr
, constant16
, "");
747 LLVMValueRef patch_data_offset
=
748 unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 16, 16);
750 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
751 patch_data_offset
, "");
756 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
757 struct si_shader_context
*ctx
,
758 const struct tgsi_full_dst_register
*dst
,
759 const struct tgsi_full_src_register
*src
)
761 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
762 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
763 ubyte
*name
, *index
, *array_first
;
764 struct tgsi_full_src_register reg
;
765 LLVMValueRef vertex_index
= NULL
;
766 LLVMValueRef param_index
= NULL
;
767 unsigned param_index_base
, param_base
;
769 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
771 if (reg
.Register
.Dimension
) {
773 if (reg
.Dimension
.Indirect
)
774 vertex_index
= get_indirect_index(ctx
, ®
.DimIndirect
,
775 reg
.Dimension
.Index
);
777 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
780 /* Get information about the register. */
781 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
782 name
= info
->input_semantic_name
;
783 index
= info
->input_semantic_index
;
784 array_first
= info
->input_array_first
;
785 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
786 name
= info
->output_semantic_name
;
787 index
= info
->output_semantic_index
;
788 array_first
= info
->output_array_first
;
794 if (reg
.Register
.Indirect
) {
795 if (reg
.Indirect
.ArrayID
)
796 param_base
= array_first
[reg
.Indirect
.ArrayID
];
798 param_base
= reg
.Register
.Index
;
800 param_index
= get_indirect_index(ctx
, ®
.Indirect
,
801 reg
.Register
.Index
- param_base
);
804 param_base
= reg
.Register
.Index
;
805 param_index
= ctx
->i32_0
;
808 param_index_base
= si_shader_io_get_unique_index(name
[param_base
],
811 param_index
= LLVMBuildAdd(gallivm
->builder
, param_index
,
812 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
815 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
816 vertex_index
, param_index
);
819 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
820 enum tgsi_opcode_type type
, unsigned swizzle
,
821 LLVMValueRef buffer
, LLVMValueRef offset
,
822 LLVMValueRef base
, bool readonly_memory
)
824 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
825 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
826 LLVMValueRef value
, value2
;
827 LLVMTypeRef llvm_type
= tgsi2llvmtype(bld_base
, type
);
828 LLVMTypeRef vec_type
= LLVMVectorType(llvm_type
, 4);
831 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
832 0, 1, 0, readonly_memory
);
834 return LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
837 if (!tgsi_type_is_64bit(type
)) {
838 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
839 0, 1, 0, readonly_memory
);
841 value
= LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
842 return LLVMBuildExtractElement(gallivm
->builder
, value
,
843 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
846 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
847 swizzle
* 4, 1, 0, readonly_memory
);
849 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
850 swizzle
* 4 + 4, 1, 0, readonly_memory
);
852 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
858 * \param type output value type
859 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
860 * \param dw_addr address in dwords
862 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
863 enum tgsi_opcode_type type
, unsigned swizzle
,
864 LLVMValueRef dw_addr
)
866 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
867 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
871 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
873 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
874 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
876 return lp_build_gather_values(gallivm
, values
,
880 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
881 LLVMConstInt(ctx
->i32
, swizzle
, 0));
883 value
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
884 if (tgsi_type_is_64bit(type
)) {
886 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
888 value2
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
889 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
892 return LLVMBuildBitCast(gallivm
->builder
, value
,
893 tgsi2llvmtype(bld_base
, type
), "");
899 * \param swizzle offset (typically 0..3)
900 * \param dw_addr address in dwords
901 * \param value value to store
903 static void lds_store(struct lp_build_tgsi_context
*bld_base
,
904 unsigned swizzle
, LLVMValueRef dw_addr
,
907 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
908 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
910 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
911 LLVMConstInt(ctx
->i32
, swizzle
, 0));
913 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
914 ac_build_indexed_store(&ctx
->ac
, ctx
->lds
,
918 static LLVMValueRef
fetch_input_tcs(
919 struct lp_build_tgsi_context
*bld_base
,
920 const struct tgsi_full_src_register
*reg
,
921 enum tgsi_opcode_type type
, unsigned swizzle
)
923 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
924 LLVMValueRef dw_addr
, stride
;
926 stride
= unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 24, 8);
927 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
928 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
930 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
933 static LLVMValueRef
fetch_output_tcs(
934 struct lp_build_tgsi_context
*bld_base
,
935 const struct tgsi_full_src_register
*reg
,
936 enum tgsi_opcode_type type
, unsigned swizzle
)
938 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
939 LLVMValueRef dw_addr
, stride
;
941 if (reg
->Register
.Dimension
) {
942 stride
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 13, 8);
943 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
944 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
946 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
947 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
950 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
953 static LLVMValueRef
fetch_input_tes(
954 struct lp_build_tgsi_context
*bld_base
,
955 const struct tgsi_full_src_register
*reg
,
956 enum tgsi_opcode_type type
, unsigned swizzle
)
958 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
959 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
961 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
962 SI_PARAM_RW_BUFFERS
);
963 buffer
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
964 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_OFFCHIP
, 0));
966 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
967 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
969 return buffer_load(bld_base
, type
, swizzle
, buffer
, base
, addr
, true);
972 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
973 const struct tgsi_full_instruction
*inst
,
974 const struct tgsi_opcode_info
*info
,
977 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
978 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
979 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[0];
980 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
982 LLVMValueRef dw_addr
, stride
;
983 LLVMValueRef rw_buffers
, buffer
, base
, buf_addr
;
984 LLVMValueRef values
[4];
986 bool is_tess_factor
= false;
988 /* Only handle per-patch and per-vertex outputs here.
989 * Vectors will be lowered to scalars and this function will be called again.
991 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
992 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
993 si_llvm_emit_store(bld_base
, inst
, info
, dst
);
997 if (reg
->Register
.Dimension
) {
998 stride
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 13, 8);
999 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1000 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1001 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1003 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1004 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1005 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1007 if (!reg
->Register
.Indirect
) {
1008 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1010 /* Always write tess factors into LDS for the TCS epilog. */
1011 if (name
== TGSI_SEMANTIC_TESSINNER
||
1012 name
== TGSI_SEMANTIC_TESSOUTER
) {
1013 skip_lds_store
= false;
1014 is_tess_factor
= true;
1019 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1020 SI_PARAM_RW_BUFFERS
);
1021 buffer
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
1022 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_OFFCHIP
, 0));
1024 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1025 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1028 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst
, chan_index
) {
1029 LLVMValueRef value
= dst
[chan_index
];
1031 if (inst
->Instruction
.Saturate
)
1032 value
= ac_build_clamp(&ctx
->ac
, value
);
1034 /* Skip LDS stores if there is no LDS read of this output. */
1035 if (!skip_lds_store
)
1036 lds_store(bld_base
, chan_index
, dw_addr
, value
);
1038 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
1039 values
[chan_index
] = value
;
1041 if (inst
->Dst
[0].Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1042 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1044 4 * chan_index
, 1, 0, true, false);
1048 if (inst
->Dst
[0].Register
.WriteMask
== 0xF && !is_tess_factor
) {
1049 LLVMValueRef value
= lp_build_gather_values(gallivm
,
1051 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1052 base
, 0, 1, 0, true, false);
1056 static LLVMValueRef
fetch_input_gs(
1057 struct lp_build_tgsi_context
*bld_base
,
1058 const struct tgsi_full_src_register
*reg
,
1059 enum tgsi_opcode_type type
,
1062 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1063 struct si_shader
*shader
= ctx
->shader
;
1064 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1065 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1066 LLVMValueRef vtx_offset
, soffset
;
1067 unsigned vtx_offset_param
;
1068 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1069 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1070 unsigned semantic_index
= info
->input_semantic_index
[reg
->Register
.Index
];
1074 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1075 return get_primitive_id(bld_base
, swizzle
);
1077 if (!reg
->Register
.Dimension
)
1080 if (swizzle
== ~0) {
1081 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1083 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1084 values
[chan
] = fetch_input_gs(bld_base
, reg
, type
, chan
);
1086 return lp_build_gather_values(gallivm
, values
,
1090 /* Get the vertex offset parameter */
1091 vtx_offset_param
= reg
->Dimension
.Index
;
1092 if (vtx_offset_param
< 2) {
1093 vtx_offset_param
+= SI_PARAM_VTX0_OFFSET
;
1095 assert(vtx_offset_param
< 6);
1096 vtx_offset_param
+= SI_PARAM_VTX2_OFFSET
- 2;
1098 vtx_offset
= lp_build_mul_imm(uint
,
1099 LLVMGetParam(ctx
->main_fn
,
1103 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1104 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1106 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1107 vtx_offset
, soffset
, 0, 1, 0, true);
1108 if (tgsi_type_is_64bit(type
)) {
1109 LLVMValueRef value2
;
1110 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1112 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1113 ctx
->i32_0
, vtx_offset
, soffset
,
1115 return si_llvm_emit_fetch_64bit(bld_base
, type
,
1118 return LLVMBuildBitCast(gallivm
->builder
,
1120 tgsi2llvmtype(bld_base
, type
), "");
1123 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1125 switch (interpolate
) {
1126 case TGSI_INTERPOLATE_CONSTANT
:
1129 case TGSI_INTERPOLATE_LINEAR
:
1130 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1131 return SI_PARAM_LINEAR_SAMPLE
;
1132 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1133 return SI_PARAM_LINEAR_CENTROID
;
1135 return SI_PARAM_LINEAR_CENTER
;
1137 case TGSI_INTERPOLATE_COLOR
:
1138 case TGSI_INTERPOLATE_PERSPECTIVE
:
1139 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1140 return SI_PARAM_PERSP_SAMPLE
;
1141 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1142 return SI_PARAM_PERSP_CENTROID
;
1144 return SI_PARAM_PERSP_CENTER
;
1147 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1153 * Interpolate a fragment shader input.
1155 * @param ctx context
1156 * @param input_index index of the input in hardware
1157 * @param semantic_name TGSI_SEMANTIC_*
1158 * @param semantic_index semantic index
1159 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1160 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1161 * @param interp_param interpolation weights (i,j)
1162 * @param prim_mask SI_PARAM_PRIM_MASK
1163 * @param face SI_PARAM_FRONT_FACE
1164 * @param result the return value (4 components)
1166 static void interp_fs_input(struct si_shader_context
*ctx
,
1167 unsigned input_index
,
1168 unsigned semantic_name
,
1169 unsigned semantic_index
,
1170 unsigned num_interp_inputs
,
1171 unsigned colors_read_mask
,
1172 LLVMValueRef interp_param
,
1173 LLVMValueRef prim_mask
,
1175 LLVMValueRef result
[4])
1177 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1178 LLVMValueRef attr_number
;
1183 /* fs.constant returns the param from the middle vertex, so it's not
1184 * really useful for flat shading. It's meant to be used for custom
1185 * interpolation (but the intrinsic can't fetch from the other two
1188 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1189 * to do the right thing. The only reason we use fs.constant is that
1190 * fs.interp cannot be used on integers, because they can be equal
1193 * When interp is false we will use fs.constant or for newer llvm,
1194 * amdgcn.interp.mov.
1196 bool interp
= interp_param
!= NULL
;
1198 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, 0);
1201 interp_param
= LLVMBuildBitCast(gallivm
->builder
, interp_param
,
1202 LLVMVectorType(ctx
->f32
, 2), "");
1204 i
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1206 j
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1210 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1211 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1212 LLVMValueRef is_face_positive
;
1213 LLVMValueRef back_attr_number
;
1215 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1216 * otherwise it's at offset "num_inputs".
1218 unsigned back_attr_offset
= num_interp_inputs
;
1219 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1220 back_attr_offset
+= 1;
1222 back_attr_number
= LLVMConstInt(ctx
->i32
, back_attr_offset
, 0);
1224 is_face_positive
= LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
1225 face
, ctx
->i32_0
, "");
1227 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1228 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
1229 LLVMValueRef front
, back
;
1232 front
= ac_build_fs_interp(&ctx
->ac
, llvm_chan
,
1233 attr_number
, prim_mask
,
1235 back
= ac_build_fs_interp(&ctx
->ac
, llvm_chan
,
1236 back_attr_number
, prim_mask
,
1239 front
= ac_build_fs_interp_mov(&ctx
->ac
,
1240 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1241 llvm_chan
, attr_number
, prim_mask
);
1242 back
= ac_build_fs_interp_mov(&ctx
->ac
,
1243 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1244 llvm_chan
, back_attr_number
, prim_mask
);
1247 result
[chan
] = LLVMBuildSelect(gallivm
->builder
,
1253 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1255 result
[0] = ac_build_fs_interp(&ctx
->ac
, ctx
->i32_0
,
1256 attr_number
, prim_mask
, i
, j
);
1258 result
[0] = ac_build_fs_interp_mov(&ctx
->ac
, ctx
->i32_0
,
1259 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1260 attr_number
, prim_mask
);
1263 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1264 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1266 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1267 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
1270 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
1271 llvm_chan
, attr_number
, prim_mask
, i
, j
);
1273 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
1274 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1275 llvm_chan
, attr_number
, prim_mask
);
1281 static void declare_input_fs(
1282 struct si_shader_context
*ctx
,
1283 unsigned input_index
,
1284 const struct tgsi_full_declaration
*decl
,
1285 LLVMValueRef out
[4])
1287 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
1288 struct si_shader
*shader
= ctx
->shader
;
1289 LLVMValueRef main_fn
= ctx
->main_fn
;
1290 LLVMValueRef interp_param
= NULL
;
1291 int interp_param_idx
;
1293 /* Get colors from input VGPRs (set by the prolog). */
1294 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
) {
1295 unsigned i
= decl
->Semantic
.Index
;
1296 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1297 unsigned mask
= colors_read
>> (i
* 4);
1298 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1299 (i
? util_bitcount(colors_read
& 0xf) : 0);
1301 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1302 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1303 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1304 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1308 interp_param_idx
= lookup_interp_param_index(decl
->Interp
.Interpolate
,
1309 decl
->Interp
.Location
);
1310 if (interp_param_idx
== -1)
1312 else if (interp_param_idx
) {
1313 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1316 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
&&
1317 decl
->Interp
.Interpolate
== TGSI_INTERPOLATE_COLOR
&&
1318 ctx
->shader
->key
.part
.ps
.prolog
.flatshade_colors
)
1319 interp_param
= NULL
; /* load the constant color */
1321 interp_fs_input(ctx
, input_index
, decl
->Semantic
.Name
,
1322 decl
->Semantic
.Index
, shader
->selector
->info
.num_inputs
,
1323 shader
->selector
->info
.colors_read
, interp_param
,
1324 LLVMGetParam(main_fn
, SI_PARAM_PRIM_MASK
),
1325 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1329 static LLVMValueRef
get_sample_id(struct si_shader_context
*ctx
)
1331 return unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1336 * Load a dword from a constant buffer.
1338 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1339 LLVMValueRef resource
,
1340 LLVMValueRef offset
)
1342 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
1343 LLVMValueRef args
[2] = {resource
, offset
};
1345 return lp_build_intrinsic(builder
, "llvm.SI.load.const", ctx
->f32
, args
, 2,
1346 LP_FUNC_ATTR_READNONE
|
1347 LP_FUNC_ATTR_LEGACY
);
1350 static LLVMValueRef
load_sample_position(struct si_shader_context
*ctx
, LLVMValueRef sample_id
)
1352 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
1353 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1354 LLVMBuilderRef builder
= gallivm
->builder
;
1355 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
1356 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1357 LLVMValueRef resource
= ac_build_indexed_load_const(&ctx
->ac
, desc
, buf_index
);
1359 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1360 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1361 LLVMValueRef offset1
= LLVMBuildAdd(builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1363 LLVMValueRef pos
[4] = {
1364 buffer_load_const(ctx
, resource
, offset0
),
1365 buffer_load_const(ctx
, resource
, offset1
),
1366 LLVMConstReal(ctx
->f32
, 0),
1367 LLVMConstReal(ctx
->f32
, 0)
1370 return lp_build_gather_values(gallivm
, pos
, 4);
1373 static void declare_system_value(struct si_shader_context
*ctx
,
1375 const struct tgsi_full_declaration
*decl
)
1377 struct lp_build_context
*bld
= &ctx
->bld_base
.base
;
1378 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1379 LLVMValueRef value
= 0;
1381 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1383 switch (decl
->Semantic
.Name
) {
1384 case TGSI_SEMANTIC_INSTANCEID
:
1385 value
= LLVMGetParam(ctx
->main_fn
,
1386 ctx
->param_instance_id
);
1389 case TGSI_SEMANTIC_VERTEXID
:
1390 value
= LLVMBuildAdd(gallivm
->builder
,
1391 LLVMGetParam(ctx
->main_fn
,
1392 ctx
->param_vertex_id
),
1393 LLVMGetParam(ctx
->main_fn
,
1394 SI_PARAM_BASE_VERTEX
), "");
1397 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1398 /* Unused. Clarify the meaning in indexed vs. non-indexed
1399 * draws if this is ever used again. */
1403 case TGSI_SEMANTIC_BASEVERTEX
:
1405 /* For non-indexed draws, the base vertex set by the driver
1406 * (for direct draws) or the CP (for indirect draws) is the
1407 * first vertex ID, but GLSL expects 0 to be returned.
1409 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_VS_STATE_BITS
);
1410 LLVMValueRef indexed
;
1412 indexed
= LLVMBuildLShr(gallivm
->builder
, vs_state
, ctx
->i32_1
, "");
1413 indexed
= LLVMBuildTrunc(gallivm
->builder
, indexed
, ctx
->i1
, "");
1415 value
= LLVMBuildSelect(gallivm
->builder
, indexed
,
1416 LLVMGetParam(ctx
->main_fn
, SI_PARAM_BASE_VERTEX
),
1421 case TGSI_SEMANTIC_BASEINSTANCE
:
1422 value
= LLVMGetParam(ctx
->main_fn
,
1423 SI_PARAM_START_INSTANCE
);
1426 case TGSI_SEMANTIC_DRAWID
:
1427 value
= LLVMGetParam(ctx
->main_fn
,
1431 case TGSI_SEMANTIC_INVOCATIONID
:
1432 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1433 value
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
1434 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
1435 value
= LLVMGetParam(ctx
->main_fn
,
1436 SI_PARAM_GS_INSTANCE_ID
);
1438 assert(!"INVOCATIONID not implemented");
1441 case TGSI_SEMANTIC_POSITION
:
1443 LLVMValueRef pos
[4] = {
1444 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1445 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1446 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
1447 lp_build_emit_llvm_unary(&ctx
->bld_base
, TGSI_OPCODE_RCP
,
1448 LLVMGetParam(ctx
->main_fn
,
1449 SI_PARAM_POS_W_FLOAT
)),
1451 value
= lp_build_gather_values(gallivm
, pos
, 4);
1455 case TGSI_SEMANTIC_FACE
:
1456 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_FRONT_FACE
);
1459 case TGSI_SEMANTIC_SAMPLEID
:
1460 value
= get_sample_id(ctx
);
1463 case TGSI_SEMANTIC_SAMPLEPOS
: {
1464 LLVMValueRef pos
[4] = {
1465 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1466 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1467 LLVMConstReal(ctx
->f32
, 0),
1468 LLVMConstReal(ctx
->f32
, 0)
1470 pos
[0] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
1471 TGSI_OPCODE_FRC
, pos
[0]);
1472 pos
[1] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
1473 TGSI_OPCODE_FRC
, pos
[1]);
1474 value
= lp_build_gather_values(gallivm
, pos
, 4);
1478 case TGSI_SEMANTIC_SAMPLEMASK
:
1479 /* This can only occur with the OpenGL Core profile, which
1480 * doesn't support smoothing.
1482 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
1485 case TGSI_SEMANTIC_TESSCOORD
:
1487 LLVMValueRef coord
[4] = {
1488 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1489 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1494 /* For triangles, the vector should be (u, v, 1-u-v). */
1495 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1496 PIPE_PRIM_TRIANGLES
)
1497 coord
[2] = lp_build_sub(bld
, bld
->one
,
1498 lp_build_add(bld
, coord
[0], coord
[1]));
1500 value
= lp_build_gather_values(gallivm
, coord
, 4);
1504 case TGSI_SEMANTIC_VERTICESIN
:
1505 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1506 value
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 26, 6);
1507 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1508 value
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 9, 7);
1510 assert(!"invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1513 case TGSI_SEMANTIC_TESSINNER
:
1514 case TGSI_SEMANTIC_TESSOUTER
:
1516 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
1517 int param
= si_shader_io_get_unique_index(decl
->Semantic
.Name
, 0);
1519 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1520 SI_PARAM_RW_BUFFERS
);
1521 buffer
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
1522 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_OFFCHIP
, 0));
1524 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1525 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1526 LLVMConstInt(ctx
->i32
, param
, 0));
1528 value
= buffer_load(&ctx
->bld_base
, TGSI_TYPE_FLOAT
,
1529 ~0, buffer
, base
, addr
, true);
1534 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
1535 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
1537 LLVMValueRef buf
, slot
, val
[4];
1540 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1541 buf
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
1542 buf
= ac_build_indexed_load_const(&ctx
->ac
, buf
, slot
);
1543 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
1545 for (i
= 0; i
< 4; i
++)
1546 val
[i
] = buffer_load_const(ctx
, buf
,
1547 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1548 value
= lp_build_gather_values(gallivm
, val
, 4);
1552 case TGSI_SEMANTIC_PRIMID
:
1553 value
= get_primitive_id(&ctx
->bld_base
, 0);
1556 case TGSI_SEMANTIC_GRID_SIZE
:
1557 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_GRID_SIZE
);
1560 case TGSI_SEMANTIC_BLOCK_SIZE
:
1562 LLVMValueRef values
[3];
1564 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1566 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1567 unsigned sizes
[3] = {
1568 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1569 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1570 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1573 for (i
= 0; i
< 3; ++i
)
1574 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1576 value
= lp_build_gather_values(gallivm
, values
, 3);
1578 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_BLOCK_SIZE
);
1583 case TGSI_SEMANTIC_BLOCK_ID
:
1584 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_BLOCK_ID
);
1587 case TGSI_SEMANTIC_THREAD_ID
:
1588 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_THREAD_ID
);
1591 case TGSI_SEMANTIC_HELPER_INVOCATION
:
1592 if (HAVE_LLVM
>= 0x0309) {
1593 value
= lp_build_intrinsic(gallivm
->builder
,
1594 "llvm.amdgcn.ps.live",
1596 LP_FUNC_ATTR_READNONE
);
1597 value
= LLVMBuildNot(gallivm
->builder
, value
, "");
1598 value
= LLVMBuildSExt(gallivm
->builder
, value
, ctx
->i32
, "");
1600 assert(!"TGSI_SEMANTIC_HELPER_INVOCATION unsupported");
1605 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
1606 value
= LLVMConstInt(ctx
->i32
, 64, 0);
1609 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
1610 value
= ac_get_thread_id(&ctx
->ac
);
1613 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
1615 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
1616 id
= LLVMBuildZExt(gallivm
->builder
, id
, ctx
->i64
, "");
1617 value
= LLVMBuildShl(gallivm
->builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
1618 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->v2i32
, "");
1622 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
1623 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
1624 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
1625 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
1627 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
1628 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
1629 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
1630 /* All bits set except LSB */
1631 value
= LLVMConstInt(ctx
->i64
, -2, 0);
1634 value
= LLVMConstInt(ctx
->i64
, -1, 0);
1636 id
= LLVMBuildZExt(gallivm
->builder
, id
, ctx
->i64
, "");
1637 value
= LLVMBuildShl(gallivm
->builder
, value
, id
, "");
1638 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
1639 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
1640 value
= LLVMBuildNot(gallivm
->builder
, value
, "");
1641 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->v2i32
, "");
1646 assert(!"unknown system value");
1650 ctx
->system_values
[index
] = value
;
1653 static void declare_compute_memory(struct si_shader_context
*ctx
,
1654 const struct tgsi_full_declaration
*decl
)
1656 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
1657 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1659 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, LOCAL_ADDR_SPACE
);
1662 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
1663 assert(decl
->Range
.First
== decl
->Range
.Last
);
1664 assert(!ctx
->shared_memory
);
1666 var
= LLVMAddGlobalInAddressSpace(gallivm
->module
,
1667 LLVMArrayType(ctx
->i8
, sel
->local_size
),
1670 LLVMSetAlignment(var
, 4);
1672 ctx
->shared_memory
= LLVMBuildBitCast(gallivm
->builder
, var
, i8p
, "");
1675 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
1677 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
1678 SI_PARAM_CONST_BUFFERS
);
1680 return ac_build_indexed_load_const(&ctx
->ac
, list_ptr
,
1681 LLVMConstInt(ctx
->i32
, i
, 0));
1684 static LLVMValueRef
fetch_constant(
1685 struct lp_build_tgsi_context
*bld_base
,
1686 const struct tgsi_full_src_register
*reg
,
1687 enum tgsi_opcode_type type
,
1690 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1691 struct lp_build_context
*base
= &bld_base
->base
;
1692 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
1695 LLVMValueRef addr
, bufp
;
1696 LLVMValueRef result
;
1698 if (swizzle
== LP_CHAN_ALL
) {
1700 LLVMValueRef values
[4];
1701 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
1702 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
1704 return lp_build_gather_values(&ctx
->gallivm
, values
, 4);
1707 buf
= reg
->Register
.Dimension
? reg
->Dimension
.Index
: 0;
1708 idx
= reg
->Register
.Index
* 4 + swizzle
;
1710 if (reg
->Register
.Dimension
&& reg
->Dimension
.Indirect
) {
1711 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_CONST_BUFFERS
);
1713 index
= get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
1714 reg
->Dimension
.Index
,
1715 SI_NUM_CONST_BUFFERS
);
1716 bufp
= ac_build_indexed_load_const(&ctx
->ac
, ptr
, index
);
1718 bufp
= load_const_buffer_desc(ctx
, buf
);
1720 if (reg
->Register
.Indirect
) {
1721 addr
= ctx
->addrs
[ireg
->Index
][ireg
->Swizzle
];
1722 addr
= LLVMBuildLoad(base
->gallivm
->builder
, addr
, "load addr reg");
1723 addr
= lp_build_mul_imm(&bld_base
->uint_bld
, addr
, 16);
1724 addr
= lp_build_add(&bld_base
->uint_bld
, addr
,
1725 LLVMConstInt(ctx
->i32
, idx
* 4, 0));
1727 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
1730 result
= buffer_load_const(ctx
, bufp
, addr
);
1732 if (!tgsi_type_is_64bit(type
))
1733 result
= bitcast(bld_base
, type
, result
);
1735 LLVMValueRef addr2
, result2
;
1737 addr2
= lp_build_add(&bld_base
->uint_bld
, addr
,
1738 LLVMConstInt(ctx
->i32
, 4, 0));
1739 result2
= buffer_load_const(ctx
, bufp
, addr2
);
1741 result
= si_llvm_emit_fetch_64bit(bld_base
, type
,
1747 /* Upper 16 bits must be zero. */
1748 static LLVMValueRef
si_llvm_pack_two_int16(struct si_shader_context
*ctx
,
1749 LLVMValueRef val
[2])
1751 return LLVMBuildOr(ctx
->gallivm
.builder
, val
[0],
1752 LLVMBuildShl(ctx
->gallivm
.builder
, val
[1],
1753 LLVMConstInt(ctx
->i32
, 16, 0),
1757 /* Upper 16 bits are ignored and will be dropped. */
1758 static LLVMValueRef
si_llvm_pack_two_int32_as_int16(struct si_shader_context
*ctx
,
1759 LLVMValueRef val
[2])
1761 LLVMValueRef v
[2] = {
1762 LLVMBuildAnd(ctx
->gallivm
.builder
, val
[0],
1763 LLVMConstInt(ctx
->i32
, 0xffff, 0), ""),
1766 return si_llvm_pack_two_int16(ctx
, v
);
1769 /* Initialize arguments for the shader export intrinsic */
1770 static void si_llvm_init_export_args(struct lp_build_tgsi_context
*bld_base
,
1771 LLVMValueRef
*values
,
1773 struct ac_export_args
*args
)
1775 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1776 struct lp_build_context
*base
= &bld_base
->base
;
1777 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
1778 LLVMValueRef val
[4];
1779 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
1781 bool is_int8
, is_int10
;
1783 /* Default is 0xf. Adjusted below depending on the format. */
1784 args
->enabled_channels
= 0xf; /* writemask */
1786 /* Specify whether the EXEC mask represents the valid mask */
1787 args
->valid_mask
= 0;
1789 /* Specify whether this is the last export */
1792 /* Specify the target we are exporting */
1793 args
->target
= target
;
1795 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
1796 const struct si_shader_key
*key
= &ctx
->shader
->key
;
1797 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
1798 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
1800 assert(cbuf
>= 0 && cbuf
< 8);
1801 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
1802 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
1803 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
1806 args
->compr
= false;
1807 args
->out
[0] = base
->undef
;
1808 args
->out
[1] = base
->undef
;
1809 args
->out
[2] = base
->undef
;
1810 args
->out
[3] = base
->undef
;
1812 switch (spi_shader_col_format
) {
1813 case V_028714_SPI_SHADER_ZERO
:
1814 args
->enabled_channels
= 0; /* writemask */
1815 args
->target
= V_008DFC_SQ_EXP_NULL
;
1818 case V_028714_SPI_SHADER_32_R
:
1819 args
->enabled_channels
= 1; /* writemask */
1820 args
->out
[0] = values
[0];
1823 case V_028714_SPI_SHADER_32_GR
:
1824 args
->enabled_channels
= 0x3; /* writemask */
1825 args
->out
[0] = values
[0];
1826 args
->out
[1] = values
[1];
1829 case V_028714_SPI_SHADER_32_AR
:
1830 args
->enabled_channels
= 0x9; /* writemask */
1831 args
->out
[0] = values
[0];
1832 args
->out
[3] = values
[3];
1835 case V_028714_SPI_SHADER_FP16_ABGR
:
1836 args
->compr
= 1; /* COMPR flag */
1838 for (chan
= 0; chan
< 2; chan
++) {
1839 LLVMValueRef pack_args
[2] = {
1841 values
[2 * chan
+ 1]
1843 LLVMValueRef packed
;
1845 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
1847 LLVMBuildBitCast(ctx
->gallivm
.builder
,
1848 packed
, ctx
->f32
, "");
1852 case V_028714_SPI_SHADER_UNORM16_ABGR
:
1853 for (chan
= 0; chan
< 4; chan
++) {
1854 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
1855 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
1856 LLVMConstReal(ctx
->f32
, 65535), "");
1857 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
1858 LLVMConstReal(ctx
->f32
, 0.5), "");
1859 val
[chan
] = LLVMBuildFPToUI(builder
, val
[chan
],
1863 args
->compr
= 1; /* COMPR flag */
1864 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1865 si_llvm_pack_two_int16(ctx
, val
));
1866 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1867 si_llvm_pack_two_int16(ctx
, val
+2));
1870 case V_028714_SPI_SHADER_SNORM16_ABGR
:
1871 for (chan
= 0; chan
< 4; chan
++) {
1872 /* Clamp between [-1, 1]. */
1873 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MIN
,
1875 LLVMConstReal(ctx
->f32
, 1));
1876 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MAX
,
1878 LLVMConstReal(ctx
->f32
, -1));
1879 /* Convert to a signed integer in [-32767, 32767]. */
1880 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
1881 LLVMConstReal(ctx
->f32
, 32767), "");
1882 /* If positive, add 0.5, else add -0.5. */
1883 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
1884 LLVMBuildSelect(builder
,
1885 LLVMBuildFCmp(builder
, LLVMRealOGE
,
1886 val
[chan
], base
->zero
, ""),
1887 LLVMConstReal(ctx
->f32
, 0.5),
1888 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
1889 val
[chan
] = LLVMBuildFPToSI(builder
, val
[chan
], ctx
->i32
, "");
1892 args
->compr
= 1; /* COMPR flag */
1893 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1894 si_llvm_pack_two_int32_as_int16(ctx
, val
));
1895 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1896 si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
1899 case V_028714_SPI_SHADER_UINT16_ABGR
: {
1900 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
1901 is_int8
? 255 : is_int10
? 1023 : 65535, 0);
1902 LLVMValueRef max_alpha
=
1903 !is_int10
? max_rgb
: LLVMConstInt(ctx
->i32
, 3, 0);
1906 for (chan
= 0; chan
< 4; chan
++) {
1907 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
1908 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_UMIN
,
1910 chan
== 3 ? max_alpha
: max_rgb
);
1913 args
->compr
= 1; /* COMPR flag */
1914 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1915 si_llvm_pack_two_int16(ctx
, val
));
1916 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1917 si_llvm_pack_two_int16(ctx
, val
+2));
1921 case V_028714_SPI_SHADER_SINT16_ABGR
: {
1922 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
1923 is_int8
? 127 : is_int10
? 511 : 32767, 0);
1924 LLVMValueRef min_rgb
= LLVMConstInt(ctx
->i32
,
1925 is_int8
? -128 : is_int10
? -512 : -32768, 0);
1926 LLVMValueRef max_alpha
=
1927 !is_int10
? max_rgb
: ctx
->i32_1
;
1928 LLVMValueRef min_alpha
=
1929 !is_int10
? min_rgb
: LLVMConstInt(ctx
->i32
, -2, 0);
1932 for (chan
= 0; chan
< 4; chan
++) {
1933 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
1934 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
1936 val
[chan
], chan
== 3 ? max_alpha
: max_rgb
);
1937 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
1939 val
[chan
], chan
== 3 ? min_alpha
: min_rgb
);
1942 args
->compr
= 1; /* COMPR flag */
1943 args
->out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1944 si_llvm_pack_two_int32_as_int16(ctx
, val
));
1945 args
->out
[1] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
1946 si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
1950 case V_028714_SPI_SHADER_32_ABGR
:
1951 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
1956 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
1959 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1961 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
1962 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
1963 SI_PARAM_ALPHA_REF
);
1965 LLVMValueRef alpha_pass
=
1966 lp_build_cmp(&bld_base
->base
,
1967 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
,
1970 lp_build_select(&bld_base
->base
,
1972 LLVMConstReal(ctx
->f32
, 1.0f
),
1973 LLVMConstReal(ctx
->f32
, -1.0f
));
1975 ac_build_kill(&ctx
->ac
, arg
);
1977 ac_build_kill(&ctx
->ac
, NULL
);
1981 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
1983 unsigned samplemask_param
)
1985 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1986 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1987 LLVMValueRef coverage
;
1989 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
1990 coverage
= LLVMGetParam(ctx
->main_fn
,
1992 coverage
= bitcast(bld_base
, TGSI_TYPE_SIGNED
, coverage
);
1994 coverage
= lp_build_intrinsic(gallivm
->builder
, "llvm.ctpop.i32",
1996 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
1998 coverage
= LLVMBuildUIToFP(gallivm
->builder
, coverage
,
2001 coverage
= LLVMBuildFMul(gallivm
->builder
, coverage
,
2002 LLVMConstReal(ctx
->f32
,
2003 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2005 return LLVMBuildFMul(gallivm
->builder
, alpha
, coverage
, "");
2008 static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context
*bld_base
,
2009 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2011 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2012 struct lp_build_context
*base
= &bld_base
->base
;
2015 unsigned const_chan
;
2016 LLVMValueRef base_elt
;
2017 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
2018 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2019 SI_VS_CONST_CLIP_PLANES
, 0);
2020 LLVMValueRef const_resource
= ac_build_indexed_load_const(&ctx
->ac
, ptr
, constbuf_index
);
2022 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2023 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2028 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2030 /* Compute dot products of position and user clip plane vectors */
2031 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2032 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2034 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2035 const_chan
) * 4, 0);
2036 base_elt
= buffer_load_const(ctx
, const_resource
,
2039 lp_build_add(base
, args
->out
[chan
],
2040 lp_build_mul(base
, base_elt
,
2041 out_elts
[const_chan
]));
2045 args
->enabled_channels
= 0xf;
2046 args
->valid_mask
= 0;
2048 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2053 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2057 if (so
->num_outputs
)
2058 fprintf(stderr
, "STREAMOUT\n");
2060 for (i
= 0; i
< so
->num_outputs
; i
++) {
2061 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2062 so
->output
[i
].start_component
;
2063 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2064 i
, so
->output
[i
].output_buffer
,
2065 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2066 so
->output
[i
].register_index
,
2067 mask
& 1 ? "x" : "",
2068 mask
& 2 ? "y" : "",
2069 mask
& 4 ? "z" : "",
2070 mask
& 8 ? "w" : "");
2074 static void emit_streamout_output(struct si_shader_context
*ctx
,
2075 LLVMValueRef
const *so_buffers
,
2076 LLVMValueRef
const *so_write_offsets
,
2077 struct pipe_stream_output
*stream_out
,
2078 struct si_shader_output_values
*shader_out
)
2080 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2081 LLVMBuilderRef builder
= gallivm
->builder
;
2082 unsigned buf_idx
= stream_out
->output_buffer
;
2083 unsigned start
= stream_out
->start_component
;
2084 unsigned num_comps
= stream_out
->num_components
;
2085 LLVMValueRef out
[4];
2087 assert(num_comps
&& num_comps
<= 4);
2088 if (!num_comps
|| num_comps
> 4)
2091 /* Load the output as int. */
2092 for (int j
= 0; j
< num_comps
; j
++) {
2093 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2095 out
[j
] = LLVMBuildBitCast(builder
,
2096 shader_out
->values
[start
+ j
],
2100 /* Pack the output. */
2101 LLVMValueRef vdata
= NULL
;
2103 switch (num_comps
) {
2104 case 1: /* as i32 */
2107 case 2: /* as v2i32 */
2108 case 3: /* as v4i32 (aligned to 4) */
2109 case 4: /* as v4i32 */
2110 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2111 for (int j
= 0; j
< num_comps
; j
++) {
2112 vdata
= LLVMBuildInsertElement(builder
, vdata
, out
[j
],
2113 LLVMConstInt(ctx
->i32
, j
, 0), "");
2118 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2120 so_write_offsets
[buf_idx
],
2122 stream_out
->dst_offset
* 4, 1, 1, true, false);
2126 * Write streamout data to buffers for vertex stream @p stream (different
2127 * vertex streams can occur for GS copy shaders).
2129 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2130 struct si_shader_output_values
*outputs
,
2131 unsigned noutput
, unsigned stream
)
2133 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2134 struct pipe_stream_output_info
*so
= &sel
->so
;
2135 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2136 LLVMBuilderRef builder
= gallivm
->builder
;
2138 struct lp_build_if_state if_ctx
;
2140 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2141 LLVMValueRef so_vtx_count
=
2142 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2144 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2146 /* can_emit = tid < so_vtx_count; */
2147 LLVMValueRef can_emit
=
2148 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2150 /* Emit the streamout code conditionally. This actually avoids
2151 * out-of-bounds buffer access. The hw tells us via the SGPR
2152 * (so_vtx_count) which threads are allowed to emit streamout data. */
2153 lp_build_if(&if_ctx
, gallivm
, can_emit
);
2155 /* The buffer offset is computed as follows:
2156 * ByteOffset = streamout_offset[buffer_id]*4 +
2157 * (streamout_write_index + thread_id)*stride[buffer_id] +
2161 LLVMValueRef so_write_index
=
2162 LLVMGetParam(ctx
->main_fn
,
2163 ctx
->param_streamout_write_index
);
2165 /* Compute (streamout_write_index + thread_id). */
2166 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2168 /* Load the descriptor and compute the write offset for each
2169 * enabled buffer. */
2170 LLVMValueRef so_write_offset
[4] = {};
2171 LLVMValueRef so_buffers
[4];
2172 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2173 SI_PARAM_RW_BUFFERS
);
2175 for (i
= 0; i
< 4; i
++) {
2179 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2180 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2182 so_buffers
[i
] = ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
2184 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2185 ctx
->param_streamout_offset
[i
]);
2186 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2188 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2189 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2190 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2193 /* Write streamout data. */
2194 for (i
= 0; i
< so
->num_outputs
; i
++) {
2195 unsigned reg
= so
->output
[i
].register_index
;
2200 if (stream
!= so
->output
[i
].stream
)
2203 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2204 &so
->output
[i
], &outputs
[reg
]);
2207 lp_build_endif(&if_ctx
);
2211 /* Generate export instructions for hardware VS shader stage */
2212 static void si_llvm_export_vs(struct lp_build_tgsi_context
*bld_base
,
2213 struct si_shader_output_values
*outputs
,
2216 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2217 struct si_shader
*shader
= ctx
->shader
;
2218 struct lp_build_context
*base
= &bld_base
->base
;
2219 struct ac_export_args args
, pos_args
[4] = {};
2220 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2221 unsigned semantic_name
, semantic_index
;
2223 unsigned param_count
= 0;
2227 for (i
= 0; i
< noutput
; i
++) {
2228 semantic_name
= outputs
[i
].semantic_name
;
2229 semantic_index
= outputs
[i
].semantic_index
;
2230 bool export_param
= true;
2232 switch (semantic_name
) {
2233 case TGSI_SEMANTIC_POSITION
: /* ignore these */
2234 case TGSI_SEMANTIC_PSIZE
:
2235 case TGSI_SEMANTIC_CLIPVERTEX
:
2236 case TGSI_SEMANTIC_EDGEFLAG
:
2238 case TGSI_SEMANTIC_GENERIC
:
2239 case TGSI_SEMANTIC_CLIPDIST
:
2240 if (shader
->key
.opt
.hw_vs
.kill_outputs
&
2241 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2242 export_param
= false;
2245 if (shader
->key
.opt
.hw_vs
.kill_outputs2
&
2246 (1u << si_shader_io_get_unique_index2(semantic_name
, semantic_index
)))
2247 export_param
= false;
2251 if (outputs
[i
].vertex_stream
[0] != 0 &&
2252 outputs
[i
].vertex_stream
[1] != 0 &&
2253 outputs
[i
].vertex_stream
[2] != 0 &&
2254 outputs
[i
].vertex_stream
[3] != 0)
2255 export_param
= false;
2258 /* Select the correct target */
2259 switch(semantic_name
) {
2260 case TGSI_SEMANTIC_PSIZE
:
2261 psize_value
= outputs
[i
].values
[0];
2263 case TGSI_SEMANTIC_EDGEFLAG
:
2264 edgeflag_value
= outputs
[i
].values
[0];
2266 case TGSI_SEMANTIC_LAYER
:
2267 layer_value
= outputs
[i
].values
[0];
2268 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2269 goto handle_semantic
;
2270 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2271 viewport_index_value
= outputs
[i
].values
[0];
2272 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2273 goto handle_semantic
;
2274 case TGSI_SEMANTIC_POSITION
:
2275 target
= V_008DFC_SQ_EXP_POS
;
2277 case TGSI_SEMANTIC_CLIPDIST
:
2278 if (shader
->key
.opt
.hw_vs
.clip_disable
) {
2279 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2280 goto handle_semantic
;
2282 target
= V_008DFC_SQ_EXP_POS
+ 2 + semantic_index
;
2284 case TGSI_SEMANTIC_CLIPVERTEX
:
2285 if (shader
->key
.opt
.hw_vs
.clip_disable
)
2287 si_llvm_emit_clipvertex(bld_base
, pos_args
, outputs
[i
].values
);
2289 case TGSI_SEMANTIC_COLOR
:
2290 case TGSI_SEMANTIC_BCOLOR
:
2291 case TGSI_SEMANTIC_PRIMID
:
2292 case TGSI_SEMANTIC_FOG
:
2293 case TGSI_SEMANTIC_TEXCOORD
:
2294 case TGSI_SEMANTIC_GENERIC
:
2297 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
2298 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2299 shader
->info
.vs_output_param_offset
[i
] = param_count
;
2305 "Warning: SI unhandled vs output type:%d\n",
2309 si_llvm_init_export_args(bld_base
, outputs
[i
].values
, target
, &args
);
2311 if (target
>= V_008DFC_SQ_EXP_POS
&&
2312 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
2313 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
2314 &args
, sizeof(args
));
2316 ac_build_export(&ctx
->ac
, &args
);
2319 if (semantic_name
== TGSI_SEMANTIC_CLIPDIST
) {
2320 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2321 goto handle_semantic
;
2325 shader
->info
.nr_param_exports
= param_count
;
2327 /* We need to add the position output manually if it's missing. */
2328 if (!pos_args
[0].out
[0]) {
2329 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2330 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2331 pos_args
[0].done
= 0; /* last export? */
2332 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2333 pos_args
[0].compr
= 0; /* COMPR flag */
2334 pos_args
[0].out
[0] = base
->zero
; /* X */
2335 pos_args
[0].out
[1] = base
->zero
; /* Y */
2336 pos_args
[0].out
[2] = base
->zero
; /* Z */
2337 pos_args
[0].out
[3] = base
->one
; /* W */
2340 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2341 if (shader
->selector
->info
.writes_psize
||
2342 shader
->selector
->info
.writes_edgeflag
||
2343 shader
->selector
->info
.writes_viewport_index
||
2344 shader
->selector
->info
.writes_layer
) {
2345 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2346 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2347 (shader
->selector
->info
.writes_layer
<< 2) |
2348 (shader
->selector
->info
.writes_viewport_index
<< 3);
2349 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2350 pos_args
[1].done
= 0; /* last export? */
2351 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2352 pos_args
[1].compr
= 0; /* COMPR flag */
2353 pos_args
[1].out
[0] = base
->zero
; /* X */
2354 pos_args
[1].out
[1] = base
->zero
; /* Y */
2355 pos_args
[1].out
[2] = base
->zero
; /* Z */
2356 pos_args
[1].out
[3] = base
->zero
; /* W */
2358 if (shader
->selector
->info
.writes_psize
)
2359 pos_args
[1].out
[0] = psize_value
;
2361 if (shader
->selector
->info
.writes_edgeflag
) {
2362 /* The output is a float, but the hw expects an integer
2363 * with the first bit containing the edge flag. */
2364 edgeflag_value
= LLVMBuildFPToUI(ctx
->gallivm
.builder
,
2367 edgeflag_value
= lp_build_min(&bld_base
->int_bld
,
2371 /* The LLVM intrinsic expects a float. */
2372 pos_args
[1].out
[1] = LLVMBuildBitCast(ctx
->gallivm
.builder
,
2377 if (shader
->selector
->info
.writes_layer
)
2378 pos_args
[1].out
[2] = layer_value
;
2380 if (shader
->selector
->info
.writes_viewport_index
)
2381 pos_args
[1].out
[3] = viewport_index_value
;
2384 for (i
= 0; i
< 4; i
++)
2385 if (pos_args
[i
].out
[0])
2386 shader
->info
.nr_pos_exports
++;
2389 for (i
= 0; i
< 4; i
++) {
2390 if (!pos_args
[i
].out
[0])
2393 /* Specify the target we are exporting */
2394 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
2396 if (pos_idx
== shader
->info
.nr_pos_exports
)
2397 /* Specify that this is the last export */
2398 pos_args
[i
].done
= 1;
2400 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
2405 * Forward all outputs from the vertex shader to the TES. This is only used
2406 * for the fixed function TCS.
2408 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
2410 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2411 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2412 LLVMValueRef invocation_id
, rw_buffers
, buffer
, buffer_offset
;
2413 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
2416 invocation_id
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
2418 rw_buffers
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
2419 buffer
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
2420 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_OFFCHIP
, 0));
2422 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
2424 lds_vertex_stride
= unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 24, 8);
2425 lds_vertex_offset
= LLVMBuildMul(gallivm
->builder
, invocation_id
,
2426 lds_vertex_stride
, "");
2427 lds_base
= get_tcs_in_current_patch_offset(ctx
);
2428 lds_base
= LLVMBuildAdd(gallivm
->builder
, lds_base
, lds_vertex_offset
, "");
2430 inputs
= ctx
->shader
->key
.mono
.tcs
.inputs_to_copy
;
2432 unsigned i
= u_bit_scan64(&inputs
);
2434 LLVMValueRef lds_ptr
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2435 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2438 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
2439 get_rel_patch_id(ctx
),
2441 LLVMConstInt(ctx
->i32
, i
, 0));
2443 LLVMValueRef value
= lds_load(bld_base
, TGSI_TYPE_SIGNED
, ~0,
2446 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
2447 buffer_offset
, 0, 1, 0, true, false);
2451 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
2452 LLVMValueRef rel_patch_id
,
2453 LLVMValueRef invocation_id
,
2454 LLVMValueRef tcs_out_current_patch_data_offset
)
2456 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2457 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2458 struct si_shader
*shader
= ctx
->shader
;
2459 unsigned tess_inner_index
, tess_outer_index
;
2460 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
2461 LLVMValueRef out
[6], vec0
, vec1
, rw_buffers
, tf_base
, inner
[4], outer
[4];
2462 unsigned stride
, outer_comps
, inner_comps
, i
;
2463 struct lp_build_if_state if_ctx
, inner_if_ctx
;
2465 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
2467 /* Do this only for invocation 0, because the tess levels are per-patch,
2470 * This can't jump, because invocation 0 executes this. It should
2471 * at least mask out the loads and stores for other invocations.
2473 lp_build_if(&if_ctx
, gallivm
,
2474 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2475 invocation_id
, ctx
->i32_0
, ""));
2477 /* Determine the layout of one tess factor element in the buffer. */
2478 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
2479 case PIPE_PRIM_LINES
:
2480 stride
= 2; /* 2 dwords, 1 vec2 store */
2484 case PIPE_PRIM_TRIANGLES
:
2485 stride
= 4; /* 4 dwords, 1 vec4 store */
2489 case PIPE_PRIM_QUADS
:
2490 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
2499 /* Load tess_inner and tess_outer from LDS.
2500 * Any invocation can write them, so we can't get them from a temporary.
2502 tess_inner_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSINNER
, 0);
2503 tess_outer_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSOUTER
, 0);
2505 lds_base
= tcs_out_current_patch_data_offset
;
2506 lds_inner
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2507 LLVMConstInt(ctx
->i32
,
2508 tess_inner_index
* 4, 0), "");
2509 lds_outer
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2510 LLVMConstInt(ctx
->i32
,
2511 tess_outer_index
* 4, 0), "");
2513 for (i
= 0; i
< 4; i
++) {
2514 inner
[i
] = LLVMGetUndef(ctx
->i32
);
2515 outer
[i
] = LLVMGetUndef(ctx
->i32
);
2518 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
2519 /* For isolines, the hardware expects tess factors in the
2520 * reverse order from what GLSL / TGSI specify.
2522 outer
[0] = out
[1] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 0, lds_outer
);
2523 outer
[1] = out
[0] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 1, lds_outer
);
2525 for (i
= 0; i
< outer_comps
; i
++) {
2527 lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_outer
);
2529 for (i
= 0; i
< inner_comps
; i
++) {
2530 inner
[i
] = out
[outer_comps
+i
] =
2531 lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_inner
);
2535 /* Convert the outputs to vectors for stores. */
2536 vec0
= lp_build_gather_values(gallivm
, out
, MIN2(stride
, 4));
2540 vec1
= lp_build_gather_values(gallivm
, out
+4, stride
- 4);
2542 /* Get the buffer. */
2543 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2544 SI_PARAM_RW_BUFFERS
);
2545 buffer
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
2546 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_FACTOR
, 0));
2548 /* Get the offset. */
2549 tf_base
= LLVMGetParam(ctx
->main_fn
,
2550 SI_PARAM_TESS_FACTOR_OFFSET
);
2551 byteoffset
= LLVMBuildMul(gallivm
->builder
, rel_patch_id
,
2552 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
2554 lp_build_if(&inner_if_ctx
, gallivm
,
2555 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2556 rel_patch_id
, ctx
->i32_0
, ""));
2558 /* Store the dynamic HS control word. */
2559 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
2560 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
2561 1, ctx
->i32_0
, tf_base
,
2562 0, 1, 0, true, false);
2564 lp_build_endif(&inner_if_ctx
);
2566 /* Store the tessellation factors. */
2567 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
2568 MIN2(stride
, 4), byteoffset
, tf_base
,
2569 4, 1, 0, true, false);
2571 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
2572 stride
- 4, byteoffset
, tf_base
,
2573 20, 1, 0, true, false);
2575 /* Store the tess factors into the offchip buffer if TES reads them. */
2576 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
2577 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
2578 LLVMValueRef tf_inner_offset
;
2579 unsigned param_outer
, param_inner
;
2581 buf
= ac_build_indexed_load_const(&ctx
->ac
, rw_buffers
,
2582 LLVMConstInt(ctx
->i32
, SI_HS_RING_TESS_OFFCHIP
, 0));
2583 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
2585 param_outer
= si_shader_io_get_unique_index(
2586 TGSI_SEMANTIC_TESSOUTER
, 0);
2587 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
2588 LLVMConstInt(ctx
->i32
, param_outer
, 0));
2590 outer_vec
= lp_build_gather_values(gallivm
, outer
,
2591 util_next_power_of_two(outer_comps
));
2593 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
2594 outer_comps
, tf_outer_offset
,
2595 base
, 0, 1, 0, true, false);
2597 param_inner
= si_shader_io_get_unique_index(
2598 TGSI_SEMANTIC_TESSINNER
, 0);
2599 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
2600 LLVMConstInt(ctx
->i32
, param_inner
, 0));
2602 inner_vec
= inner_comps
== 1 ? inner
[0] :
2603 lp_build_gather_values(gallivm
, inner
, inner_comps
);
2604 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
2605 inner_comps
, tf_inner_offset
,
2606 base
, 0, 1, 0, true, false);
2610 lp_build_endif(&if_ctx
);
2613 /* This only writes the tessellation factor levels. */
2614 static void si_llvm_emit_tcs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2616 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2617 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
2618 LLVMValueRef offchip_soffset
, offchip_layout
;
2620 si_copy_tcs_inputs(bld_base
);
2622 rel_patch_id
= get_rel_patch_id(ctx
);
2623 invocation_id
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
2624 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
2626 /* Return epilog parameters from this function. */
2627 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
2628 LLVMValueRef ret
= ctx
->return_value
;
2629 LLVMValueRef rw_buffers
, rw0
, rw1
, tf_soffset
;
2632 /* RW_BUFFERS pointer */
2633 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2634 SI_PARAM_RW_BUFFERS
);
2635 rw_buffers
= LLVMBuildPtrToInt(builder
, rw_buffers
, ctx
->i64
, "");
2636 rw_buffers
= LLVMBuildBitCast(builder
, rw_buffers
, ctx
->v2i32
, "");
2637 rw0
= LLVMBuildExtractElement(builder
, rw_buffers
,
2639 rw1
= LLVMBuildExtractElement(builder
, rw_buffers
,
2641 ret
= LLVMBuildInsertValue(builder
, ret
, rw0
, 0, "");
2642 ret
= LLVMBuildInsertValue(builder
, ret
, rw1
, 1, "");
2644 /* Tess offchip and factor buffer soffset are after user SGPRs. */
2645 offchip_layout
= LLVMGetParam(ctx
->main_fn
,
2646 SI_PARAM_TCS_OFFCHIP_LAYOUT
);
2647 offchip_soffset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
2648 tf_soffset
= LLVMGetParam(ctx
->main_fn
,
2649 SI_PARAM_TESS_FACTOR_OFFSET
);
2650 ret
= LLVMBuildInsertValue(builder
, ret
, offchip_layout
,
2651 SI_SGPR_TCS_OFFCHIP_LAYOUT
, "");
2652 ret
= LLVMBuildInsertValue(builder
, ret
, offchip_soffset
,
2653 SI_TCS_NUM_USER_SGPR
, "");
2654 ret
= LLVMBuildInsertValue(builder
, ret
, tf_soffset
,
2655 SI_TCS_NUM_USER_SGPR
+ 1, "");
2658 rel_patch_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, rel_patch_id
);
2659 invocation_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, invocation_id
);
2660 tf_lds_offset
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, tf_lds_offset
);
2662 vgpr
= SI_TCS_NUM_USER_SGPR
+ 2;
2663 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
2664 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
2665 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
2666 ctx
->return_value
= ret
;
2669 static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context
*bld_base
)
2671 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2672 struct si_shader
*shader
= ctx
->shader
;
2673 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
2674 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2676 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
2677 ctx
->param_rel_auto_id
);
2678 LLVMValueRef vertex_dw_stride
=
2679 unpack_param(ctx
, SI_PARAM_VS_STATE_BITS
, 24, 8);
2680 LLVMValueRef base_dw_addr
= LLVMBuildMul(gallivm
->builder
, vertex_id
,
2681 vertex_dw_stride
, "");
2683 /* Write outputs to LDS. The next shader (TCS aka HS) will read
2684 * its inputs from it. */
2685 for (i
= 0; i
< info
->num_outputs
; i
++) {
2686 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
2687 unsigned name
= info
->output_semantic_name
[i
];
2688 unsigned index
= info
->output_semantic_index
[i
];
2690 /* The ARB_shader_viewport_layer_array spec contains the
2693 * 2) What happens if gl_ViewportIndex or gl_Layer is
2694 * written in the vertex shader and a geometry shader is
2697 * RESOLVED: The value written by the last vertex processing
2698 * stage is used. If the last vertex processing stage
2699 * (vertex, tessellation evaluation or geometry) does not
2700 * statically assign to gl_ViewportIndex or gl_Layer, index
2701 * or layer zero is assumed.
2703 * So writes to those outputs in VS-as-LS are simply ignored.
2705 if (name
== TGSI_SEMANTIC_LAYER
||
2706 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
2709 int param
= si_shader_io_get_unique_index(name
, index
);
2710 LLVMValueRef dw_addr
= LLVMBuildAdd(gallivm
->builder
, base_dw_addr
,
2711 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
2713 for (chan
= 0; chan
< 4; chan
++) {
2714 lds_store(bld_base
, chan
, dw_addr
,
2715 LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], ""));
2720 static void si_llvm_emit_es_epilogue(struct lp_build_tgsi_context
*bld_base
)
2722 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2723 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2724 struct si_shader
*es
= ctx
->shader
;
2725 struct tgsi_shader_info
*info
= &es
->selector
->info
;
2726 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
2727 ctx
->param_es2gs_offset
);
2731 for (i
= 0; i
< info
->num_outputs
; i
++) {
2732 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
2735 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
2736 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
2739 param_index
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
2740 info
->output_semantic_index
[i
]);
2742 for (chan
= 0; chan
< 4; chan
++) {
2743 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
2744 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
2746 ac_build_buffer_store_dword(&ctx
->ac
,
2748 out_val
, 1, NULL
, soffset
,
2749 (4 * param_index
+ chan
) * 4,
2755 static void si_llvm_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2757 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2759 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
2760 LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
));
2763 static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2765 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2766 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2767 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
2768 struct si_shader_output_values
*outputs
= NULL
;
2771 assert(!ctx
->shader
->is_gs_copy_shader
);
2773 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
2775 /* Vertex color clamping.
2777 * This uses a state constant loaded in a user data SGPR and
2778 * an IF statement is added that clamps all colors if the constant
2781 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
2782 struct lp_build_if_state if_ctx
;
2783 LLVMValueRef cond
= NULL
;
2784 LLVMValueRef addr
, val
;
2786 for (i
= 0; i
< info
->num_outputs
; i
++) {
2787 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
2788 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
2791 /* We've found a color. */
2793 /* The state is in the first bit of the user SGPR. */
2794 cond
= LLVMGetParam(ctx
->main_fn
,
2795 SI_PARAM_VS_STATE_BITS
);
2796 cond
= LLVMBuildTrunc(gallivm
->builder
, cond
,
2798 lp_build_if(&if_ctx
, gallivm
, cond
);
2801 for (j
= 0; j
< 4; j
++) {
2802 addr
= ctx
->outputs
[i
][j
];
2803 val
= LLVMBuildLoad(gallivm
->builder
, addr
, "");
2804 val
= ac_build_clamp(&ctx
->ac
, val
);
2805 LLVMBuildStore(gallivm
->builder
, val
, addr
);
2810 lp_build_endif(&if_ctx
);
2813 for (i
= 0; i
< info
->num_outputs
; i
++) {
2814 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
2815 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
2817 for (j
= 0; j
< 4; j
++) {
2818 outputs
[i
].values
[j
] =
2819 LLVMBuildLoad(gallivm
->builder
,
2822 outputs
[i
].vertex_stream
[j
] =
2823 (info
->output_streams
[i
] >> (2 * j
)) & 3;
2828 /* Return the primitive ID from the LLVM function. */
2830 LLVMBuildInsertValue(gallivm
->builder
,
2832 bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2833 get_primitive_id(bld_base
, 0)),
2834 VS_EPILOG_PRIMID_LOC
, "");
2836 if (ctx
->shader
->selector
->so
.num_outputs
)
2837 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
2838 si_llvm_export_vs(bld_base
, outputs
, i
);
2842 struct si_ps_exports
{
2844 struct ac_export_args args
[10];
2847 unsigned si_get_spi_shader_z_format(bool writes_z
, bool writes_stencil
,
2848 bool writes_samplemask
)
2851 /* Z needs 32 bits. */
2852 if (writes_samplemask
)
2853 return V_028710_SPI_SHADER_32_ABGR
;
2854 else if (writes_stencil
)
2855 return V_028710_SPI_SHADER_32_GR
;
2857 return V_028710_SPI_SHADER_32_R
;
2858 } else if (writes_stencil
|| writes_samplemask
) {
2859 /* Both stencil and sample mask need only 16 bits. */
2860 return V_028710_SPI_SHADER_UINT16_ABGR
;
2862 return V_028710_SPI_SHADER_ZERO
;
2866 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
2867 LLVMValueRef depth
, LLVMValueRef stencil
,
2868 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
2870 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2871 struct lp_build_context
*base
= &bld_base
->base
;
2872 struct ac_export_args args
;
2874 unsigned format
= si_get_spi_shader_z_format(depth
!= NULL
,
2876 samplemask
!= NULL
);
2878 assert(depth
|| stencil
|| samplemask
);
2880 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
2881 args
.done
= 1; /* DONE bit */
2883 /* Specify the target we are exporting */
2884 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
2886 args
.compr
= 0; /* COMP flag */
2887 args
.out
[0] = base
->undef
; /* R, depth */
2888 args
.out
[1] = base
->undef
; /* G, stencil test value[0:7], stencil op value[8:15] */
2889 args
.out
[2] = base
->undef
; /* B, sample mask */
2890 args
.out
[3] = base
->undef
; /* A, alpha to mask */
2892 if (format
== V_028710_SPI_SHADER_UINT16_ABGR
) {
2894 args
.compr
= 1; /* COMPR flag */
2897 /* Stencil should be in X[23:16]. */
2898 stencil
= bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, stencil
);
2899 stencil
= LLVMBuildShl(ctx
->gallivm
.builder
, stencil
,
2900 LLVMConstInt(ctx
->i32
, 16, 0), "");
2901 args
.out
[0] = bitcast(bld_base
, TGSI_TYPE_FLOAT
, stencil
);
2905 /* SampleMask should be in Y[15:0]. */
2906 args
.out
[1] = samplemask
;
2911 args
.out
[0] = depth
;
2915 args
.out
[1] = stencil
;
2919 args
.out
[2] = samplemask
;
2924 /* SI (except OLAND and HAINAN) has a bug that it only looks
2925 * at the X writemask component. */
2926 if (ctx
->screen
->b
.chip_class
== SI
&&
2927 ctx
->screen
->b
.family
!= CHIP_OLAND
&&
2928 ctx
->screen
->b
.family
!= CHIP_HAINAN
)
2931 /* Specify which components to enable */
2932 args
.enabled_channels
= mask
;
2934 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
2937 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
2938 LLVMValueRef
*color
, unsigned index
,
2939 unsigned samplemask_param
,
2940 bool is_last
, struct si_ps_exports
*exp
)
2942 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2943 struct lp_build_context
*base
= &bld_base
->base
;
2947 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
2948 for (i
= 0; i
< 4; i
++)
2949 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
2952 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
2953 color
[3] = base
->one
;
2957 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
2958 si_alpha_test(bld_base
, color
[3]);
2960 /* Line & polygon smoothing */
2961 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
2962 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
2965 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
2966 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
2967 struct ac_export_args args
[8];
2970 /* Get the export arguments, also find out what the last one is. */
2971 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
2972 si_llvm_init_export_args(bld_base
, color
,
2973 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
2974 if (args
[c
].enabled_channels
)
2978 /* Emit all exports. */
2979 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
2980 if (is_last
&& last
== c
) {
2981 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
2982 args
[c
].done
= 1; /* DONE bit */
2983 } else if (!args
[c
].enabled_channels
)
2984 continue; /* unnecessary NULL export */
2986 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
2989 struct ac_export_args args
;
2992 si_llvm_init_export_args(bld_base
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
2995 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
2996 args
.done
= 1; /* DONE bit */
2997 } else if (!args
.enabled_channels
)
2998 return; /* unnecessary NULL export */
3000 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3004 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3005 struct si_ps_exports
*exp
)
3007 for (unsigned i
= 0; i
< exp
->num
; i
++)
3008 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3011 static void si_export_null(struct lp_build_tgsi_context
*bld_base
)
3013 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3014 struct lp_build_context
*base
= &bld_base
->base
;
3015 struct ac_export_args args
;
3017 args
.enabled_channels
= 0x0; /* enabled channels */
3018 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3019 args
.done
= 1; /* DONE bit */
3020 args
.target
= V_008DFC_SQ_EXP_NULL
;
3021 args
.compr
= 0; /* COMPR flag (0 = 32-bit export) */
3022 args
.out
[0] = base
->undef
; /* R */
3023 args
.out
[1] = base
->undef
; /* G */
3024 args
.out
[2] = base
->undef
; /* B */
3025 args
.out
[3] = base
->undef
; /* A */
3027 ac_build_export(&ctx
->ac
, &args
);
3031 * Return PS outputs in this order:
3033 * v[0:3] = color0.xyzw
3034 * v[4:7] = color1.xyzw
3039 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3041 * The alpha-ref SGPR is returned via its original location.
3043 static void si_llvm_return_fs_outputs(struct lp_build_tgsi_context
*bld_base
)
3045 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3046 struct si_shader
*shader
= ctx
->shader
;
3047 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3048 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3049 unsigned i
, j
, first_vgpr
, vgpr
;
3051 LLVMValueRef color
[8][4] = {};
3052 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3055 /* Read the output values. */
3056 for (i
= 0; i
< info
->num_outputs
; i
++) {
3057 unsigned semantic_name
= info
->output_semantic_name
[i
];
3058 unsigned semantic_index
= info
->output_semantic_index
[i
];
3060 switch (semantic_name
) {
3061 case TGSI_SEMANTIC_COLOR
:
3062 assert(semantic_index
< 8);
3063 for (j
= 0; j
< 4; j
++) {
3064 LLVMValueRef ptr
= ctx
->outputs
[i
][j
];
3065 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3066 color
[semantic_index
][j
] = result
;
3069 case TGSI_SEMANTIC_POSITION
:
3070 depth
= LLVMBuildLoad(builder
,
3071 ctx
->outputs
[i
][2], "");
3073 case TGSI_SEMANTIC_STENCIL
:
3074 stencil
= LLVMBuildLoad(builder
,
3075 ctx
->outputs
[i
][1], "");
3077 case TGSI_SEMANTIC_SAMPLEMASK
:
3078 samplemask
= LLVMBuildLoad(builder
,
3079 ctx
->outputs
[i
][0], "");
3082 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3087 /* Fill the return structure. */
3088 ret
= ctx
->return_value
;
3091 ret
= LLVMBuildInsertValue(builder
, ret
,
3092 bitcast(bld_base
, TGSI_TYPE_SIGNED
,
3093 LLVMGetParam(ctx
->main_fn
,
3094 SI_PARAM_ALPHA_REF
)),
3095 SI_SGPR_ALPHA_REF
, "");
3098 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3099 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3103 for (j
= 0; j
< 4; j
++)
3104 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3107 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3109 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3111 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3113 /* Add the input sample mask for smoothing at the end. */
3114 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3115 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3116 ret
= LLVMBuildInsertValue(builder
, ret
,
3117 LLVMGetParam(ctx
->main_fn
,
3118 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3120 ctx
->return_value
= ret
;
3124 * Given a v8i32 resource descriptor for a buffer, extract the size of the
3125 * buffer in number of elements and return it as an i32.
3127 static LLVMValueRef
get_buffer_size(
3128 struct lp_build_tgsi_context
*bld_base
,
3129 LLVMValueRef descriptor
)
3131 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3132 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3133 LLVMBuilderRef builder
= gallivm
->builder
;
3135 LLVMBuildExtractElement(builder
, descriptor
,
3136 LLVMConstInt(ctx
->i32
, 2, 0), "");
3138 if (ctx
->screen
->b
.chip_class
== VI
) {
3139 /* On VI, the descriptor contains the size in bytes,
3140 * but TXQ must return the size in elements.
3141 * The stride is always non-zero for resources using TXQ.
3143 LLVMValueRef stride
=
3144 LLVMBuildExtractElement(builder
, descriptor
,
3146 stride
= LLVMBuildLShr(builder
, stride
,
3147 LLVMConstInt(ctx
->i32
, 16, 0), "");
3148 stride
= LLVMBuildAnd(builder
, stride
,
3149 LLVMConstInt(ctx
->i32
, 0x3FFF, 0), "");
3151 size
= LLVMBuildUDiv(builder
, size
, stride
, "");
3157 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
3158 struct lp_build_tgsi_context
*bld_base
,
3159 struct lp_build_emit_data
*emit_data
);
3161 /* Prevent optimizations (at least of memory accesses) across the current
3162 * point in the program by emitting empty inline assembly that is marked as
3163 * having side effects.
3165 * Optionally, a value can be passed through the inline assembly to prevent
3166 * LLVM from hoisting calls to ReadNone functions.
3168 static void emit_optimization_barrier(struct si_shader_context
*ctx
,
3169 LLVMValueRef
*pvgpr
)
3171 static int counter
= 0;
3173 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3176 snprintf(code
, sizeof(code
), "; %d", p_atomic_inc_return(&counter
));
3179 LLVMTypeRef ftype
= LLVMFunctionType(ctx
->voidt
, NULL
, 0, false);
3180 LLVMValueRef inlineasm
= LLVMConstInlineAsm(ftype
, code
, "", true, false);
3181 LLVMBuildCall(builder
, inlineasm
, NULL
, 0, "");
3183 LLVMTypeRef ftype
= LLVMFunctionType(ctx
->i32
, &ctx
->i32
, 1, false);
3184 LLVMValueRef inlineasm
= LLVMConstInlineAsm(ftype
, code
, "=v,0", true, false);
3185 LLVMValueRef vgpr
= *pvgpr
;
3186 LLVMTypeRef vgpr_type
= LLVMTypeOf(vgpr
);
3187 unsigned vgpr_size
= llvm_get_type_size(vgpr_type
);
3190 assert(vgpr_size
% 4 == 0);
3192 vgpr
= LLVMBuildBitCast(builder
, vgpr
, LLVMVectorType(ctx
->i32
, vgpr_size
/ 4), "");
3193 vgpr0
= LLVMBuildExtractElement(builder
, vgpr
, ctx
->i32_0
, "");
3194 vgpr0
= LLVMBuildCall(builder
, inlineasm
, &vgpr0
, 1, "");
3195 vgpr
= LLVMBuildInsertElement(builder
, vgpr
, vgpr0
, ctx
->i32_0
, "");
3196 vgpr
= LLVMBuildBitCast(builder
, vgpr
, vgpr_type
, "");
3202 /* Combine these with & instead of |. */
3203 #define NOOP_WAITCNT 0xf7f
3204 #define LGKM_CNT 0x07f
3205 #define VM_CNT 0xf70
3207 static void emit_waitcnt(struct si_shader_context
*ctx
, unsigned simm16
)
3209 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3210 LLVMBuilderRef builder
= gallivm
->builder
;
3211 LLVMValueRef args
[1] = {
3212 LLVMConstInt(ctx
->i32
, simm16
, 0)
3214 lp_build_intrinsic(builder
, "llvm.amdgcn.s.waitcnt",
3215 ctx
->voidt
, args
, 1, 0);
3218 static void membar_emit(
3219 const struct lp_build_tgsi_action
*action
,
3220 struct lp_build_tgsi_context
*bld_base
,
3221 struct lp_build_emit_data
*emit_data
)
3223 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3224 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3225 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3226 unsigned waitcnt
= NOOP_WAITCNT
;
3228 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3229 waitcnt
&= VM_CNT
& LGKM_CNT
;
3231 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3232 TGSI_MEMBAR_SHADER_BUFFER
|
3233 TGSI_MEMBAR_SHADER_IMAGE
))
3236 if (flags
& TGSI_MEMBAR_SHARED
)
3237 waitcnt
&= LGKM_CNT
;
3239 if (waitcnt
!= NOOP_WAITCNT
)
3240 emit_waitcnt(ctx
, waitcnt
);
3243 static void clock_emit(
3244 const struct lp_build_tgsi_action
*action
,
3245 struct lp_build_tgsi_context
*bld_base
,
3246 struct lp_build_emit_data
*emit_data
)
3248 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3249 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3252 tmp
= lp_build_intrinsic(gallivm
->builder
, "llvm.readcyclecounter",
3253 ctx
->i64
, NULL
, 0, 0);
3254 tmp
= LLVMBuildBitCast(gallivm
->builder
, tmp
, ctx
->v2i32
, "");
3256 emit_data
->output
[0] =
3257 LLVMBuildExtractElement(gallivm
->builder
, tmp
, ctx
->i32_0
, "");
3258 emit_data
->output
[1] =
3259 LLVMBuildExtractElement(gallivm
->builder
, tmp
, ctx
->i32_1
, "");
3263 shader_buffer_fetch_rsrc(struct si_shader_context
*ctx
,
3264 const struct tgsi_full_src_register
*reg
)
3267 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3268 SI_PARAM_SHADER_BUFFERS
);
3270 if (!reg
->Register
.Indirect
)
3271 index
= LLVMConstInt(ctx
->i32
, reg
->Register
.Index
, 0);
3273 index
= get_bounded_indirect_index(ctx
, ®
->Indirect
,
3274 reg
->Register
.Index
,
3275 SI_NUM_SHADER_BUFFERS
);
3277 return ac_build_indexed_load_const(&ctx
->ac
, rsrc_ptr
, index
);
3280 static bool tgsi_is_array_sampler(unsigned target
)
3282 return target
== TGSI_TEXTURE_1D_ARRAY
||
3283 target
== TGSI_TEXTURE_SHADOW1D_ARRAY
||
3284 target
== TGSI_TEXTURE_2D_ARRAY
||
3285 target
== TGSI_TEXTURE_SHADOW2D_ARRAY
||
3286 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3287 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
||
3288 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3291 static bool tgsi_is_array_image(unsigned target
)
3293 return target
== TGSI_TEXTURE_3D
||
3294 target
== TGSI_TEXTURE_CUBE
||
3295 target
== TGSI_TEXTURE_1D_ARRAY
||
3296 target
== TGSI_TEXTURE_2D_ARRAY
||
3297 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3298 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3302 * Given a 256-bit resource descriptor, force the DCC enable bit to off.
3304 * At least on Tonga, executing image stores on images with DCC enabled and
3305 * non-trivial can eventually lead to lockups. This can occur when an
3306 * application binds an image as read-only but then uses a shader that writes
3307 * to it. The OpenGL spec allows almost arbitrarily bad behavior (including
3308 * program termination) in this case, but it doesn't cost much to be a bit
3309 * nicer: disabling DCC in the shader still leads to undefined results but
3310 * avoids the lockup.
3312 static LLVMValueRef
force_dcc_off(struct si_shader_context
*ctx
,
3315 if (ctx
->screen
->b
.chip_class
<= CIK
) {
3318 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3319 LLVMValueRef i32_6
= LLVMConstInt(ctx
->i32
, 6, 0);
3320 LLVMValueRef i32_C
= LLVMConstInt(ctx
->i32
, C_008F28_COMPRESSION_EN
, 0);
3323 tmp
= LLVMBuildExtractElement(builder
, rsrc
, i32_6
, "");
3324 tmp
= LLVMBuildAnd(builder
, tmp
, i32_C
, "");
3325 return LLVMBuildInsertElement(builder
, rsrc
, tmp
, i32_6
, "");
3329 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
3331 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
3335 static LLVMValueRef
load_image_desc(struct si_shader_context
*ctx
,
3336 LLVMValueRef list
, LLVMValueRef index
,
3339 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3341 if (target
== TGSI_TEXTURE_BUFFER
) {
3342 index
= LLVMBuildMul(builder
, index
,
3343 LLVMConstInt(ctx
->i32
, 2, 0), "");
3344 index
= LLVMBuildAdd(builder
, index
,
3346 list
= LLVMBuildPointerCast(builder
, list
,
3347 const_array(ctx
->v4i32
, 0), "");
3350 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
3354 * Load the resource descriptor for \p image.
3358 struct lp_build_tgsi_context
*bld_base
,
3359 const struct tgsi_full_src_register
*image
,
3360 bool is_store
, unsigned target
,
3363 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3364 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3367 bool dcc_off
= is_store
;
3369 assert(image
->Register
.File
== TGSI_FILE_IMAGE
);
3371 if (!image
->Register
.Indirect
) {
3372 const struct tgsi_shader_info
*info
= bld_base
->info
;
3373 unsigned images_writemask
= info
->images_store
|
3374 info
->images_atomic
;
3376 index
= LLVMConstInt(ctx
->i32
, image
->Register
.Index
, 0);
3378 if (images_writemask
& (1 << image
->Register
.Index
))
3381 /* From the GL_ARB_shader_image_load_store extension spec:
3383 * If a shader performs an image load, store, or atomic
3384 * operation using an image variable declared as an array,
3385 * and if the index used to select an individual element is
3386 * negative or greater than or equal to the size of the
3387 * array, the results of the operation are undefined but may
3388 * not lead to termination.
3390 index
= get_bounded_indirect_index(ctx
, &image
->Indirect
,
3391 image
->Register
.Index
,
3395 *rsrc
= load_image_desc(ctx
, rsrc_ptr
, index
, target
);
3396 if (dcc_off
&& target
!= TGSI_TEXTURE_BUFFER
)
3397 *rsrc
= force_dcc_off(ctx
, *rsrc
);
3400 static LLVMValueRef
image_fetch_coords(
3401 struct lp_build_tgsi_context
*bld_base
,
3402 const struct tgsi_full_instruction
*inst
,
3405 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3406 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3407 LLVMBuilderRef builder
= gallivm
->builder
;
3408 unsigned target
= inst
->Memory
.Texture
;
3409 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
3410 LLVMValueRef coords
[4];
3414 for (chan
= 0; chan
< num_coords
; ++chan
) {
3415 tmp
= lp_build_emit_fetch(bld_base
, inst
, src
, chan
);
3416 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
3420 /* 1D textures are allocated and used as 2D on GFX9. */
3421 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
3422 if (target
== TGSI_TEXTURE_1D
) {
3423 coords
[1] = ctx
->i32_0
;
3425 } else if (target
== TGSI_TEXTURE_1D_ARRAY
) {
3426 coords
[2] = coords
[1];
3427 coords
[1] = ctx
->i32_0
;
3431 if (num_coords
== 1)
3434 if (num_coords
== 3) {
3435 /* LLVM has difficulties lowering 3-element vectors. */
3436 coords
[3] = bld_base
->uint_bld
.undef
;
3440 return lp_build_gather_values(gallivm
, coords
, num_coords
);
3444 * Append the extra mode bits that are used by image load and store.
3446 static void image_append_args(
3447 struct si_shader_context
*ctx
,
3448 struct lp_build_emit_data
* emit_data
,
3453 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3454 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3455 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3456 LLVMValueRef r128
= i1false
;
3457 LLVMValueRef da
= tgsi_is_array_image(target
) ? i1true
: i1false
;
3460 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3462 LLVMValueRef slc
= i1false
;
3463 LLVMValueRef lwe
= i1false
;
3465 if (atomic
|| (HAVE_LLVM
<= 0x0309)) {
3466 emit_data
->args
[emit_data
->arg_count
++] = r128
;
3467 emit_data
->args
[emit_data
->arg_count
++] = da
;
3469 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3471 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3475 /* HAVE_LLVM >= 0x0400 */
3476 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3477 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3478 emit_data
->args
[emit_data
->arg_count
++] = lwe
;
3479 emit_data
->args
[emit_data
->arg_count
++] = da
;
3483 * Append the resource and indexing arguments for buffer intrinsics.
3485 * \param rsrc the v4i32 buffer resource
3486 * \param index index into the buffer (stride-based)
3487 * \param offset byte offset into the buffer
3489 static void buffer_append_args(
3490 struct si_shader_context
*ctx
,
3491 struct lp_build_emit_data
*emit_data
,
3494 LLVMValueRef offset
,
3498 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3499 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3500 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3502 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
3503 emit_data
->args
[emit_data
->arg_count
++] = index
; /* vindex */
3504 emit_data
->args
[emit_data
->arg_count
++] = offset
; /* voffset */
3506 emit_data
->args
[emit_data
->arg_count
++] =
3508 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3509 i1true
: i1false
; /* glc */
3511 emit_data
->args
[emit_data
->arg_count
++] = i1false
; /* slc */
3514 static void load_fetch_args(
3515 struct lp_build_tgsi_context
* bld_base
,
3516 struct lp_build_emit_data
* emit_data
)
3518 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3519 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3520 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3521 unsigned target
= inst
->Memory
.Texture
;
3524 emit_data
->dst_type
= ctx
->v4f32
;
3526 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3527 LLVMBuilderRef builder
= gallivm
->builder
;
3528 LLVMValueRef offset
;
3531 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
3533 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
3534 offset
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
3536 buffer_append_args(ctx
, emit_data
, rsrc
, ctx
->i32_0
,
3537 offset
, false, false);
3538 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3539 LLVMValueRef coords
;
3541 image_fetch_rsrc(bld_base
, &inst
->Src
[0], false, target
, &rsrc
);
3542 coords
= image_fetch_coords(bld_base
, inst
, 1);
3544 if (target
== TGSI_TEXTURE_BUFFER
) {
3545 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3546 ctx
->i32_0
, false, false);
3548 emit_data
->args
[0] = coords
;
3549 emit_data
->args
[1] = rsrc
;
3550 emit_data
->args
[2] = LLVMConstInt(ctx
->i32
, 15, 0); /* dmask */
3551 emit_data
->arg_count
= 3;
3553 image_append_args(ctx
, emit_data
, target
, false, false);
3558 static unsigned get_load_intr_attribs(bool readonly_memory
)
3560 /* READNONE means writes can't affect it, while READONLY means that
3561 * writes can affect it. */
3562 return readonly_memory
&& HAVE_LLVM
>= 0x0400 ?
3563 LP_FUNC_ATTR_READNONE
:
3564 LP_FUNC_ATTR_READONLY
;
3567 static unsigned get_store_intr_attribs(bool writeonly_memory
)
3569 return writeonly_memory
&& HAVE_LLVM
>= 0x0400 ?
3570 LP_FUNC_ATTR_INACCESSIBLE_MEM_ONLY
:
3571 LP_FUNC_ATTR_WRITEONLY
;
3574 static void load_emit_buffer(struct si_shader_context
*ctx
,
3575 struct lp_build_emit_data
*emit_data
,
3576 bool readonly_memory
)
3578 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3579 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3580 LLVMBuilderRef builder
= gallivm
->builder
;
3581 uint writemask
= inst
->Dst
[0].Register
.WriteMask
;
3582 uint count
= util_last_bit(writemask
);
3583 const char *intrinsic_name
;
3584 LLVMTypeRef dst_type
;
3588 intrinsic_name
= "llvm.amdgcn.buffer.load.f32";
3589 dst_type
= ctx
->f32
;
3592 intrinsic_name
= "llvm.amdgcn.buffer.load.v2f32";
3593 dst_type
= LLVMVectorType(ctx
->f32
, 2);
3596 intrinsic_name
= "llvm.amdgcn.buffer.load.v4f32";
3597 dst_type
= ctx
->v4f32
;
3601 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
3602 builder
, intrinsic_name
, dst_type
,
3603 emit_data
->args
, emit_data
->arg_count
,
3604 get_load_intr_attribs(readonly_memory
));
3607 static LLVMValueRef
get_memory_ptr(struct si_shader_context
*ctx
,
3608 const struct tgsi_full_instruction
*inst
,
3609 LLVMTypeRef type
, int arg
)
3611 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3612 LLVMBuilderRef builder
= gallivm
->builder
;
3613 LLVMValueRef offset
, ptr
;
3616 offset
= lp_build_emit_fetch(&ctx
->bld_base
, inst
, arg
, 0);
3617 offset
= LLVMBuildBitCast(builder
, offset
, ctx
->i32
, "");
3619 ptr
= ctx
->shared_memory
;
3620 ptr
= LLVMBuildGEP(builder
, ptr
, &offset
, 1, "");
3621 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
3622 ptr
= LLVMBuildBitCast(builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
3627 static void load_emit_memory(
3628 struct si_shader_context
*ctx
,
3629 struct lp_build_emit_data
*emit_data
)
3631 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3632 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3633 LLVMBuilderRef builder
= gallivm
->builder
;
3634 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3635 LLVMValueRef channels
[4], ptr
, derived_ptr
, index
;
3638 ptr
= get_memory_ptr(ctx
, inst
, ctx
->f32
, 1);
3640 for (chan
= 0; chan
< 4; ++chan
) {
3641 if (!(writemask
& (1 << chan
))) {
3642 channels
[chan
] = LLVMGetUndef(ctx
->f32
);
3646 index
= LLVMConstInt(ctx
->i32
, chan
, 0);
3647 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3648 channels
[chan
] = LLVMBuildLoad(builder
, derived_ptr
, "");
3650 emit_data
->output
[emit_data
->chan
] = lp_build_gather_values(gallivm
, channels
, 4);
3654 * Return true if the memory accessed by a LOAD or STORE instruction is
3655 * read-only or write-only, respectively.
3657 * \param shader_buffers_reverse_access_mask
3658 * For LOAD, set this to (store | atomic) slot usage in the shader.
3659 * For STORE, set this to (load | atomic) slot usage in the shader.
3660 * \param images_reverse_access_mask Same as above, but for images.
3662 static bool is_oneway_access_only(const struct tgsi_full_instruction
*inst
,
3663 const struct tgsi_shader_info
*info
,
3664 unsigned shader_buffers_reverse_access_mask
,
3665 unsigned images_reverse_access_mask
)
3667 /* RESTRICT means NOALIAS.
3668 * If there are no writes, we can assume the accessed memory is read-only.
3669 * If there are no reads, we can assume the accessed memory is write-only.
3671 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_RESTRICT
) {
3672 unsigned reverse_access_mask
;
3674 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3675 reverse_access_mask
= shader_buffers_reverse_access_mask
;
3676 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
3677 reverse_access_mask
= info
->images_buffers
&
3678 images_reverse_access_mask
;
3680 reverse_access_mask
= ~info
->images_buffers
&
3681 images_reverse_access_mask
;
3684 if (inst
->Src
[0].Register
.Indirect
) {
3685 if (!reverse_access_mask
)
3688 if (!(reverse_access_mask
&
3689 (1u << inst
->Src
[0].Register
.Index
)))
3694 /* If there are no buffer writes (for both shader buffers & image
3695 * buffers), it implies that buffer memory is read-only.
3696 * If there are no buffer reads (for both shader buffers & image
3697 * buffers), it implies that buffer memory is write-only.
3699 * Same for the case when there are no writes/reads for non-buffer
3702 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
||
3703 (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
&&
3704 inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
)) {
3705 if (!shader_buffers_reverse_access_mask
&&
3706 !(info
->images_buffers
& images_reverse_access_mask
))
3709 if (!(~info
->images_buffers
& images_reverse_access_mask
))
3715 static void load_emit(
3716 const struct lp_build_tgsi_action
*action
,
3717 struct lp_build_tgsi_context
*bld_base
,
3718 struct lp_build_emit_data
*emit_data
)
3720 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3721 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3722 LLVMBuilderRef builder
= gallivm
->builder
;
3723 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3724 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3725 char intrinsic_name
[64];
3726 bool readonly_memory
= false;
3728 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3729 load_emit_memory(ctx
, emit_data
);
3733 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
3734 emit_waitcnt(ctx
, VM_CNT
);
3736 readonly_memory
= !(inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
) &&
3737 is_oneway_access_only(inst
, info
,
3738 info
->shader_buffers_store
|
3739 info
->shader_buffers_atomic
,
3740 info
->images_store
|
3741 info
->images_atomic
);
3743 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3744 load_emit_buffer(ctx
, emit_data
, readonly_memory
);
3748 if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
3749 emit_data
->output
[emit_data
->chan
] =
3751 builder
, "llvm.amdgcn.buffer.load.format.v4f32", emit_data
->dst_type
,
3752 emit_data
->args
, emit_data
->arg_count
,
3753 get_load_intr_attribs(readonly_memory
));
3755 ac_get_image_intr_name("llvm.amdgcn.image.load",
3756 emit_data
->dst_type
, /* vdata */
3757 LLVMTypeOf(emit_data
->args
[0]), /* coords */
3758 LLVMTypeOf(emit_data
->args
[1]), /* rsrc */
3759 intrinsic_name
, sizeof(intrinsic_name
));
3761 emit_data
->output
[emit_data
->chan
] =
3763 builder
, intrinsic_name
, emit_data
->dst_type
,
3764 emit_data
->args
, emit_data
->arg_count
,
3765 get_load_intr_attribs(readonly_memory
));
3769 static void store_fetch_args(
3770 struct lp_build_tgsi_context
* bld_base
,
3771 struct lp_build_emit_data
* emit_data
)
3773 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3774 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3775 LLVMBuilderRef builder
= gallivm
->builder
;
3776 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3777 struct tgsi_full_src_register memory
;
3778 LLVMValueRef chans
[4];
3783 emit_data
->dst_type
= LLVMVoidTypeInContext(gallivm
->context
);
3785 for (chan
= 0; chan
< 4; ++chan
) {
3786 chans
[chan
] = lp_build_emit_fetch(bld_base
, inst
, 1, chan
);
3788 data
= lp_build_gather_values(gallivm
, chans
, 4);
3790 emit_data
->args
[emit_data
->arg_count
++] = data
;
3792 memory
= tgsi_full_src_register_from_dst(&inst
->Dst
[0]);
3794 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3795 LLVMValueRef offset
;
3798 rsrc
= shader_buffer_fetch_rsrc(ctx
, &memory
);
3800 tmp
= lp_build_emit_fetch(bld_base
, inst
, 0, 0);
3801 offset
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
3803 buffer_append_args(ctx
, emit_data
, rsrc
, ctx
->i32_0
,
3804 offset
, false, false);
3805 } else if (inst
->Dst
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3806 unsigned target
= inst
->Memory
.Texture
;
3807 LLVMValueRef coords
;
3809 /* 8bit/16bit TC L1 write corruption bug on SI.
3810 * All store opcodes not aligned to a dword are affected.
3812 * The only way to get unaligned stores in radeonsi is through
3815 bool force_glc
= ctx
->screen
->b
.chip_class
== SI
;
3817 coords
= image_fetch_coords(bld_base
, inst
, 0);
3819 if (target
== TGSI_TEXTURE_BUFFER
) {
3820 image_fetch_rsrc(bld_base
, &memory
, true, target
, &rsrc
);
3821 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3822 ctx
->i32_0
, false, force_glc
);
3824 emit_data
->args
[1] = coords
;
3825 image_fetch_rsrc(bld_base
, &memory
, true, target
,
3826 &emit_data
->args
[2]);
3827 emit_data
->args
[3] = LLVMConstInt(ctx
->i32
, 15, 0); /* dmask */
3828 emit_data
->arg_count
= 4;
3830 image_append_args(ctx
, emit_data
, target
, false, force_glc
);
3835 static void store_emit_buffer(
3836 struct si_shader_context
*ctx
,
3837 struct lp_build_emit_data
*emit_data
,
3838 bool writeonly_memory
)
3840 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3841 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3842 LLVMBuilderRef builder
= gallivm
->builder
;
3843 LLVMValueRef base_data
= emit_data
->args
[0];
3844 LLVMValueRef base_offset
= emit_data
->args
[3];
3845 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3849 const char *intrinsic_name
;
3851 LLVMValueRef offset
;
3854 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
3856 /* Due to an LLVM limitation, split 3-element writes
3857 * into a 2-element and a 1-element write. */
3859 writemask
|= 1 << (start
+ 2);
3865 intrinsic_name
= "llvm.amdgcn.buffer.store.v4f32";
3866 } else if (count
== 2) {
3867 LLVMTypeRef v2f32
= LLVMVectorType(ctx
->f32
, 2);
3869 tmp
= LLVMBuildExtractElement(
3871 LLVMConstInt(ctx
->i32
, start
, 0), "");
3872 data
= LLVMBuildInsertElement(
3873 builder
, LLVMGetUndef(v2f32
), tmp
,
3876 tmp
= LLVMBuildExtractElement(
3878 LLVMConstInt(ctx
->i32
, start
+ 1, 0), "");
3879 data
= LLVMBuildInsertElement(
3880 builder
, data
, tmp
, ctx
->i32_1
, "");
3882 intrinsic_name
= "llvm.amdgcn.buffer.store.v2f32";
3885 data
= LLVMBuildExtractElement(
3887 LLVMConstInt(ctx
->i32
, start
, 0), "");
3888 intrinsic_name
= "llvm.amdgcn.buffer.store.f32";
3891 offset
= base_offset
;
3893 offset
= LLVMBuildAdd(
3895 LLVMConstInt(ctx
->i32
, start
* 4, 0), "");
3898 emit_data
->args
[0] = data
;
3899 emit_data
->args
[3] = offset
;
3902 builder
, intrinsic_name
, emit_data
->dst_type
,
3903 emit_data
->args
, emit_data
->arg_count
,
3904 get_store_intr_attribs(writeonly_memory
));
3908 static void store_emit_memory(
3909 struct si_shader_context
*ctx
,
3910 struct lp_build_emit_data
*emit_data
)
3912 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3913 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3914 LLVMBuilderRef builder
= gallivm
->builder
;
3915 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3916 LLVMValueRef ptr
, derived_ptr
, data
, index
;
3919 ptr
= get_memory_ptr(ctx
, inst
, ctx
->f32
, 0);
3921 for (chan
= 0; chan
< 4; ++chan
) {
3922 if (!(writemask
& (1 << chan
))) {
3925 data
= lp_build_emit_fetch(&ctx
->bld_base
, inst
, 1, chan
);
3926 index
= LLVMConstInt(ctx
->i32
, chan
, 0);
3927 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3928 LLVMBuildStore(builder
, data
, derived_ptr
);
3932 static void store_emit(
3933 const struct lp_build_tgsi_action
*action
,
3934 struct lp_build_tgsi_context
*bld_base
,
3935 struct lp_build_emit_data
*emit_data
)
3937 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3938 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3939 LLVMBuilderRef builder
= gallivm
->builder
;
3940 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3941 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3942 unsigned target
= inst
->Memory
.Texture
;
3943 char intrinsic_name
[64];
3944 bool writeonly_memory
= false;
3946 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3947 store_emit_memory(ctx
, emit_data
);
3951 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
3952 emit_waitcnt(ctx
, VM_CNT
);
3954 writeonly_memory
= is_oneway_access_only(inst
, info
,
3955 info
->shader_buffers_load
|
3956 info
->shader_buffers_atomic
,
3958 info
->images_atomic
);
3960 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3961 store_emit_buffer(ctx
, emit_data
, writeonly_memory
);
3965 if (target
== TGSI_TEXTURE_BUFFER
) {
3966 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
3967 builder
, "llvm.amdgcn.buffer.store.format.v4f32",
3968 emit_data
->dst_type
, emit_data
->args
,
3969 emit_data
->arg_count
,
3970 get_store_intr_attribs(writeonly_memory
));
3972 ac_get_image_intr_name("llvm.amdgcn.image.store",
3973 LLVMTypeOf(emit_data
->args
[0]), /* vdata */
3974 LLVMTypeOf(emit_data
->args
[1]), /* coords */
3975 LLVMTypeOf(emit_data
->args
[2]), /* rsrc */
3976 intrinsic_name
, sizeof(intrinsic_name
));
3978 emit_data
->output
[emit_data
->chan
] =
3980 builder
, intrinsic_name
, emit_data
->dst_type
,
3981 emit_data
->args
, emit_data
->arg_count
,
3982 get_store_intr_attribs(writeonly_memory
));
3986 static void atomic_fetch_args(
3987 struct lp_build_tgsi_context
* bld_base
,
3988 struct lp_build_emit_data
* emit_data
)
3990 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3991 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3992 LLVMBuilderRef builder
= gallivm
->builder
;
3993 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3994 LLVMValueRef data1
, data2
;
3998 emit_data
->dst_type
= ctx
->f32
;
4000 tmp
= lp_build_emit_fetch(bld_base
, inst
, 2, 0);
4001 data1
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4003 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
4004 tmp
= lp_build_emit_fetch(bld_base
, inst
, 3, 0);
4005 data2
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4008 /* llvm.amdgcn.image/buffer.atomic.cmpswap reflect the hardware order
4009 * of arguments, which is reversed relative to TGSI (and GLSL)
4011 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
4012 emit_data
->args
[emit_data
->arg_count
++] = data2
;
4013 emit_data
->args
[emit_data
->arg_count
++] = data1
;
4015 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4016 LLVMValueRef offset
;
4018 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
4020 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
4021 offset
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4023 buffer_append_args(ctx
, emit_data
, rsrc
, ctx
->i32_0
,
4024 offset
, true, false);
4025 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
4026 unsigned target
= inst
->Memory
.Texture
;
4027 LLVMValueRef coords
;
4029 image_fetch_rsrc(bld_base
, &inst
->Src
[0], true, target
, &rsrc
);
4030 coords
= image_fetch_coords(bld_base
, inst
, 1);
4032 if (target
== TGSI_TEXTURE_BUFFER
) {
4033 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
4034 ctx
->i32_0
, true, false);
4036 emit_data
->args
[emit_data
->arg_count
++] = coords
;
4037 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
4039 image_append_args(ctx
, emit_data
, target
, true, false);
4044 static void atomic_emit_memory(struct si_shader_context
*ctx
,
4045 struct lp_build_emit_data
*emit_data
) {
4046 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4047 LLVMBuilderRef builder
= gallivm
->builder
;
4048 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4049 LLVMValueRef ptr
, result
, arg
;
4051 ptr
= get_memory_ptr(ctx
, inst
, ctx
->i32
, 1);
4053 arg
= lp_build_emit_fetch(&ctx
->bld_base
, inst
, 2, 0);
4054 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
4056 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
4057 LLVMValueRef new_data
;
4058 new_data
= lp_build_emit_fetch(&ctx
->bld_base
,
4061 new_data
= LLVMBuildBitCast(builder
, new_data
, ctx
->i32
, "");
4063 #if HAVE_LLVM >= 0x309
4064 result
= LLVMBuildAtomicCmpXchg(builder
, ptr
, arg
, new_data
,
4065 LLVMAtomicOrderingSequentiallyConsistent
,
4066 LLVMAtomicOrderingSequentiallyConsistent
,
4070 result
= LLVMBuildExtractValue(builder
, result
, 0, "");
4072 LLVMAtomicRMWBinOp op
;
4074 switch(inst
->Instruction
.Opcode
) {
4075 case TGSI_OPCODE_ATOMUADD
:
4076 op
= LLVMAtomicRMWBinOpAdd
;
4078 case TGSI_OPCODE_ATOMXCHG
:
4079 op
= LLVMAtomicRMWBinOpXchg
;
4081 case TGSI_OPCODE_ATOMAND
:
4082 op
= LLVMAtomicRMWBinOpAnd
;
4084 case TGSI_OPCODE_ATOMOR
:
4085 op
= LLVMAtomicRMWBinOpOr
;
4087 case TGSI_OPCODE_ATOMXOR
:
4088 op
= LLVMAtomicRMWBinOpXor
;
4090 case TGSI_OPCODE_ATOMUMIN
:
4091 op
= LLVMAtomicRMWBinOpUMin
;
4093 case TGSI_OPCODE_ATOMUMAX
:
4094 op
= LLVMAtomicRMWBinOpUMax
;
4096 case TGSI_OPCODE_ATOMIMIN
:
4097 op
= LLVMAtomicRMWBinOpMin
;
4099 case TGSI_OPCODE_ATOMIMAX
:
4100 op
= LLVMAtomicRMWBinOpMax
;
4103 unreachable("unknown atomic opcode");
4106 result
= LLVMBuildAtomicRMW(builder
, op
, ptr
, arg
,
4107 LLVMAtomicOrderingSequentiallyConsistent
,
4110 emit_data
->output
[emit_data
->chan
] = LLVMBuildBitCast(builder
, result
, emit_data
->dst_type
, "");
4113 static void atomic_emit(
4114 const struct lp_build_tgsi_action
*action
,
4115 struct lp_build_tgsi_context
*bld_base
,
4116 struct lp_build_emit_data
*emit_data
)
4118 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4119 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4120 LLVMBuilderRef builder
= gallivm
->builder
;
4121 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4122 char intrinsic_name
[40];
4125 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
4126 atomic_emit_memory(ctx
, emit_data
);
4130 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
||
4131 inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4132 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
4133 "llvm.amdgcn.buffer.atomic.%s", action
->intr_name
);
4135 LLVMValueRef coords
;
4136 char coords_type
[8];
4138 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
4139 coords
= emit_data
->args
[2];
4141 coords
= emit_data
->args
[1];
4143 ac_build_type_name_for_intr(LLVMTypeOf(coords
), coords_type
, sizeof(coords_type
));
4144 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
4145 "llvm.amdgcn.image.atomic.%s.%s",
4146 action
->intr_name
, coords_type
);
4149 tmp
= lp_build_intrinsic(
4150 builder
, intrinsic_name
, ctx
->i32
,
4151 emit_data
->args
, emit_data
->arg_count
, 0);
4152 emit_data
->output
[emit_data
->chan
] =
4153 LLVMBuildBitCast(builder
, tmp
, ctx
->f32
, "");
4156 static void set_tex_fetch_args(struct si_shader_context
*ctx
,
4157 struct lp_build_emit_data
*emit_data
,
4159 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4160 LLVMValueRef
*param
, unsigned count
,
4163 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4164 struct ac_image_args args
= {};
4166 /* Pad to power of two vector */
4167 while (count
< util_next_power_of_two(count
))
4168 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4171 args
.addr
= lp_build_gather_values(gallivm
, param
, count
);
4173 args
.addr
= param
[0];
4175 args
.resource
= res_ptr
;
4176 args
.sampler
= samp_ptr
;
4178 args
.unorm
= target
== TGSI_TEXTURE_RECT
||
4179 target
== TGSI_TEXTURE_SHADOWRECT
;
4180 args
.da
= tgsi_is_array_sampler(target
);
4182 /* Ugly, but we seem to have no other choice right now. */
4183 STATIC_ASSERT(sizeof(args
) <= sizeof(emit_data
->args
));
4184 memcpy(emit_data
->args
, &args
, sizeof(args
));
4187 static LLVMValueRef
fix_resinfo(struct si_shader_context
*ctx
,
4188 unsigned target
, LLVMValueRef out
)
4190 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4192 /* 1D textures are allocated and used as 2D on GFX9. */
4193 if (ctx
->screen
->b
.chip_class
>= GFX9
&&
4194 (target
== TGSI_TEXTURE_1D_ARRAY
||
4195 target
== TGSI_TEXTURE_SHADOW1D_ARRAY
)) {
4196 LLVMValueRef layers
=
4197 LLVMBuildExtractElement(builder
, out
,
4198 LLVMConstInt(ctx
->i32
, 2, 0), "");
4199 out
= LLVMBuildInsertElement(builder
, out
, layers
,
4203 /* Divide the number of layers by 6 to get the number of cubes. */
4204 if (target
== TGSI_TEXTURE_CUBE_ARRAY
||
4205 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4206 LLVMValueRef imm2
= LLVMConstInt(ctx
->i32
, 2, 0);
4208 LLVMValueRef z
= LLVMBuildExtractElement(builder
, out
, imm2
, "");
4209 z
= LLVMBuildSDiv(builder
, z
, LLVMConstInt(ctx
->i32
, 6, 0), "");
4211 out
= LLVMBuildInsertElement(builder
, out
, z
, imm2
, "");
4216 static void resq_fetch_args(
4217 struct lp_build_tgsi_context
* bld_base
,
4218 struct lp_build_emit_data
* emit_data
)
4220 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4221 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4222 const struct tgsi_full_src_register
*reg
= &inst
->Src
[0];
4224 emit_data
->dst_type
= ctx
->v4i32
;
4226 if (reg
->Register
.File
== TGSI_FILE_BUFFER
) {
4227 emit_data
->args
[0] = shader_buffer_fetch_rsrc(ctx
, reg
);
4228 emit_data
->arg_count
= 1;
4229 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4230 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4231 &emit_data
->args
[0]);
4232 emit_data
->arg_count
= 1;
4234 LLVMValueRef res_ptr
;
4235 unsigned image_target
;
4237 if (inst
->Memory
.Texture
== TGSI_TEXTURE_3D
)
4238 image_target
= TGSI_TEXTURE_2D_ARRAY
;
4240 image_target
= inst
->Memory
.Texture
;
4242 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4244 set_tex_fetch_args(ctx
, emit_data
, image_target
,
4245 res_ptr
, NULL
, &ctx
->i32_0
, 1,
4250 static void resq_emit(
4251 const struct lp_build_tgsi_action
*action
,
4252 struct lp_build_tgsi_context
*bld_base
,
4253 struct lp_build_emit_data
*emit_data
)
4255 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4256 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4257 LLVMBuilderRef builder
= gallivm
->builder
;
4258 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4261 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4262 out
= LLVMBuildExtractElement(builder
, emit_data
->args
[0],
4263 LLVMConstInt(ctx
->i32
, 2, 0), "");
4264 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4265 out
= get_buffer_size(bld_base
, emit_data
->args
[0]);
4267 struct ac_image_args args
;
4269 memcpy(&args
, emit_data
->args
, sizeof(args
)); /* ugly */
4270 args
.opcode
= ac_image_get_resinfo
;
4271 out
= ac_build_image_opcode(&ctx
->ac
, &args
);
4273 out
= fix_resinfo(ctx
, inst
->Memory
.Texture
, out
);
4276 emit_data
->output
[emit_data
->chan
] = out
;
4279 static const struct lp_build_tgsi_action tex_action
;
4289 * Load an image view, fmask view. or sampler state descriptor.
4291 static LLVMValueRef
load_sampler_desc(struct si_shader_context
*ctx
,
4292 LLVMValueRef list
, LLVMValueRef index
,
4293 enum desc_type type
)
4295 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4296 LLVMBuilderRef builder
= gallivm
->builder
;
4300 /* The image is at [0:7]. */
4301 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4304 /* The buffer is in [4:7]. */
4305 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 4, 0), "");
4306 index
= LLVMBuildAdd(builder
, index
, ctx
->i32_1
, "");
4307 list
= LLVMBuildPointerCast(builder
, list
,
4308 const_array(ctx
->v4i32
, 0), "");
4311 /* The FMASK is at [8:15]. */
4312 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4313 index
= LLVMBuildAdd(builder
, index
, ctx
->i32_1
, "");
4316 /* The sampler state is at [12:15]. */
4317 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 4, 0), "");
4318 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 3, 0), "");
4319 list
= LLVMBuildPointerCast(builder
, list
,
4320 const_array(ctx
->v4i32
, 0), "");
4324 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
4327 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4330 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4331 * filtering manually. The driver sets img7 to a mask clearing
4332 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4333 * s_and_b32 samp0, samp0, img7
4336 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4338 static LLVMValueRef
sici_fix_sampler_aniso(struct si_shader_context
*ctx
,
4339 LLVMValueRef res
, LLVMValueRef samp
)
4341 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4342 LLVMValueRef img7
, samp0
;
4344 if (ctx
->screen
->b
.chip_class
>= VI
)
4347 img7
= LLVMBuildExtractElement(builder
, res
,
4348 LLVMConstInt(ctx
->i32
, 7, 0), "");
4349 samp0
= LLVMBuildExtractElement(builder
, samp
,
4351 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4352 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4356 static void tex_fetch_ptrs(
4357 struct lp_build_tgsi_context
*bld_base
,
4358 struct lp_build_emit_data
*emit_data
,
4359 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
, LLVMValueRef
*fmask_ptr
)
4361 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4362 LLVMValueRef list
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLERS
);
4363 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4364 const struct tgsi_full_src_register
*reg
;
4365 unsigned target
= inst
->Texture
.Texture
;
4366 unsigned sampler_src
;
4369 sampler_src
= emit_data
->inst
->Instruction
.NumSrcRegs
- 1;
4370 reg
= &emit_data
->inst
->Src
[sampler_src
];
4372 if (reg
->Register
.Indirect
) {
4373 index
= get_bounded_indirect_index(ctx
,
4375 reg
->Register
.Index
,
4378 index
= LLVMConstInt(ctx
->i32
, reg
->Register
.Index
, 0);
4381 if (target
== TGSI_TEXTURE_BUFFER
)
4382 *res_ptr
= load_sampler_desc(ctx
, list
, index
, DESC_BUFFER
);
4384 *res_ptr
= load_sampler_desc(ctx
, list
, index
, DESC_IMAGE
);
4391 if (target
== TGSI_TEXTURE_2D_MSAA
||
4392 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4394 *fmask_ptr
= load_sampler_desc(ctx
, list
, index
,
4396 } else if (target
!= TGSI_TEXTURE_BUFFER
) {
4398 *samp_ptr
= load_sampler_desc(ctx
, list
, index
,
4400 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4405 static void txq_fetch_args(
4406 struct lp_build_tgsi_context
*bld_base
,
4407 struct lp_build_emit_data
*emit_data
)
4409 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4410 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4411 unsigned target
= inst
->Texture
.Texture
;
4412 LLVMValueRef res_ptr
;
4413 LLVMValueRef address
;
4415 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, NULL
, NULL
);
4417 if (target
== TGSI_TEXTURE_BUFFER
) {
4418 /* Read the size from the buffer descriptor directly. */
4419 emit_data
->args
[0] = get_buffer_size(bld_base
, res_ptr
);
4423 /* Textures - set the mip level. */
4424 address
= lp_build_emit_fetch(bld_base
, inst
, 0, TGSI_CHAN_X
);
4426 set_tex_fetch_args(ctx
, emit_data
, target
, res_ptr
,
4427 NULL
, &address
, 1, 0xf);
4430 static void txq_emit(const struct lp_build_tgsi_action
*action
,
4431 struct lp_build_tgsi_context
*bld_base
,
4432 struct lp_build_emit_data
*emit_data
)
4434 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4435 struct ac_image_args args
;
4436 unsigned target
= emit_data
->inst
->Texture
.Texture
;
4438 if (target
== TGSI_TEXTURE_BUFFER
) {
4439 /* Just return the buffer size. */
4440 emit_data
->output
[emit_data
->chan
] = emit_data
->args
[0];
4444 memcpy(&args
, emit_data
->args
, sizeof(args
)); /* ugly */
4446 args
.opcode
= ac_image_get_resinfo
;
4447 LLVMValueRef result
= ac_build_image_opcode(&ctx
->ac
, &args
);
4449 emit_data
->output
[emit_data
->chan
] = fix_resinfo(ctx
, target
, result
);
4452 static void tex_fetch_args(
4453 struct lp_build_tgsi_context
*bld_base
,
4454 struct lp_build_emit_data
*emit_data
)
4456 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4457 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4458 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4459 unsigned opcode
= inst
->Instruction
.Opcode
;
4460 unsigned target
= inst
->Texture
.Texture
;
4461 LLVMValueRef coords
[5], derivs
[6];
4462 LLVMValueRef address
[16];
4463 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
4464 int ref_pos
= tgsi_util_get_shadow_ref_src_index(target
);
4467 unsigned num_deriv_channels
= 0;
4468 bool has_offset
= inst
->Texture
.NumOffsets
> 0;
4469 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
4470 unsigned dmask
= 0xf;
4472 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4474 if (target
== TGSI_TEXTURE_BUFFER
) {
4475 emit_data
->dst_type
= ctx
->v4f32
;
4476 emit_data
->args
[0] = LLVMBuildBitCast(gallivm
->builder
, res_ptr
,
4478 emit_data
->args
[1] = ctx
->i32_0
;
4479 emit_data
->args
[2] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4480 emit_data
->arg_count
= 3;
4484 /* Fetch and project texture coordinates */
4485 coords
[3] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_W
);
4486 for (chan
= 0; chan
< 3; chan
++ ) {
4487 coords
[chan
] = lp_build_emit_fetch(bld_base
,
4490 if (opcode
== TGSI_OPCODE_TXP
)
4491 coords
[chan
] = lp_build_emit_llvm_binary(bld_base
,
4497 if (opcode
== TGSI_OPCODE_TXP
)
4498 coords
[3] = bld_base
->base
.one
;
4502 opcode
!= TGSI_OPCODE_TXF
&&
4503 opcode
!= TGSI_OPCODE_TXF_LZ
) {
4504 /* The offsets are six-bit signed integers packed like this:
4505 * X=[5:0], Y=[13:8], and Z=[21:16].
4507 LLVMValueRef offset
[3], pack
;
4509 assert(inst
->Texture
.NumOffsets
== 1);
4511 for (chan
= 0; chan
< 3; chan
++) {
4512 offset
[chan
] = lp_build_emit_fetch_texoffset(bld_base
,
4513 emit_data
->inst
, 0, chan
);
4514 offset
[chan
] = LLVMBuildAnd(gallivm
->builder
, offset
[chan
],
4515 LLVMConstInt(ctx
->i32
, 0x3f, 0), "");
4517 offset
[chan
] = LLVMBuildShl(gallivm
->builder
, offset
[chan
],
4518 LLVMConstInt(ctx
->i32
, chan
*8, 0), "");
4521 pack
= LLVMBuildOr(gallivm
->builder
, offset
[0], offset
[1], "");
4522 pack
= LLVMBuildOr(gallivm
->builder
, pack
, offset
[2], "");
4523 address
[count
++] = pack
;
4526 /* Pack LOD bias value */
4527 if (opcode
== TGSI_OPCODE_TXB
)
4528 address
[count
++] = coords
[3];
4529 if (opcode
== TGSI_OPCODE_TXB2
)
4530 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4532 /* Pack depth comparison value */
4533 if (tgsi_is_shadow_target(target
) && opcode
!= TGSI_OPCODE_LODQ
) {
4536 if (target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4537 z
= lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4539 assert(ref_pos
>= 0);
4540 z
= coords
[ref_pos
];
4543 /* TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4544 * so the depth comparison value isn't clamped for Z16 and
4545 * Z24 anymore. Do it manually here.
4547 * It's unnecessary if the original texture format was
4548 * Z32_FLOAT, but we don't know that here.
4550 if (ctx
->screen
->b
.chip_class
== VI
)
4551 z
= ac_build_clamp(&ctx
->ac
, z
);
4553 address
[count
++] = z
;
4556 /* Pack user derivatives */
4557 if (opcode
== TGSI_OPCODE_TXD
) {
4558 int param
, num_src_deriv_channels
, num_dst_deriv_channels
;
4561 case TGSI_TEXTURE_3D
:
4562 num_src_deriv_channels
= 3;
4563 num_dst_deriv_channels
= 3;
4564 num_deriv_channels
= 3;
4566 case TGSI_TEXTURE_2D
:
4567 case TGSI_TEXTURE_SHADOW2D
:
4568 case TGSI_TEXTURE_RECT
:
4569 case TGSI_TEXTURE_SHADOWRECT
:
4570 case TGSI_TEXTURE_2D_ARRAY
:
4571 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4572 num_src_deriv_channels
= 2;
4573 num_dst_deriv_channels
= 2;
4574 num_deriv_channels
= 2;
4576 case TGSI_TEXTURE_CUBE
:
4577 case TGSI_TEXTURE_SHADOWCUBE
:
4578 case TGSI_TEXTURE_CUBE_ARRAY
:
4579 case TGSI_TEXTURE_SHADOWCUBE_ARRAY
:
4580 /* Cube derivatives will be converted to 2D. */
4581 num_src_deriv_channels
= 3;
4582 num_dst_deriv_channels
= 3;
4583 num_deriv_channels
= 2;
4585 case TGSI_TEXTURE_1D
:
4586 case TGSI_TEXTURE_SHADOW1D
:
4587 case TGSI_TEXTURE_1D_ARRAY
:
4588 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4589 num_src_deriv_channels
= 1;
4591 /* 1D textures are allocated and used as 2D on GFX9. */
4592 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
4593 num_dst_deriv_channels
= 2;
4594 num_deriv_channels
= 2;
4596 num_dst_deriv_channels
= 1;
4597 num_deriv_channels
= 1;
4601 unreachable("invalid target");
4604 for (param
= 0; param
< 2; param
++) {
4605 for (chan
= 0; chan
< num_src_deriv_channels
; chan
++)
4606 derivs
[param
* num_dst_deriv_channels
+ chan
] =
4607 lp_build_emit_fetch(bld_base
, inst
, param
+1, chan
);
4609 /* Fill in the rest with zeros. */
4610 for (chan
= num_src_deriv_channels
;
4611 chan
< num_dst_deriv_channels
; chan
++)
4612 derivs
[param
* num_dst_deriv_channels
+ chan
] =
4613 bld_base
->base
.zero
;
4617 if (target
== TGSI_TEXTURE_CUBE
||
4618 target
== TGSI_TEXTURE_CUBE_ARRAY
||
4619 target
== TGSI_TEXTURE_SHADOWCUBE
||
4620 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
)
4621 ac_prepare_cube_coords(&ctx
->ac
,
4622 opcode
== TGSI_OPCODE_TXD
,
4623 target
== TGSI_TEXTURE_CUBE_ARRAY
||
4624 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
,
4627 if (opcode
== TGSI_OPCODE_TXD
)
4628 for (int i
= 0; i
< num_deriv_channels
* 2; i
++)
4629 address
[count
++] = derivs
[i
];
4631 /* Pack texture coordinates */
4632 address
[count
++] = coords
[0];
4634 address
[count
++] = coords
[1];
4636 address
[count
++] = coords
[2];
4638 /* 1D textures are allocated and used as 2D on GFX9. */
4639 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
4640 LLVMValueRef filler
;
4642 /* Use 0.5, so that we don't sample the border color. */
4643 if (opcode
== TGSI_OPCODE_TXF
)
4644 filler
= ctx
->i32_0
;
4646 filler
= LLVMConstReal(ctx
->f32
, 0.5);
4648 if (target
== TGSI_TEXTURE_1D
||
4649 target
== TGSI_TEXTURE_SHADOW1D
) {
4650 address
[count
++] = filler
;
4651 } else if (target
== TGSI_TEXTURE_1D_ARRAY
||
4652 target
== TGSI_TEXTURE_SHADOW1D_ARRAY
) {
4653 address
[count
] = address
[count
- 1];
4654 address
[count
- 1] = filler
;
4659 /* Pack LOD or sample index */
4660 if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXF
)
4661 address
[count
++] = coords
[3];
4662 else if (opcode
== TGSI_OPCODE_TXL2
)
4663 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4666 assert(!"Cannot handle more than 16 texture address parameters");
4670 for (chan
= 0; chan
< count
; chan
++ ) {
4671 address
[chan
] = LLVMBuildBitCast(gallivm
->builder
,
4672 address
[chan
], ctx
->i32
, "");
4675 /* Adjust the sample index according to FMASK.
4677 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
4678 * which is the identity mapping. Each nibble says which physical sample
4679 * should be fetched to get that sample.
4681 * For example, 0x11111100 means there are only 2 samples stored and
4682 * the second sample covers 3/4 of the pixel. When reading samples 0
4683 * and 1, return physical sample 0 (determined by the first two 0s
4684 * in FMASK), otherwise return physical sample 1.
4686 * The sample index should be adjusted as follows:
4687 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
4689 if (target
== TGSI_TEXTURE_2D_MSAA
||
4690 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4691 struct lp_build_emit_data txf_emit_data
= *emit_data
;
4692 LLVMValueRef txf_address
[4];
4693 /* We only need .xy for non-arrays, and .xyz for arrays. */
4694 unsigned txf_count
= target
== TGSI_TEXTURE_2D_MSAA
? 2 : 3;
4695 struct tgsi_full_instruction inst
= {};
4697 memcpy(txf_address
, address
, sizeof(txf_address
));
4699 /* Read FMASK using TXF_LZ. */
4700 inst
.Instruction
.Opcode
= TGSI_OPCODE_TXF_LZ
;
4701 inst
.Texture
.Texture
= target
;
4702 txf_emit_data
.inst
= &inst
;
4703 txf_emit_data
.chan
= 0;
4704 set_tex_fetch_args(ctx
, &txf_emit_data
,
4705 target
, fmask_ptr
, NULL
,
4706 txf_address
, txf_count
, 0xf);
4707 build_tex_intrinsic(&tex_action
, bld_base
, &txf_emit_data
);
4709 /* Initialize some constants. */
4710 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, 0);
4711 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xF, 0);
4713 /* Apply the formula. */
4714 LLVMValueRef fmask
=
4715 LLVMBuildExtractElement(gallivm
->builder
,
4716 txf_emit_data
.output
[0],
4719 unsigned sample_chan
= txf_count
; /* the sample index is last */
4721 LLVMValueRef sample_index4
=
4722 LLVMBuildMul(gallivm
->builder
, address
[sample_chan
], four
, "");
4724 LLVMValueRef shifted_fmask
=
4725 LLVMBuildLShr(gallivm
->builder
, fmask
, sample_index4
, "");
4727 LLVMValueRef final_sample
=
4728 LLVMBuildAnd(gallivm
->builder
, shifted_fmask
, F
, "");
4730 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
4731 * resource descriptor is 0 (invalid),
4733 LLVMValueRef fmask_desc
=
4734 LLVMBuildBitCast(gallivm
->builder
, fmask_ptr
,
4737 LLVMValueRef fmask_word1
=
4738 LLVMBuildExtractElement(gallivm
->builder
, fmask_desc
,
4741 LLVMValueRef word1_is_nonzero
=
4742 LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
4743 fmask_word1
, ctx
->i32_0
, "");
4745 /* Replace the MSAA sample index. */
4746 address
[sample_chan
] =
4747 LLVMBuildSelect(gallivm
->builder
, word1_is_nonzero
,
4748 final_sample
, address
[sample_chan
], "");
4751 if (opcode
== TGSI_OPCODE_TXF
||
4752 opcode
== TGSI_OPCODE_TXF_LZ
) {
4753 /* add tex offsets */
4754 if (inst
->Texture
.NumOffsets
) {
4755 struct lp_build_context
*uint_bld
= &bld_base
->uint_bld
;
4756 const struct tgsi_texture_offset
*off
= inst
->TexOffsets
;
4758 assert(inst
->Texture
.NumOffsets
== 1);
4761 case TGSI_TEXTURE_3D
:
4762 address
[2] = lp_build_add(uint_bld
, address
[2],
4763 ctx
->imms
[off
->Index
* TGSI_NUM_CHANNELS
+ off
->SwizzleZ
]);
4765 case TGSI_TEXTURE_2D
:
4766 case TGSI_TEXTURE_SHADOW2D
:
4767 case TGSI_TEXTURE_RECT
:
4768 case TGSI_TEXTURE_SHADOWRECT
:
4769 case TGSI_TEXTURE_2D_ARRAY
:
4770 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4772 lp_build_add(uint_bld
, address
[1],
4773 ctx
->imms
[off
->Index
* TGSI_NUM_CHANNELS
+ off
->SwizzleY
]);
4775 case TGSI_TEXTURE_1D
:
4776 case TGSI_TEXTURE_SHADOW1D
:
4777 case TGSI_TEXTURE_1D_ARRAY
:
4778 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4780 lp_build_add(uint_bld
, address
[0],
4781 ctx
->imms
[off
->Index
* TGSI_NUM_CHANNELS
+ off
->SwizzleX
]);
4783 /* texture offsets do not apply to other texture targets */
4788 if (opcode
== TGSI_OPCODE_TG4
) {
4789 unsigned gather_comp
= 0;
4791 /* DMASK was repurposed for GATHER4. 4 components are always
4792 * returned and DMASK works like a swizzle - it selects
4793 * the component to fetch. The only valid DMASK values are
4794 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4795 * (red,red,red,red) etc.) The ISA document doesn't mention
4799 /* Get the component index from src1.x for Gather4. */
4800 if (!tgsi_is_shadow_target(target
)) {
4801 LLVMValueRef comp_imm
;
4802 struct tgsi_src_register src1
= inst
->Src
[1].Register
;
4804 assert(src1
.File
== TGSI_FILE_IMMEDIATE
);
4806 comp_imm
= ctx
->imms
[src1
.Index
* TGSI_NUM_CHANNELS
+ src1
.SwizzleX
];
4807 gather_comp
= LLVMConstIntGetZExtValue(comp_imm
);
4808 gather_comp
= CLAMP(gather_comp
, 0, 3);
4811 dmask
= 1 << gather_comp
;
4814 set_tex_fetch_args(ctx
, emit_data
, target
, res_ptr
,
4815 samp_ptr
, address
, count
, dmask
);
4818 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
4819 * incorrectly forces nearest filtering if the texture format is integer.
4820 * The only effect it has on Gather4, which always returns 4 texels for
4821 * bilinear filtering, is that the final coordinates are off by 0.5 of
4824 * The workaround is to subtract 0.5 from the unnormalized coordinates,
4825 * or (0.5 / size) from the normalized coordinates.
4827 static void si_lower_gather4_integer(struct si_shader_context
*ctx
,
4828 struct ac_image_args
*args
,
4831 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4832 LLVMValueRef coord
= args
->addr
;
4833 LLVMValueRef half_texel
[2];
4834 /* Texture coordinates start after:
4835 * {offset, bias, z-compare, derivatives}
4836 * Only the offset and z-compare can occur here.
4838 unsigned coord_vgpr_index
= (int)args
->offset
+ (int)args
->compare
;
4841 if (target
== TGSI_TEXTURE_RECT
||
4842 target
== TGSI_TEXTURE_SHADOWRECT
) {
4843 half_texel
[0] = half_texel
[1] = LLVMConstReal(ctx
->f32
, -0.5);
4845 struct tgsi_full_instruction txq_inst
= {};
4846 struct lp_build_emit_data txq_emit_data
= {};
4848 /* Query the texture size. */
4849 txq_inst
.Texture
.Texture
= target
;
4850 txq_emit_data
.inst
= &txq_inst
;
4851 txq_emit_data
.dst_type
= ctx
->v4i32
;
4852 set_tex_fetch_args(ctx
, &txq_emit_data
, target
,
4853 args
->resource
, NULL
, &ctx
->i32_0
,
4855 txq_emit(NULL
, &ctx
->bld_base
, &txq_emit_data
);
4857 /* Compute -0.5 / size. */
4858 for (c
= 0; c
< 2; c
++) {
4860 LLVMBuildExtractElement(builder
, txq_emit_data
.output
[0],
4861 LLVMConstInt(ctx
->i32
, c
, 0), "");
4862 half_texel
[c
] = LLVMBuildUIToFP(builder
, half_texel
[c
], ctx
->f32
, "");
4864 lp_build_emit_llvm_unary(&ctx
->bld_base
,
4865 TGSI_OPCODE_RCP
, half_texel
[c
]);
4866 half_texel
[c
] = LLVMBuildFMul(builder
, half_texel
[c
],
4867 LLVMConstReal(ctx
->f32
, -0.5), "");
4871 for (c
= 0; c
< 2; c
++) {
4873 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
4875 tmp
= LLVMBuildExtractElement(builder
, coord
, index
, "");
4876 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->f32
, "");
4877 tmp
= LLVMBuildFAdd(builder
, tmp
, half_texel
[c
], "");
4878 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4879 coord
= LLVMBuildInsertElement(builder
, coord
, tmp
, index
, "");
4885 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
4886 struct lp_build_tgsi_context
*bld_base
,
4887 struct lp_build_emit_data
*emit_data
)
4889 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4890 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4891 struct ac_image_args args
;
4892 unsigned opcode
= inst
->Instruction
.Opcode
;
4893 unsigned target
= inst
->Texture
.Texture
;
4895 if (target
== TGSI_TEXTURE_BUFFER
) {
4896 emit_data
->output
[emit_data
->chan
] =
4897 ac_build_buffer_load_format(&ctx
->ac
,
4905 memcpy(&args
, emit_data
->args
, sizeof(args
)); /* ugly */
4907 args
.opcode
= ac_image_sample
;
4908 args
.compare
= tgsi_is_shadow_target(target
);
4909 args
.offset
= inst
->Texture
.NumOffsets
> 0;
4912 case TGSI_OPCODE_TXF
:
4913 case TGSI_OPCODE_TXF_LZ
:
4914 args
.opcode
= opcode
== TGSI_OPCODE_TXF_LZ
||
4915 target
== TGSI_TEXTURE_2D_MSAA
||
4916 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
?
4917 ac_image_load
: ac_image_load_mip
;
4918 args
.compare
= false;
4919 args
.offset
= false;
4921 case TGSI_OPCODE_LODQ
:
4922 args
.opcode
= ac_image_get_lod
;
4923 args
.compare
= false;
4924 args
.offset
= false;
4926 case TGSI_OPCODE_TEX
:
4927 case TGSI_OPCODE_TEX2
:
4928 case TGSI_OPCODE_TXP
:
4929 if (ctx
->type
!= PIPE_SHADER_FRAGMENT
)
4930 args
.level_zero
= true;
4932 case TGSI_OPCODE_TEX_LZ
:
4933 args
.level_zero
= true;
4935 case TGSI_OPCODE_TXB
:
4936 case TGSI_OPCODE_TXB2
:
4937 assert(ctx
->type
== PIPE_SHADER_FRAGMENT
);
4940 case TGSI_OPCODE_TXL
:
4941 case TGSI_OPCODE_TXL2
:
4944 case TGSI_OPCODE_TXD
:
4947 case TGSI_OPCODE_TG4
:
4948 args
.opcode
= ac_image_gather4
;
4949 args
.level_zero
= true;
4956 /* The hardware needs special lowering for Gather4 with integer formats. */
4957 if (ctx
->screen
->b
.chip_class
<= VI
&&
4958 opcode
== TGSI_OPCODE_TG4
) {
4959 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4960 /* This will also work with non-constant indexing because of how
4961 * glsl_to_tgsi works and we intent to preserve that behavior.
4963 const unsigned src_idx
= 2;
4964 unsigned sampler
= inst
->Src
[src_idx
].Register
.Index
;
4966 assert(inst
->Src
[src_idx
].Register
.File
== TGSI_FILE_SAMPLER
);
4968 if (info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_SINT
||
4969 info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_UINT
)
4970 si_lower_gather4_integer(ctx
, &args
, target
);
4973 emit_data
->output
[emit_data
->chan
] =
4974 ac_build_image_opcode(&ctx
->ac
, &args
);
4977 static void si_llvm_emit_txqs(
4978 const struct lp_build_tgsi_action
*action
,
4979 struct lp_build_tgsi_context
*bld_base
,
4980 struct lp_build_emit_data
*emit_data
)
4982 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4983 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4984 LLVMBuilderRef builder
= gallivm
->builder
;
4985 LLVMValueRef res
, samples
;
4986 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
4988 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4991 /* Read the samples from the descriptor directly. */
4992 res
= LLVMBuildBitCast(builder
, res_ptr
, ctx
->v8i32
, "");
4993 samples
= LLVMBuildExtractElement(
4995 LLVMConstInt(ctx
->i32
, 3, 0), "");
4996 samples
= LLVMBuildLShr(builder
, samples
,
4997 LLVMConstInt(ctx
->i32
, 16, 0), "");
4998 samples
= LLVMBuildAnd(builder
, samples
,
4999 LLVMConstInt(ctx
->i32
, 0xf, 0), "");
5000 samples
= LLVMBuildShl(builder
, ctx
->i32_1
,
5003 emit_data
->output
[emit_data
->chan
] = samples
;
5006 static void si_llvm_emit_ddxy(
5007 const struct lp_build_tgsi_action
*action
,
5008 struct lp_build_tgsi_context
*bld_base
,
5009 struct lp_build_emit_data
*emit_data
)
5011 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5012 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5013 unsigned opcode
= emit_data
->info
->opcode
;
5018 if (opcode
== TGSI_OPCODE_DDX_FINE
)
5019 mask
= AC_TID_MASK_LEFT
;
5020 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
5021 mask
= AC_TID_MASK_TOP
;
5023 mask
= AC_TID_MASK_TOP_LEFT
;
5025 /* for DDX we want to next X pixel, DDY next Y pixel. */
5026 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
5028 val
= LLVMBuildBitCast(gallivm
->builder
, emit_data
->args
[0], ctx
->i32
, "");
5029 val
= ac_build_ddxy(&ctx
->ac
, ctx
->screen
->has_ds_bpermute
,
5030 mask
, idx
, ctx
->lds
, val
);
5031 emit_data
->output
[emit_data
->chan
] = val
;
5035 * this takes an I,J coordinate pair,
5036 * and works out the X and Y derivatives.
5037 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
5039 static LLVMValueRef
si_llvm_emit_ddxy_interp(
5040 struct lp_build_tgsi_context
*bld_base
,
5041 LLVMValueRef interp_ij
)
5043 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5044 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5045 LLVMValueRef result
[4], a
;
5048 for (i
= 0; i
< 2; i
++) {
5049 a
= LLVMBuildExtractElement(gallivm
->builder
, interp_ij
,
5050 LLVMConstInt(ctx
->i32
, i
, 0), "");
5051 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
5052 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
5055 return lp_build_gather_values(gallivm
, result
, 4);
5058 static void interp_fetch_args(
5059 struct lp_build_tgsi_context
*bld_base
,
5060 struct lp_build_emit_data
*emit_data
)
5062 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5063 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5064 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
5066 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
5067 /* offset is in second src, first two channels */
5068 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
5071 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
5074 emit_data
->arg_count
= 2;
5075 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
5076 LLVMValueRef sample_position
;
5077 LLVMValueRef sample_id
;
5078 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
5080 /* fetch sample ID, then fetch its sample position,
5081 * and place into first two channels.
5083 sample_id
= lp_build_emit_fetch(bld_base
,
5084 emit_data
->inst
, 1, TGSI_CHAN_X
);
5085 sample_id
= LLVMBuildBitCast(gallivm
->builder
, sample_id
,
5087 sample_position
= load_sample_position(ctx
, sample_id
);
5089 emit_data
->args
[0] = LLVMBuildExtractElement(gallivm
->builder
,
5093 emit_data
->args
[0] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[0], halfval
, "");
5094 emit_data
->args
[1] = LLVMBuildExtractElement(gallivm
->builder
,
5097 emit_data
->args
[1] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[1], halfval
, "");
5098 emit_data
->arg_count
= 2;
5102 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
5103 struct lp_build_tgsi_context
*bld_base
,
5104 struct lp_build_emit_data
*emit_data
)
5106 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5107 struct si_shader
*shader
= ctx
->shader
;
5108 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5109 LLVMValueRef interp_param
;
5110 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
5111 int input_index
= inst
->Src
[0].Register
.Index
;
5114 LLVMValueRef attr_number
;
5115 LLVMValueRef params
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_PRIM_MASK
);
5116 int interp_param_idx
;
5117 unsigned interp
= shader
->selector
->info
.input_interpolate
[input_index
];
5120 assert(inst
->Src
[0].Register
.File
== TGSI_FILE_INPUT
);
5122 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5123 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
5124 location
= TGSI_INTERPOLATE_LOC_CENTER
;
5126 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
5128 interp_param_idx
= lookup_interp_param_index(interp
, location
);
5129 if (interp_param_idx
== -1)
5131 else if (interp_param_idx
)
5132 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
5134 interp_param
= NULL
;
5136 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, 0);
5138 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5139 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
5140 LLVMValueRef ij_out
[2];
5141 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
5144 * take the I then J parameters, and the DDX/Y for it, and
5145 * calculate the IJ inputs for the interpolator.
5146 * temp1 = ddx * offset/sample.x + I;
5147 * interp_param.I = ddy * offset/sample.y + temp1;
5148 * temp1 = ddx * offset/sample.x + J;
5149 * interp_param.J = ddy * offset/sample.y + temp1;
5151 for (i
= 0; i
< 2; i
++) {
5152 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
5153 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
5154 LLVMValueRef ddx_el
= LLVMBuildExtractElement(gallivm
->builder
,
5155 ddxy_out
, ix_ll
, "");
5156 LLVMValueRef ddy_el
= LLVMBuildExtractElement(gallivm
->builder
,
5157 ddxy_out
, iy_ll
, "");
5158 LLVMValueRef interp_el
= LLVMBuildExtractElement(gallivm
->builder
,
5159 interp_param
, ix_ll
, "");
5160 LLVMValueRef temp1
, temp2
;
5162 interp_el
= LLVMBuildBitCast(gallivm
->builder
, interp_el
,
5165 temp1
= LLVMBuildFMul(gallivm
->builder
, ddx_el
, emit_data
->args
[0], "");
5167 temp1
= LLVMBuildFAdd(gallivm
->builder
, temp1
, interp_el
, "");
5169 temp2
= LLVMBuildFMul(gallivm
->builder
, ddy_el
, emit_data
->args
[1], "");
5171 ij_out
[i
] = LLVMBuildFAdd(gallivm
->builder
, temp2
, temp1
, "");
5173 interp_param
= lp_build_gather_values(gallivm
, ij_out
, 2);
5176 for (chan
= 0; chan
< 4; chan
++) {
5177 LLVMValueRef llvm_chan
;
5180 schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
5181 llvm_chan
= LLVMConstInt(ctx
->i32
, schan
, 0);
5184 interp_param
= LLVMBuildBitCast(gallivm
->builder
,
5185 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
5186 LLVMValueRef i
= LLVMBuildExtractElement(
5187 gallivm
->builder
, interp_param
, ctx
->i32_0
, "");
5188 LLVMValueRef j
= LLVMBuildExtractElement(
5189 gallivm
->builder
, interp_param
, ctx
->i32_1
, "");
5190 emit_data
->output
[chan
] = ac_build_fs_interp(&ctx
->ac
,
5191 llvm_chan
, attr_number
, params
,
5194 emit_data
->output
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
5195 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
5196 llvm_chan
, attr_number
, params
);
5201 static LLVMValueRef
si_emit_ballot(struct si_shader_context
*ctx
,
5204 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5205 LLVMValueRef args
[3] = {
5208 LLVMConstInt(ctx
->i32
, LLVMIntNE
, 0)
5211 /* We currently have no other way to prevent LLVM from lifting the icmp
5212 * calls to a dominating basic block.
5214 emit_optimization_barrier(ctx
, &args
[0]);
5216 if (LLVMTypeOf(args
[0]) != ctx
->i32
)
5217 args
[0] = LLVMBuildBitCast(gallivm
->builder
, args
[0], ctx
->i32
, "");
5219 return lp_build_intrinsic(gallivm
->builder
,
5220 "llvm.amdgcn.icmp.i32",
5222 LP_FUNC_ATTR_NOUNWIND
|
5223 LP_FUNC_ATTR_READNONE
|
5224 LP_FUNC_ATTR_CONVERGENT
);
5227 static void vote_all_emit(
5228 const struct lp_build_tgsi_action
*action
,
5229 struct lp_build_tgsi_context
*bld_base
,
5230 struct lp_build_emit_data
*emit_data
)
5232 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5233 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5234 LLVMValueRef active_set
, vote_set
;
5237 active_set
= si_emit_ballot(ctx
, ctx
->i32_1
);
5238 vote_set
= si_emit_ballot(ctx
, emit_data
->args
[0]);
5240 tmp
= LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
, vote_set
, active_set
, "");
5241 emit_data
->output
[emit_data
->chan
] =
5242 LLVMBuildSExt(gallivm
->builder
, tmp
, ctx
->i32
, "");
5245 static void vote_any_emit(
5246 const struct lp_build_tgsi_action
*action
,
5247 struct lp_build_tgsi_context
*bld_base
,
5248 struct lp_build_emit_data
*emit_data
)
5250 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5251 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5252 LLVMValueRef vote_set
;
5255 vote_set
= si_emit_ballot(ctx
, emit_data
->args
[0]);
5257 tmp
= LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
5258 vote_set
, LLVMConstInt(ctx
->i64
, 0, 0), "");
5259 emit_data
->output
[emit_data
->chan
] =
5260 LLVMBuildSExt(gallivm
->builder
, tmp
, ctx
->i32
, "");
5263 static void vote_eq_emit(
5264 const struct lp_build_tgsi_action
*action
,
5265 struct lp_build_tgsi_context
*bld_base
,
5266 struct lp_build_emit_data
*emit_data
)
5268 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5269 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5270 LLVMValueRef active_set
, vote_set
;
5271 LLVMValueRef all
, none
, tmp
;
5273 active_set
= si_emit_ballot(ctx
, ctx
->i32_1
);
5274 vote_set
= si_emit_ballot(ctx
, emit_data
->args
[0]);
5276 all
= LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
, vote_set
, active_set
, "");
5277 none
= LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
5278 vote_set
, LLVMConstInt(ctx
->i64
, 0, 0), "");
5279 tmp
= LLVMBuildOr(gallivm
->builder
, all
, none
, "");
5280 emit_data
->output
[emit_data
->chan
] =
5281 LLVMBuildSExt(gallivm
->builder
, tmp
, ctx
->i32
, "");
5284 static void ballot_emit(
5285 const struct lp_build_tgsi_action
*action
,
5286 struct lp_build_tgsi_context
*bld_base
,
5287 struct lp_build_emit_data
*emit_data
)
5289 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5290 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
5293 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
5294 tmp
= si_emit_ballot(ctx
, tmp
);
5295 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
5297 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
5298 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
5301 static void read_invoc_fetch_args(
5302 struct lp_build_tgsi_context
*bld_base
,
5303 struct lp_build_emit_data
*emit_data
)
5305 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
5306 0, emit_data
->src_chan
);
5308 /* Always read the source invocation (= lane) from the X channel. */
5309 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
5311 emit_data
->arg_count
= 2;
5314 static void read_lane_emit(
5315 const struct lp_build_tgsi_action
*action
,
5316 struct lp_build_tgsi_context
*bld_base
,
5317 struct lp_build_emit_data
*emit_data
)
5319 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5320 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
5322 /* We currently have no other way to prevent LLVM from lifting the icmp
5323 * calls to a dominating basic block.
5325 emit_optimization_barrier(ctx
, &emit_data
->args
[0]);
5327 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
) {
5328 emit_data
->args
[i
] = LLVMBuildBitCast(builder
, emit_data
->args
[i
],
5332 emit_data
->output
[emit_data
->chan
] =
5333 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
5334 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
5335 AC_FUNC_ATTR_READNONE
|
5336 AC_FUNC_ATTR_CONVERGENT
);
5339 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
5340 struct lp_build_emit_data
*emit_data
)
5342 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5343 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
5347 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
5349 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
5350 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
5354 /* Emit one vertex from the geometry shader */
5355 static void si_llvm_emit_vertex(
5356 const struct lp_build_tgsi_action
*action
,
5357 struct lp_build_tgsi_context
*bld_base
,
5358 struct lp_build_emit_data
*emit_data
)
5360 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5361 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5362 struct si_shader
*shader
= ctx
->shader
;
5363 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5364 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5365 struct lp_build_if_state if_state
;
5366 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
5367 SI_PARAM_GS2VS_OFFSET
);
5368 LLVMValueRef gs_next_vertex
;
5369 LLVMValueRef can_emit
, kill
;
5370 unsigned chan
, offset
;
5374 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5376 /* Write vertex attribute values to GSVS ring */
5377 gs_next_vertex
= LLVMBuildLoad(gallivm
->builder
,
5378 ctx
->gs_next_vertex
[stream
],
5381 /* If this thread has already emitted the declared maximum number of
5382 * vertices, skip the write: excessive vertex emissions are not
5383 * supposed to have any effect.
5385 * If the shader has no writes to memory, kill it instead. This skips
5386 * further memory loads and may allow LLVM to skip to the end
5389 can_emit
= LLVMBuildICmp(gallivm
->builder
, LLVMIntULT
, gs_next_vertex
,
5390 LLVMConstInt(ctx
->i32
,
5391 shader
->selector
->gs_max_out_vertices
, 0), "");
5393 bool use_kill
= !info
->writes_memory
;
5395 kill
= lp_build_select(&bld_base
->base
, can_emit
,
5396 LLVMConstReal(ctx
->f32
, 1.0f
),
5397 LLVMConstReal(ctx
->f32
, -1.0f
));
5399 ac_build_kill(&ctx
->ac
, kill
);
5401 lp_build_if(&if_state
, gallivm
, can_emit
);
5405 for (i
= 0; i
< info
->num_outputs
; i
++) {
5406 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
5408 for (chan
= 0; chan
< 4; chan
++) {
5409 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
5410 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
5413 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
5414 LLVMValueRef voffset
=
5415 LLVMConstInt(ctx
->i32
, offset
*
5416 shader
->selector
->gs_max_out_vertices
, 0);
5419 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
5420 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
5422 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
5424 ac_build_buffer_store_dword(&ctx
->ac
,
5425 ctx
->gsvs_ring
[stream
],
5427 voffset
, soffset
, 0,
5432 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
5435 LLVMBuildStore(gallivm
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
5437 /* Signal vertex emission */
5438 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
5439 LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
));
5441 lp_build_endif(&if_state
);
5444 /* Cut one primitive from the geometry shader */
5445 static void si_llvm_emit_primitive(
5446 const struct lp_build_tgsi_action
*action
,
5447 struct lp_build_tgsi_context
*bld_base
,
5448 struct lp_build_emit_data
*emit_data
)
5450 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5453 /* Signal primitive cut */
5454 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5455 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
5456 LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
));
5459 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
5460 struct lp_build_tgsi_context
*bld_base
,
5461 struct lp_build_emit_data
*emit_data
)
5463 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5464 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5466 /* SI only (thanks to a hw bug workaround):
5467 * The real barrier instruction isn’t needed, because an entire patch
5468 * always fits into a single wave.
5470 if (HAVE_LLVM
>= 0x0309 &&
5471 ctx
->screen
->b
.chip_class
== SI
&&
5472 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
5473 emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
5477 lp_build_intrinsic(gallivm
->builder
,
5478 HAVE_LLVM
>= 0x0309 ? "llvm.amdgcn.s.barrier"
5479 : "llvm.AMDGPU.barrier.local",
5480 ctx
->voidt
, NULL
, 0, LP_FUNC_ATTR_CONVERGENT
);
5483 static const struct lp_build_tgsi_action tex_action
= {
5484 .fetch_args
= tex_fetch_args
,
5485 .emit
= build_tex_intrinsic
,
5488 static const struct lp_build_tgsi_action interp_action
= {
5489 .fetch_args
= interp_fetch_args
,
5490 .emit
= build_interp_intrinsic
,
5493 static void si_create_function(struct si_shader_context
*ctx
,
5495 LLVMTypeRef
*returns
, unsigned num_returns
,
5496 LLVMTypeRef
*params
, unsigned num_params
,
5501 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
5502 params
, num_params
);
5503 si_llvm_shader_type(ctx
->main_fn
, ctx
->type
);
5504 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
5506 for (i
= 0; i
<= last_sgpr
; ++i
) {
5507 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
5509 /* The combination of:
5513 * allows the optimization passes to move loads and reduces
5514 * SGPR spilling significantly.
5516 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
5517 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_BYVAL
);
5518 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_NOALIAS
);
5519 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
5521 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
5524 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5525 "no-signed-zeros-fp-math",
5528 if (ctx
->screen
->b
.debug_flags
& DBG_UNSAFE_MATH
) {
5529 /* These were copied from some LLVM test. */
5530 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5531 "less-precise-fpmad",
5533 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5536 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5539 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5545 static void declare_streamout_params(struct si_shader_context
*ctx
,
5546 struct pipe_stream_output_info
*so
,
5547 LLVMTypeRef
*params
, LLVMTypeRef i32
,
5548 unsigned *num_params
)
5552 /* Streamout SGPRs. */
5553 if (so
->num_outputs
) {
5554 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
5555 params
[ctx
->param_streamout_config
= (*num_params
)++] = i32
;
5557 ctx
->param_streamout_config
= *num_params
- 1;
5559 params
[ctx
->param_streamout_write_index
= (*num_params
)++] = i32
;
5561 /* A streamout buffer offset is loaded if the stride is non-zero. */
5562 for (i
= 0; i
< 4; i
++) {
5566 params
[ctx
->param_streamout_offset
[i
] = (*num_params
)++] = i32
;
5570 static unsigned llvm_get_type_size(LLVMTypeRef type
)
5572 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
5575 case LLVMIntegerTypeKind
:
5576 return LLVMGetIntTypeWidth(type
) / 8;
5577 case LLVMFloatTypeKind
:
5579 case LLVMPointerTypeKind
:
5581 case LLVMVectorTypeKind
:
5582 return LLVMGetVectorSize(type
) *
5583 llvm_get_type_size(LLVMGetElementType(type
));
5584 case LLVMArrayTypeKind
:
5585 return LLVMGetArrayLength(type
) *
5586 llvm_get_type_size(LLVMGetElementType(type
));
5593 static void declare_tess_lds(struct si_shader_context
*ctx
)
5595 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5597 unsigned lds_size
= ctx
->screen
->b
.chip_class
>= CIK
? 65536 : 32768;
5598 ctx
->lds
= LLVMBuildIntToPtr(gallivm
->builder
, ctx
->i32_0
,
5599 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
5603 static unsigned si_get_max_workgroup_size(struct si_shader
*shader
)
5605 const unsigned *properties
= shader
->selector
->info
.properties
;
5606 unsigned max_work_group_size
=
5607 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
5608 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
5609 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
5611 if (!max_work_group_size
) {
5612 /* This is a variable group size compute shader,
5613 * compile it for the maximum possible group size.
5615 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
5617 return max_work_group_size
;
5620 static void create_function(struct si_shader_context
*ctx
)
5622 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5623 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5624 struct si_shader
*shader
= ctx
->shader
;
5625 LLVMTypeRef params
[SI_NUM_PARAMS
+ SI_MAX_ATTRIBS
], v3i32
;
5626 LLVMTypeRef returns
[16+32*4];
5627 unsigned i
, last_sgpr
, num_params
, num_return_sgprs
;
5628 unsigned num_returns
= 0;
5629 unsigned num_prolog_vgprs
= 0;
5631 v3i32
= LLVMVectorType(ctx
->i32
, 3);
5633 params
[SI_PARAM_RW_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
5634 params
[SI_PARAM_CONST_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_CONST_BUFFERS
);
5635 params
[SI_PARAM_SAMPLERS
] = const_array(ctx
->v8i32
, SI_NUM_SAMPLERS
);
5636 params
[SI_PARAM_IMAGES
] = const_array(ctx
->v8i32
, SI_NUM_IMAGES
);
5637 params
[SI_PARAM_SHADER_BUFFERS
] = const_array(ctx
->v4i32
, SI_NUM_SHADER_BUFFERS
);
5639 switch (ctx
->type
) {
5640 case PIPE_SHADER_VERTEX
:
5641 params
[SI_PARAM_VERTEX_BUFFERS
] = const_array(ctx
->v16i8
, SI_MAX_ATTRIBS
);
5642 params
[SI_PARAM_BASE_VERTEX
] = ctx
->i32
;
5643 params
[SI_PARAM_START_INSTANCE
] = ctx
->i32
;
5644 params
[SI_PARAM_DRAWID
] = ctx
->i32
;
5645 params
[SI_PARAM_VS_STATE_BITS
] = ctx
->i32
;
5646 num_params
= SI_PARAM_VS_STATE_BITS
+1;
5648 if (shader
->key
.as_es
) {
5649 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5650 } else if (shader
->key
.as_ls
) {
5651 /* no extra parameters */
5653 if (shader
->is_gs_copy_shader
) {
5654 num_params
= SI_PARAM_RW_BUFFERS
+1;
5657 /* The locations of the other parameters are assigned dynamically. */
5658 declare_streamout_params(ctx
, &shader
->selector
->so
,
5659 params
, ctx
->i32
, &num_params
);
5662 last_sgpr
= num_params
-1;
5665 params
[ctx
->param_vertex_id
= num_params
++] = ctx
->i32
;
5666 params
[ctx
->param_rel_auto_id
= num_params
++] = ctx
->i32
;
5667 params
[ctx
->param_vs_prim_id
= num_params
++] = ctx
->i32
;
5668 params
[ctx
->param_instance_id
= num_params
++] = ctx
->i32
;
5670 if (!shader
->is_gs_copy_shader
) {
5671 /* Vertex load indices. */
5672 ctx
->param_vertex_index0
= num_params
;
5674 for (i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
5675 params
[num_params
++] = ctx
->i32
;
5677 num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
5679 /* PrimitiveID output. */
5680 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
)
5681 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5682 returns
[num_returns
++] = ctx
->f32
;
5686 case PIPE_SHADER_TESS_CTRL
:
5687 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
5688 params
[SI_PARAM_TCS_OUT_OFFSETS
] = ctx
->i32
;
5689 params
[SI_PARAM_TCS_OUT_LAYOUT
] = ctx
->i32
;
5690 params
[SI_PARAM_TCS_IN_LAYOUT
] = ctx
->i32
;
5691 params
[ctx
->param_oc_lds
= SI_PARAM_TCS_OC_LDS
] = ctx
->i32
;
5692 params
[SI_PARAM_TESS_FACTOR_OFFSET
] = ctx
->i32
;
5693 last_sgpr
= SI_PARAM_TESS_FACTOR_OFFSET
;
5696 params
[SI_PARAM_PATCH_ID
] = ctx
->i32
;
5697 params
[SI_PARAM_REL_IDS
] = ctx
->i32
;
5698 num_params
= SI_PARAM_REL_IDS
+1;
5700 /* SI_PARAM_TCS_OC_LDS and PARAM_TESS_FACTOR_OFFSET are
5701 * placed after the user SGPRs.
5703 for (i
= 0; i
< SI_TCS_NUM_USER_SGPR
+ 2; i
++)
5704 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
5706 for (i
= 0; i
< 3; i
++)
5707 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
5710 case PIPE_SHADER_TESS_EVAL
:
5711 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
5712 num_params
= SI_PARAM_TCS_OFFCHIP_LAYOUT
+1;
5714 if (shader
->key
.as_es
) {
5715 params
[ctx
->param_oc_lds
= num_params
++] = ctx
->i32
;
5716 params
[num_params
++] = ctx
->i32
;
5717 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5719 params
[num_params
++] = ctx
->i32
;
5720 declare_streamout_params(ctx
, &shader
->selector
->so
,
5721 params
, ctx
->i32
, &num_params
);
5722 params
[ctx
->param_oc_lds
= num_params
++] = ctx
->i32
;
5724 last_sgpr
= num_params
- 1;
5727 params
[ctx
->param_tes_u
= num_params
++] = ctx
->f32
;
5728 params
[ctx
->param_tes_v
= num_params
++] = ctx
->f32
;
5729 params
[ctx
->param_tes_rel_patch_id
= num_params
++] = ctx
->i32
;
5730 params
[ctx
->param_tes_patch_id
= num_params
++] = ctx
->i32
;
5732 /* PrimitiveID output. */
5733 if (!shader
->key
.as_es
)
5734 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5735 returns
[num_returns
++] = ctx
->f32
;
5738 case PIPE_SHADER_GEOMETRY
:
5739 params
[SI_PARAM_GS2VS_OFFSET
] = ctx
->i32
;
5740 params
[SI_PARAM_GS_WAVE_ID
] = ctx
->i32
;
5741 last_sgpr
= SI_PARAM_GS_WAVE_ID
;
5744 params
[SI_PARAM_VTX0_OFFSET
] = ctx
->i32
;
5745 params
[SI_PARAM_VTX1_OFFSET
] = ctx
->i32
;
5746 params
[SI_PARAM_PRIMITIVE_ID
] = ctx
->i32
;
5747 params
[SI_PARAM_VTX2_OFFSET
] = ctx
->i32
;
5748 params
[SI_PARAM_VTX3_OFFSET
] = ctx
->i32
;
5749 params
[SI_PARAM_VTX4_OFFSET
] = ctx
->i32
;
5750 params
[SI_PARAM_VTX5_OFFSET
] = ctx
->i32
;
5751 params
[SI_PARAM_GS_INSTANCE_ID
] = ctx
->i32
;
5752 num_params
= SI_PARAM_GS_INSTANCE_ID
+1;
5755 case PIPE_SHADER_FRAGMENT
:
5756 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
5757 params
[SI_PARAM_PRIM_MASK
] = ctx
->i32
;
5758 last_sgpr
= SI_PARAM_PRIM_MASK
;
5759 params
[SI_PARAM_PERSP_SAMPLE
] = ctx
->v2i32
;
5760 params
[SI_PARAM_PERSP_CENTER
] = ctx
->v2i32
;
5761 params
[SI_PARAM_PERSP_CENTROID
] = ctx
->v2i32
;
5762 params
[SI_PARAM_PERSP_PULL_MODEL
] = v3i32
;
5763 params
[SI_PARAM_LINEAR_SAMPLE
] = ctx
->v2i32
;
5764 params
[SI_PARAM_LINEAR_CENTER
] = ctx
->v2i32
;
5765 params
[SI_PARAM_LINEAR_CENTROID
] = ctx
->v2i32
;
5766 params
[SI_PARAM_LINE_STIPPLE_TEX
] = ctx
->f32
;
5767 params
[SI_PARAM_POS_X_FLOAT
] = ctx
->f32
;
5768 params
[SI_PARAM_POS_Y_FLOAT
] = ctx
->f32
;
5769 params
[SI_PARAM_POS_Z_FLOAT
] = ctx
->f32
;
5770 params
[SI_PARAM_POS_W_FLOAT
] = ctx
->f32
;
5771 params
[SI_PARAM_FRONT_FACE
] = ctx
->i32
;
5772 shader
->info
.face_vgpr_index
= 20;
5773 params
[SI_PARAM_ANCILLARY
] = ctx
->i32
;
5774 params
[SI_PARAM_SAMPLE_COVERAGE
] = ctx
->f32
;
5775 params
[SI_PARAM_POS_FIXED_PT
] = ctx
->i32
;
5776 num_params
= SI_PARAM_POS_FIXED_PT
+1;
5778 /* Color inputs from the prolog. */
5779 if (shader
->selector
->info
.colors_read
) {
5780 unsigned num_color_elements
=
5781 util_bitcount(shader
->selector
->info
.colors_read
);
5783 assert(num_params
+ num_color_elements
<= ARRAY_SIZE(params
));
5784 for (i
= 0; i
< num_color_elements
; i
++)
5785 params
[num_params
++] = ctx
->f32
;
5787 num_prolog_vgprs
+= num_color_elements
;
5790 /* Outputs for the epilog. */
5791 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
5794 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
5795 shader
->selector
->info
.writes_z
+
5796 shader
->selector
->info
.writes_stencil
+
5797 shader
->selector
->info
.writes_samplemask
+
5798 1 /* SampleMaskIn */;
5800 num_returns
= MAX2(num_returns
,
5802 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
5804 for (i
= 0; i
< num_return_sgprs
; i
++)
5805 returns
[i
] = ctx
->i32
;
5806 for (; i
< num_returns
; i
++)
5807 returns
[i
] = ctx
->f32
;
5810 case PIPE_SHADER_COMPUTE
:
5811 params
[SI_PARAM_GRID_SIZE
] = v3i32
;
5812 params
[SI_PARAM_BLOCK_SIZE
] = v3i32
;
5813 params
[SI_PARAM_BLOCK_ID
] = v3i32
;
5814 last_sgpr
= SI_PARAM_BLOCK_ID
;
5816 params
[SI_PARAM_THREAD_ID
] = v3i32
;
5817 num_params
= SI_PARAM_THREAD_ID
+ 1;
5820 assert(0 && "unimplemented shader");
5824 assert(num_params
<= ARRAY_SIZE(params
));
5826 si_create_function(ctx
, "main", returns
, num_returns
, params
,
5827 num_params
, last_sgpr
);
5829 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5830 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
5831 ctx
->separate_prolog
) {
5832 si_llvm_add_attribute(ctx
->main_fn
,
5833 "InitialPSInputAddr",
5834 S_0286D0_PERSP_SAMPLE_ENA(1) |
5835 S_0286D0_PERSP_CENTER_ENA(1) |
5836 S_0286D0_PERSP_CENTROID_ENA(1) |
5837 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5838 S_0286D0_LINEAR_CENTER_ENA(1) |
5839 S_0286D0_LINEAR_CENTROID_ENA(1) |
5840 S_0286D0_FRONT_FACE_ENA(1) |
5841 S_0286D0_POS_FIXED_PT_ENA(1));
5842 } else if (ctx
->type
== PIPE_SHADER_COMPUTE
) {
5843 si_llvm_add_attribute(ctx
->main_fn
,
5844 "amdgpu-max-work-group-size",
5845 si_get_max_workgroup_size(shader
));
5848 shader
->info
.num_input_sgprs
= 0;
5849 shader
->info
.num_input_vgprs
= 0;
5851 for (i
= 0; i
<= last_sgpr
; ++i
)
5852 shader
->info
.num_input_sgprs
+= llvm_get_type_size(params
[i
]) / 4;
5854 for (; i
< num_params
; ++i
)
5855 shader
->info
.num_input_vgprs
+= llvm_get_type_size(params
[i
]) / 4;
5857 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5858 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5860 if (!ctx
->screen
->has_ds_bpermute
&&
5862 (bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX
] > 0 ||
5863 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY
] > 0 ||
5864 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX_FINE
] > 0 ||
5865 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY_FINE
] > 0 ||
5866 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_OFFSET
] > 0 ||
5867 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_SAMPLE
] > 0))
5869 LLVMAddGlobalInAddressSpace(gallivm
->module
,
5870 LLVMArrayType(ctx
->i32
, 64),
5874 if ((ctx
->type
== PIPE_SHADER_VERTEX
&& shader
->key
.as_ls
) ||
5875 ctx
->type
== PIPE_SHADER_TESS_CTRL
)
5876 declare_tess_lds(ctx
);
5880 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5883 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5885 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5886 LLVMBuilderRef builder
= gallivm
->builder
;
5888 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5889 SI_PARAM_RW_BUFFERS
);
5891 if ((ctx
->type
== PIPE_SHADER_VERTEX
&&
5892 ctx
->shader
->key
.as_es
) ||
5893 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
5894 ctx
->shader
->key
.as_es
) ||
5895 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5897 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5899 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5902 ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
5905 if (ctx
->shader
->is_gs_copy_shader
) {
5906 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5909 ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
5910 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5911 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5912 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5913 LLVMValueRef base_ring
;
5915 base_ring
= ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
5917 /* The conceptual layout of the GSVS ring is
5918 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5919 * but the real memory layout is swizzled across
5921 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5923 * Override the buffer descriptor accordingly.
5925 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5926 uint64_t stream_offset
= 0;
5928 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5929 unsigned num_components
;
5931 unsigned num_records
;
5932 LLVMValueRef ring
, tmp
;
5934 num_components
= sel
->info
.num_stream_output_components
[stream
];
5935 if (!num_components
)
5938 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5940 /* Limit on the stride field for <= CIK. */
5941 assert(stride
< (1 << 14));
5945 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5946 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5947 tmp
= LLVMBuildAdd(builder
, tmp
,
5948 LLVMConstInt(ctx
->i64
,
5949 stream_offset
, 0), "");
5950 stream_offset
+= stride
* 64;
5952 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5953 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5954 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5955 tmp
= LLVMBuildOr(builder
, tmp
,
5956 LLVMConstInt(ctx
->i32
,
5957 S_008F04_STRIDE(stride
) |
5958 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5959 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5960 ring
= LLVMBuildInsertElement(builder
, ring
,
5961 LLVMConstInt(ctx
->i32
, num_records
, 0),
5962 LLVMConstInt(ctx
->i32
, 2, 0), "");
5963 ring
= LLVMBuildInsertElement(builder
, ring
,
5964 LLVMConstInt(ctx
->i32
,
5965 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5966 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5967 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5968 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5969 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5970 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5971 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5972 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5973 S_008F0C_ADD_TID_ENABLE(1),
5975 LLVMConstInt(ctx
->i32
, 3, 0), "");
5976 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v16i8
, "");
5978 ctx
->gsvs_ring
[stream
] = ring
;
5983 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5984 LLVMValueRef param_rw_buffers
,
5985 unsigned param_pos_fixed_pt
)
5987 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5988 LLVMBuilderRef builder
= gallivm
->builder
;
5989 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5991 /* Use the fixed-point gl_FragCoord input.
5992 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5993 * per coordinate to get the repeating effect.
5995 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5996 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5998 /* Load the buffer descriptor. */
5999 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
6000 desc
= ac_build_indexed_load_const(&ctx
->ac
, param_rw_buffers
, slot
);
6002 /* The stipple pattern is 32x32, each row has 32 bits. */
6003 offset
= LLVMBuildMul(builder
, address
[1],
6004 LLVMConstInt(ctx
->i32
, 4, 0), "");
6005 row
= buffer_load_const(ctx
, desc
, offset
);
6006 row
= LLVMBuildBitCast(builder
, row
, ctx
->i32
, "");
6007 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
6008 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
6010 /* The intrinsic kills the thread if arg < 0. */
6011 bit
= LLVMBuildSelect(builder
, bit
, LLVMConstReal(ctx
->f32
, 0),
6012 LLVMConstReal(ctx
->f32
, -1), "");
6013 ac_build_kill(&ctx
->ac
, bit
);
6016 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
6017 struct si_shader_config
*conf
,
6018 unsigned symbol_offset
)
6021 const unsigned char *config
=
6022 ac_shader_binary_config_start(binary
, symbol_offset
);
6023 bool really_needs_scratch
= false;
6025 /* LLVM adds SGPR spills to the scratch size.
6026 * Find out if we really need the scratch buffer.
6028 for (i
= 0; i
< binary
->reloc_count
; i
++) {
6029 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
6031 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
6032 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
6033 really_needs_scratch
= true;
6038 /* XXX: We may be able to emit some of these values directly rather than
6039 * extracting fields to be emitted later.
6042 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
6043 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
6044 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
6046 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
6047 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
6048 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
6049 case R_00B848_COMPUTE_PGM_RSRC1
:
6050 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
6051 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
6052 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
6053 conf
->rsrc1
= value
;
6055 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
6056 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
6058 case R_00B84C_COMPUTE_PGM_RSRC2
:
6059 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
6060 conf
->rsrc2
= value
;
6062 case R_0286CC_SPI_PS_INPUT_ENA
:
6063 conf
->spi_ps_input_ena
= value
;
6065 case R_0286D0_SPI_PS_INPUT_ADDR
:
6066 conf
->spi_ps_input_addr
= value
;
6068 case R_0286E8_SPI_TMPRING_SIZE
:
6069 case R_00B860_COMPUTE_TMPRING_SIZE
:
6070 /* WAVESIZE is in units of 256 dwords. */
6071 if (really_needs_scratch
)
6072 conf
->scratch_bytes_per_wave
=
6073 G_00B860_WAVESIZE(value
) * 256 * 4;
6075 case 0x4: /* SPILLED_SGPRS */
6076 conf
->spilled_sgprs
= value
;
6078 case 0x8: /* SPILLED_VGPRS */
6079 conf
->spilled_vgprs
= value
;
6083 static bool printed
;
6086 fprintf(stderr
, "Warning: LLVM emitted unknown "
6087 "config register: 0x%x\n", reg
);
6095 if (!conf
->spi_ps_input_addr
)
6096 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
6099 void si_shader_apply_scratch_relocs(struct si_context
*sctx
,
6100 struct si_shader
*shader
,
6101 struct si_shader_config
*config
,
6102 uint64_t scratch_va
)
6105 uint32_t scratch_rsrc_dword0
= scratch_va
;
6106 uint32_t scratch_rsrc_dword1
=
6107 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
6109 /* Enable scratch coalescing if LLVM sets ELEMENT_SIZE & INDEX_STRIDE
6112 if (HAVE_LLVM
>= 0x0309)
6113 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
6115 scratch_rsrc_dword1
|=
6116 S_008F04_STRIDE(config
->scratch_bytes_per_wave
/ 64);
6118 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
6119 const struct ac_shader_reloc
*reloc
=
6120 &shader
->binary
.relocs
[i
];
6121 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
6122 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
6123 &scratch_rsrc_dword0
, 4);
6124 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
6125 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
6126 &scratch_rsrc_dword1
, 4);
6131 static unsigned si_get_shader_binary_size(struct si_shader
*shader
)
6133 unsigned size
= shader
->binary
.code_size
;
6136 size
+= shader
->prolog
->binary
.code_size
;
6138 size
+= shader
->epilog
->binary
.code_size
;
6142 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
6144 const struct ac_shader_binary
*prolog
=
6145 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
6146 const struct ac_shader_binary
*epilog
=
6147 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
6148 const struct ac_shader_binary
*mainb
= &shader
->binary
;
6149 unsigned bo_size
= si_get_shader_binary_size(shader
) +
6150 (!epilog
? mainb
->rodata_size
: 0);
6153 assert(!prolog
|| !prolog
->rodata_size
);
6154 assert((!prolog
&& !epilog
) || !mainb
->rodata_size
);
6155 assert(!epilog
|| !epilog
->rodata_size
);
6157 /* GFX9 can fetch at most 128 bytes past the end of the shader.
6158 * Prevent VM faults.
6160 if (sscreen
->b
.chip_class
>= GFX9
)
6163 r600_resource_reference(&shader
->bo
, NULL
);
6164 shader
->bo
= (struct r600_resource
*)
6165 pipe_buffer_create(&sscreen
->b
.b
, 0,
6166 PIPE_USAGE_IMMUTABLE
,
6167 align(bo_size
, SI_CPDMA_ALIGNMENT
));
6172 ptr
= sscreen
->b
.ws
->buffer_map(shader
->bo
->buf
, NULL
,
6173 PIPE_TRANSFER_READ_WRITE
);
6176 util_memcpy_cpu_to_le32(ptr
, prolog
->code
, prolog
->code_size
);
6177 ptr
+= prolog
->code_size
;
6180 util_memcpy_cpu_to_le32(ptr
, mainb
->code
, mainb
->code_size
);
6181 ptr
+= mainb
->code_size
;
6184 util_memcpy_cpu_to_le32(ptr
, epilog
->code
, epilog
->code_size
);
6185 else if (mainb
->rodata_size
> 0)
6186 util_memcpy_cpu_to_le32(ptr
, mainb
->rodata
, mainb
->rodata_size
);
6188 sscreen
->b
.ws
->buffer_unmap(shader
->bo
->buf
);
6192 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
6193 struct pipe_debug_callback
*debug
,
6194 const char *name
, FILE *file
)
6199 if (binary
->disasm_string
) {
6200 fprintf(file
, "Shader %s disassembly:\n", name
);
6201 fprintf(file
, "%s", binary
->disasm_string
);
6203 if (debug
&& debug
->debug_message
) {
6204 /* Very long debug messages are cut off, so send the
6205 * disassembly one line at a time. This causes more
6206 * overhead, but on the plus side it simplifies
6207 * parsing of resulting logs.
6209 pipe_debug_message(debug
, SHADER_INFO
,
6210 "Shader Disassembly Begin");
6212 line
= binary
->disasm_string
;
6214 p
= util_strchrnul(line
, '\n');
6218 pipe_debug_message(debug
, SHADER_INFO
,
6219 "%.*s", count
, line
);
6227 pipe_debug_message(debug
, SHADER_INFO
,
6228 "Shader Disassembly End");
6231 fprintf(file
, "Shader %s binary:\n", name
);
6232 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
6233 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
6234 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
6235 binary
->code
[i
+ 1], binary
->code
[i
]);
6240 static void si_shader_dump_stats(struct si_screen
*sscreen
,
6241 struct si_shader
*shader
,
6242 struct pipe_debug_callback
*debug
,
6245 bool check_debug_option
)
6247 struct si_shader_config
*conf
= &shader
->config
;
6248 unsigned num_inputs
= shader
->selector
? shader
->selector
->info
.num_inputs
: 0;
6249 unsigned code_size
= si_get_shader_binary_size(shader
);
6250 unsigned lds_increment
= sscreen
->b
.chip_class
>= CIK
? 512 : 256;
6251 unsigned lds_per_wave
= 0;
6252 unsigned max_simd_waves
= 10;
6254 /* Compute LDS usage for PS. */
6255 switch (processor
) {
6256 case PIPE_SHADER_FRAGMENT
:
6257 /* The minimum usage per wave is (num_inputs * 48). The maximum
6258 * usage is (num_inputs * 48 * 16).
6259 * We can get anything in between and it varies between waves.
6261 * The 48 bytes per input for a single primitive is equal to
6262 * 4 bytes/component * 4 components/input * 3 points.
6264 * Other stages don't know the size at compile time or don't
6265 * allocate LDS per wave, but instead they do it per thread group.
6267 lds_per_wave
= conf
->lds_size
* lds_increment
+
6268 align(num_inputs
* 48, lds_increment
);
6270 case PIPE_SHADER_COMPUTE
:
6271 if (shader
->selector
) {
6272 unsigned max_workgroup_size
=
6273 si_get_max_workgroup_size(shader
);
6274 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
6275 DIV_ROUND_UP(max_workgroup_size
, 64);
6280 /* Compute the per-SIMD wave counts. */
6281 if (conf
->num_sgprs
) {
6282 if (sscreen
->b
.chip_class
>= VI
)
6283 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
6285 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
6288 if (conf
->num_vgprs
)
6289 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
6291 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
6292 * 16KB makes some SIMDs unoccupied). */
6294 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
6296 if (!check_debug_option
||
6297 r600_can_dump_shader(&sscreen
->b
, processor
)) {
6298 if (processor
== PIPE_SHADER_FRAGMENT
) {
6299 fprintf(file
, "*** SHADER CONFIG ***\n"
6300 "SPI_PS_INPUT_ADDR = 0x%04x\n"
6301 "SPI_PS_INPUT_ENA = 0x%04x\n",
6302 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
6305 fprintf(file
, "*** SHADER STATS ***\n"
6308 "Spilled SGPRs: %d\n"
6309 "Spilled VGPRs: %d\n"
6310 "Private memory VGPRs: %d\n"
6311 "Code Size: %d bytes\n"
6313 "Scratch: %d bytes per wave\n"
6315 "********************\n\n\n",
6316 conf
->num_sgprs
, conf
->num_vgprs
,
6317 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
6318 conf
->private_mem_vgprs
, code_size
,
6319 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6323 pipe_debug_message(debug
, SHADER_INFO
,
6324 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
6325 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
6326 "Spilled VGPRs: %d PrivMem VGPRs: %d",
6327 conf
->num_sgprs
, conf
->num_vgprs
, code_size
,
6328 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6329 max_simd_waves
, conf
->spilled_sgprs
,
6330 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
6333 const char *si_get_shader_name(struct si_shader
*shader
, unsigned processor
)
6335 switch (processor
) {
6336 case PIPE_SHADER_VERTEX
:
6337 if (shader
->key
.as_es
)
6338 return "Vertex Shader as ES";
6339 else if (shader
->key
.as_ls
)
6340 return "Vertex Shader as LS";
6342 return "Vertex Shader as VS";
6343 case PIPE_SHADER_TESS_CTRL
:
6344 return "Tessellation Control Shader";
6345 case PIPE_SHADER_TESS_EVAL
:
6346 if (shader
->key
.as_es
)
6347 return "Tessellation Evaluation Shader as ES";
6349 return "Tessellation Evaluation Shader as VS";
6350 case PIPE_SHADER_GEOMETRY
:
6351 if (shader
->is_gs_copy_shader
)
6352 return "GS Copy Shader as VS";
6354 return "Geometry Shader";
6355 case PIPE_SHADER_FRAGMENT
:
6356 return "Pixel Shader";
6357 case PIPE_SHADER_COMPUTE
:
6358 return "Compute Shader";
6360 return "Unknown Shader";
6364 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
6365 struct pipe_debug_callback
*debug
, unsigned processor
,
6366 FILE *file
, bool check_debug_option
)
6368 if (!check_debug_option
||
6369 r600_can_dump_shader(&sscreen
->b
, processor
))
6370 si_dump_shader_key(processor
, &shader
->key
, file
);
6372 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
6373 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
6374 si_get_shader_name(shader
, processor
));
6375 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
6378 if (!check_debug_option
||
6379 (r600_can_dump_shader(&sscreen
->b
, processor
) &&
6380 !(sscreen
->b
.debug_flags
& DBG_NO_ASM
))) {
6381 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
6384 si_shader_dump_disassembly(&shader
->prolog
->binary
,
6385 debug
, "prolog", file
);
6387 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
6390 si_shader_dump_disassembly(&shader
->epilog
->binary
,
6391 debug
, "epilog", file
);
6392 fprintf(file
, "\n");
6395 si_shader_dump_stats(sscreen
, shader
, debug
, processor
, file
,
6396 check_debug_option
);
6399 int si_compile_llvm(struct si_screen
*sscreen
,
6400 struct ac_shader_binary
*binary
,
6401 struct si_shader_config
*conf
,
6402 LLVMTargetMachineRef tm
,
6404 struct pipe_debug_callback
*debug
,
6409 unsigned count
= p_atomic_inc_return(&sscreen
->b
.num_compilations
);
6411 if (r600_can_dump_shader(&sscreen
->b
, processor
)) {
6412 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
6414 if (!(sscreen
->b
.debug_flags
& (DBG_NO_IR
| DBG_PREOPT_IR
))) {
6415 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
6416 ac_dump_module(mod
);
6417 fprintf(stderr
, "\n");
6421 if (sscreen
->record_llvm_ir
) {
6422 char *ir
= LLVMPrintModuleToString(mod
);
6423 binary
->llvm_ir_string
= strdup(ir
);
6424 LLVMDisposeMessage(ir
);
6427 if (!si_replace_shader(count
, binary
)) {
6428 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
6433 si_shader_binary_read_config(binary
, conf
, 0);
6435 /* Enable 64-bit and 16-bit denormals, because there is no performance
6438 * If denormals are enabled, all floating-point output modifiers are
6441 * Don't enable denormals for 32-bit floats, because:
6442 * - Floating-point output modifiers would be ignored by the hw.
6443 * - Some opcodes don't support denormals, such as v_mad_f32. We would
6444 * have to stop using those.
6445 * - SI & CI would be very slow.
6447 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
6449 FREE(binary
->config
);
6450 FREE(binary
->global_symbol_offsets
);
6451 binary
->config
= NULL
;
6452 binary
->global_symbol_offsets
= NULL
;
6454 /* Some shaders can't have rodata because their binaries can be
6457 if (binary
->rodata_size
&&
6458 (processor
== PIPE_SHADER_VERTEX
||
6459 processor
== PIPE_SHADER_TESS_CTRL
||
6460 processor
== PIPE_SHADER_TESS_EVAL
||
6461 processor
== PIPE_SHADER_FRAGMENT
)) {
6462 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
6469 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
6471 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6472 LLVMBuildRetVoid(ctx
->gallivm
.builder
);
6474 LLVMBuildRet(ctx
->gallivm
.builder
, ret
);
6477 /* Generate code for the hardware VS shader stage to go with a geometry shader */
6479 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
6480 LLVMTargetMachineRef tm
,
6481 struct si_shader_selector
*gs_selector
,
6482 struct pipe_debug_callback
*debug
)
6484 struct si_shader_context ctx
;
6485 struct si_shader
*shader
;
6486 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
6487 LLVMBuilderRef builder
;
6488 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
6489 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
6490 struct si_shader_output_values
*outputs
;
6491 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
6494 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
6499 shader
= CALLOC_STRUCT(si_shader
);
6506 shader
->selector
= gs_selector
;
6507 shader
->is_gs_copy_shader
= true;
6509 si_init_shader_ctx(&ctx
, sscreen
, shader
, tm
);
6510 ctx
.type
= PIPE_SHADER_VERTEX
;
6512 builder
= gallivm
->builder
;
6514 create_function(&ctx
);
6515 preload_ring_buffers(&ctx
);
6517 LLVMValueRef voffset
=
6518 lp_build_mul_imm(uint
, LLVMGetParam(ctx
.main_fn
,
6519 ctx
.param_vertex_id
), 4);
6521 /* Fetch the vertex stream ID.*/
6522 LLVMValueRef stream_id
;
6524 if (gs_selector
->so
.num_outputs
)
6525 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
6527 stream_id
= ctx
.i32_0
;
6529 /* Fill in output information. */
6530 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
6531 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
6532 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
6534 for (int chan
= 0; chan
< 4; chan
++) {
6535 outputs
[i
].vertex_stream
[chan
] =
6536 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
6540 LLVMBasicBlockRef end_bb
;
6541 LLVMValueRef switch_inst
;
6543 end_bb
= LLVMAppendBasicBlockInContext(gallivm
->context
, ctx
.main_fn
, "end");
6544 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
6546 for (int stream
= 0; stream
< 4; stream
++) {
6547 LLVMBasicBlockRef bb
;
6550 if (!gsinfo
->num_stream_output_components
[stream
])
6553 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
6556 bb
= LLVMInsertBasicBlockInContext(gallivm
->context
, end_bb
, "out");
6557 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
6558 LLVMPositionBuilderAtEnd(builder
, bb
);
6560 /* Fetch vertex data from GSVS ring */
6562 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
6563 for (unsigned chan
= 0; chan
< 4; chan
++) {
6564 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
6565 outputs
[i
].vertex_stream
[chan
] != stream
) {
6566 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
6570 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
6571 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
6574 outputs
[i
].values
[chan
] =
6575 ac_build_buffer_load(&ctx
.ac
,
6576 ctx
.gsvs_ring
[0], 1,
6578 soffset
, 0, 1, 1, true);
6582 /* Streamout and exports. */
6583 if (gs_selector
->so
.num_outputs
) {
6584 si_llvm_emit_streamout(&ctx
, outputs
,
6585 gsinfo
->num_outputs
,
6590 si_llvm_export_vs(bld_base
, outputs
, gsinfo
->num_outputs
);
6592 LLVMBuildBr(builder
, end_bb
);
6595 LLVMPositionBuilderAtEnd(builder
, end_bb
);
6597 LLVMBuildRetVoid(gallivm
->builder
);
6599 /* Dump LLVM IR before any optimization passes */
6600 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
6601 r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6602 ac_dump_module(ctx
.gallivm
.module
);
6604 si_llvm_finalize_module(&ctx
,
6605 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_GEOMETRY
));
6607 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
6608 &ctx
.shader
->config
, ctx
.tm
,
6610 debug
, PIPE_SHADER_GEOMETRY
,
6613 if (r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6614 fprintf(stderr
, "GS Copy Shader:\n");
6615 si_shader_dump(sscreen
, ctx
.shader
, debug
,
6616 PIPE_SHADER_GEOMETRY
, stderr
, true);
6617 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
6620 si_llvm_dispose(&ctx
);
6631 static void si_dump_shader_key(unsigned shader
, struct si_shader_key
*key
,
6636 fprintf(f
, "SHADER KEY\n");
6639 case PIPE_SHADER_VERTEX
:
6640 fprintf(f
, " part.vs.prolog.instance_divisors = {");
6641 for (i
= 0; i
< ARRAY_SIZE(key
->part
.vs
.prolog
.instance_divisors
); i
++)
6642 fprintf(f
, !i
? "%u" : ", %u",
6643 key
->part
.vs
.prolog
.instance_divisors
[i
]);
6645 fprintf(f
, " part.vs.epilog.export_prim_id = %u\n", key
->part
.vs
.epilog
.export_prim_id
);
6646 fprintf(f
, " as_es = %u\n", key
->as_es
);
6647 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
6649 fprintf(f
, " mono.vs.fix_fetch = {");
6650 for (i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
6651 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs
.fix_fetch
[i
]);
6655 case PIPE_SHADER_TESS_CTRL
:
6656 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
6657 fprintf(f
, " mono.tcs.inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.tcs
.inputs_to_copy
);
6660 case PIPE_SHADER_TESS_EVAL
:
6661 fprintf(f
, " part.tes.epilog.export_prim_id = %u\n", key
->part
.tes
.epilog
.export_prim_id
);
6662 fprintf(f
, " as_es = %u\n", key
->as_es
);
6665 case PIPE_SHADER_GEOMETRY
:
6666 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
6669 case PIPE_SHADER_COMPUTE
:
6672 case PIPE_SHADER_FRAGMENT
:
6673 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
6674 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
6675 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
6676 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
6677 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
6678 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
6679 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
6680 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
6681 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
6682 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
6683 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
6684 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
6685 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
6686 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
6687 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
6688 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
6689 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
6696 if ((shader
== PIPE_SHADER_GEOMETRY
||
6697 shader
== PIPE_SHADER_TESS_EVAL
||
6698 shader
== PIPE_SHADER_VERTEX
) &&
6699 !key
->as_es
&& !key
->as_ls
) {
6700 fprintf(f
, " opt.hw_vs.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.hw_vs
.kill_outputs
);
6701 fprintf(f
, " opt.hw_vs.kill_outputs2 = 0x%x\n", key
->opt
.hw_vs
.kill_outputs2
);
6702 fprintf(f
, " opt.hw_vs.clip_disable = %u\n", key
->opt
.hw_vs
.clip_disable
);
6706 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
6707 struct si_screen
*sscreen
,
6708 struct si_shader
*shader
,
6709 LLVMTargetMachineRef tm
)
6711 struct lp_build_tgsi_context
*bld_base
;
6712 struct lp_build_tgsi_action tmpl
= {};
6714 si_llvm_context_init(ctx
, sscreen
, shader
, tm
,
6715 (shader
&& shader
->selector
) ? &shader
->selector
->info
: NULL
,
6716 (shader
&& shader
->selector
) ? shader
->selector
->tokens
: NULL
);
6718 bld_base
= &ctx
->bld_base
;
6719 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
6721 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
6722 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
6723 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
6725 bld_base
->op_actions
[TGSI_OPCODE_TEX
] = tex_action
;
6726 bld_base
->op_actions
[TGSI_OPCODE_TEX_LZ
] = tex_action
;
6727 bld_base
->op_actions
[TGSI_OPCODE_TEX2
] = tex_action
;
6728 bld_base
->op_actions
[TGSI_OPCODE_TXB
] = tex_action
;
6729 bld_base
->op_actions
[TGSI_OPCODE_TXB2
] = tex_action
;
6730 bld_base
->op_actions
[TGSI_OPCODE_TXD
] = tex_action
;
6731 bld_base
->op_actions
[TGSI_OPCODE_TXF
] = tex_action
;
6732 bld_base
->op_actions
[TGSI_OPCODE_TXF_LZ
] = tex_action
;
6733 bld_base
->op_actions
[TGSI_OPCODE_TXL
] = tex_action
;
6734 bld_base
->op_actions
[TGSI_OPCODE_TXL2
] = tex_action
;
6735 bld_base
->op_actions
[TGSI_OPCODE_TXP
] = tex_action
;
6736 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].fetch_args
= txq_fetch_args
;
6737 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].emit
= txq_emit
;
6738 bld_base
->op_actions
[TGSI_OPCODE_TG4
] = tex_action
;
6739 bld_base
->op_actions
[TGSI_OPCODE_LODQ
] = tex_action
;
6740 bld_base
->op_actions
[TGSI_OPCODE_TXQS
].emit
= si_llvm_emit_txqs
;
6742 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].fetch_args
= load_fetch_args
;
6743 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].emit
= load_emit
;
6744 bld_base
->op_actions
[TGSI_OPCODE_STORE
].fetch_args
= store_fetch_args
;
6745 bld_base
->op_actions
[TGSI_OPCODE_STORE
].emit
= store_emit
;
6746 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].fetch_args
= resq_fetch_args
;
6747 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].emit
= resq_emit
;
6749 tmpl
.fetch_args
= atomic_fetch_args
;
6750 tmpl
.emit
= atomic_emit
;
6751 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
] = tmpl
;
6752 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
].intr_name
= "add";
6753 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
] = tmpl
;
6754 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
].intr_name
= "swap";
6755 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
] = tmpl
;
6756 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
].intr_name
= "cmpswap";
6757 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
] = tmpl
;
6758 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
].intr_name
= "and";
6759 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
] = tmpl
;
6760 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
].intr_name
= "or";
6761 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
] = tmpl
;
6762 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
].intr_name
= "xor";
6763 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
] = tmpl
;
6764 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
].intr_name
= "umin";
6765 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
] = tmpl
;
6766 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
].intr_name
= "umax";
6767 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
] = tmpl
;
6768 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
].intr_name
= "smin";
6769 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
] = tmpl
;
6770 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
].intr_name
= "smax";
6772 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
6774 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
6776 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
6777 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
6778 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
6779 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
6781 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
6782 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
6783 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
6784 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
6785 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
6786 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
6787 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
6788 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
6789 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
6791 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_llvm_emit_vertex
;
6792 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_llvm_emit_primitive
;
6793 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6796 #define EXP_TARGET (HAVE_LLVM >= 0x0500 ? 0 : 3)
6797 #define EXP_OUT0 (HAVE_LLVM >= 0x0500 ? 2 : 5)
6799 /* Return true if the PARAM export has been eliminated. */
6800 static bool si_eliminate_const_output(struct si_shader_context
*ctx
,
6801 LLVMValueRef inst
, unsigned offset
)
6803 struct si_shader
*shader
= ctx
->shader
;
6804 unsigned num_outputs
= shader
->selector
->info
.num_outputs
;
6805 unsigned i
, default_val
; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
6806 bool is_zero
[4] = {}, is_one
[4] = {};
6808 for (i
= 0; i
< 4; i
++) {
6809 LLVMBool loses_info
;
6810 LLVMValueRef p
= LLVMGetOperand(inst
, EXP_OUT0
+ i
);
6812 /* It's a constant expression. Undef outputs are eliminated too. */
6813 if (LLVMIsUndef(p
)) {
6816 } else if (LLVMIsAConstantFP(p
)) {
6817 double a
= LLVMConstRealGetDouble(p
, &loses_info
);
6824 return false; /* other constant */
6829 /* Only certain combinations of 0 and 1 can be eliminated. */
6830 if (is_zero
[0] && is_zero
[1] && is_zero
[2])
6831 default_val
= is_zero
[3] ? 0 : 1;
6832 else if (is_one
[0] && is_one
[1] && is_one
[2])
6833 default_val
= is_zero
[3] ? 2 : 3;
6837 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
6838 LLVMInstructionEraseFromParent(inst
);
6840 /* Change OFFSET to DEFAULT_VAL. */
6841 for (i
= 0; i
< num_outputs
; i
++) {
6842 if (shader
->info
.vs_output_param_offset
[i
] == offset
) {
6843 shader
->info
.vs_output_param_offset
[i
] =
6844 EXP_PARAM_DEFAULT_VAL_0000
+ default_val
;
6851 struct si_vs_exports
{
6853 unsigned offset
[SI_MAX_VS_OUTPUTS
];
6854 LLVMValueRef inst
[SI_MAX_VS_OUTPUTS
];
6857 static void si_eliminate_const_vs_outputs(struct si_shader_context
*ctx
)
6859 struct si_shader
*shader
= ctx
->shader
;
6860 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6861 LLVMBasicBlockRef bb
;
6862 struct si_vs_exports exports
;
6863 bool removed_any
= false;
6867 if (ctx
->type
== PIPE_SHADER_FRAGMENT
||
6868 ctx
->type
== PIPE_SHADER_COMPUTE
||
6869 shader
->key
.as_es
||
6873 /* Process all LLVM instructions. */
6874 bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
6876 LLVMValueRef inst
= LLVMGetFirstInstruction(bb
);
6879 LLVMValueRef cur
= inst
;
6880 inst
= LLVMGetNextInstruction(inst
);
6882 if (LLVMGetInstructionOpcode(cur
) != LLVMCall
)
6885 LLVMValueRef callee
= lp_get_called_value(cur
);
6887 if (!lp_is_function(callee
))
6890 const char *name
= LLVMGetValueName(callee
);
6891 unsigned num_args
= LLVMCountParams(callee
);
6893 /* Check if this is an export instruction. */
6894 if ((num_args
!= 9 && num_args
!= 8) ||
6895 (strcmp(name
, "llvm.SI.export") &&
6896 strcmp(name
, "llvm.amdgcn.exp.f32")))
6899 LLVMValueRef arg
= LLVMGetOperand(cur
, EXP_TARGET
);
6900 unsigned target
= LLVMConstIntGetZExtValue(arg
);
6902 if (target
< V_008DFC_SQ_EXP_PARAM
)
6905 target
-= V_008DFC_SQ_EXP_PARAM
;
6907 /* Eliminate constant value PARAM exports. */
6908 if (si_eliminate_const_output(ctx
, cur
, target
)) {
6911 exports
.offset
[exports
.num
] = target
;
6912 exports
.inst
[exports
.num
] = cur
;
6916 bb
= LLVMGetNextBasicBlock(bb
);
6919 /* Remove holes in export memory due to removed PARAM exports.
6920 * This is done by renumbering all PARAM exports.
6923 ubyte current_offset
[SI_MAX_VS_OUTPUTS
];
6924 unsigned new_count
= 0;
6927 /* Make a copy of the offsets. We need the old version while
6928 * we are modifying some of them. */
6929 assert(sizeof(current_offset
) ==
6930 sizeof(shader
->info
.vs_output_param_offset
));
6931 memcpy(current_offset
, shader
->info
.vs_output_param_offset
,
6932 sizeof(current_offset
));
6934 for (i
= 0; i
< exports
.num
; i
++) {
6935 unsigned offset
= exports
.offset
[i
];
6937 for (out
= 0; out
< info
->num_outputs
; out
++) {
6938 if (current_offset
[out
] != offset
)
6941 LLVMSetOperand(exports
.inst
[i
], EXP_TARGET
,
6942 LLVMConstInt(ctx
->i32
,
6943 V_008DFC_SQ_EXP_PARAM
+ new_count
, 0));
6944 shader
->info
.vs_output_param_offset
[out
] = new_count
;
6949 shader
->info
.nr_param_exports
= new_count
;
6953 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
6955 ctx
->shader
->config
.private_mem_vgprs
= 0;
6957 /* Process all LLVM instructions. */
6958 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
6960 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
6963 LLVMValueRef inst
= next
;
6964 next
= LLVMGetNextInstruction(next
);
6966 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
6969 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
6970 /* No idea why LLVM aligns allocas to 4 elements. */
6971 unsigned alignment
= LLVMGetAlignment(inst
);
6972 unsigned dw_size
= align(llvm_get_type_size(type
) / 4, alignment
);
6973 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
6975 bb
= LLVMGetNextBasicBlock(bb
);
6979 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
6980 struct si_shader
*shader
)
6982 struct si_shader_selector
*sel
= shader
->selector
;
6983 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6985 switch (ctx
->type
) {
6986 case PIPE_SHADER_VERTEX
:
6987 ctx
->load_input
= declare_input_vs
;
6988 if (shader
->key
.as_ls
)
6989 bld_base
->emit_epilogue
= si_llvm_emit_ls_epilogue
;
6990 else if (shader
->key
.as_es
)
6991 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
6993 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
6995 case PIPE_SHADER_TESS_CTRL
:
6996 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6997 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6998 bld_base
->emit_store
= store_output_tcs
;
6999 bld_base
->emit_epilogue
= si_llvm_emit_tcs_epilogue
;
7001 case PIPE_SHADER_TESS_EVAL
:
7002 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
7003 if (shader
->key
.as_es
)
7004 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
7006 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
7008 case PIPE_SHADER_GEOMETRY
:
7009 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
7010 bld_base
->emit_epilogue
= si_llvm_emit_gs_epilogue
;
7012 case PIPE_SHADER_FRAGMENT
:
7013 ctx
->load_input
= declare_input_fs
;
7014 bld_base
->emit_epilogue
= si_llvm_return_fs_outputs
;
7016 case PIPE_SHADER_COMPUTE
:
7017 ctx
->declare_memory_region
= declare_compute_memory
;
7020 assert(!"Unsupported shader type");
7024 create_function(ctx
);
7025 preload_ring_buffers(ctx
);
7027 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
7029 for (i
= 0; i
< 4; i
++) {
7030 ctx
->gs_next_vertex
[i
] =
7031 lp_build_alloca(&ctx
->gallivm
,
7036 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
7037 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
7041 si_llvm_build_ret(ctx
, ctx
->return_value
);
7046 * Compute the VS prolog key, which contains all the information needed to
7047 * build the VS prolog function, and set shader->info bits where needed.
7049 static void si_get_vs_prolog_key(struct si_shader
*shader
,
7050 union si_shader_part_key
*key
)
7052 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7054 memset(key
, 0, sizeof(*key
));
7055 key
->vs_prolog
.states
= shader
->key
.part
.vs
.prolog
;
7056 key
->vs_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
7057 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
7059 /* Set the instanceID flag. */
7060 for (unsigned i
= 0; i
< info
->num_inputs
; i
++)
7061 if (key
->vs_prolog
.states
.instance_divisors
[i
])
7062 shader
->info
.uses_instanceid
= true;
7066 * Compute the VS epilog key, which contains all the information needed to
7067 * build the VS epilog function, and set the PrimitiveID output offset.
7069 static void si_get_vs_epilog_key(struct si_shader
*shader
,
7070 struct si_vs_epilog_bits
*states
,
7071 union si_shader_part_key
*key
)
7073 memset(key
, 0, sizeof(*key
));
7074 key
->vs_epilog
.states
= *states
;
7076 /* Set up the PrimitiveID output. */
7077 if (shader
->key
.part
.vs
.epilog
.export_prim_id
) {
7078 unsigned index
= shader
->selector
->info
.num_outputs
;
7079 unsigned offset
= shader
->info
.nr_param_exports
++;
7081 key
->vs_epilog
.prim_id_param_offset
= offset
;
7082 assert(index
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
7083 shader
->info
.vs_output_param_offset
[index
] = offset
;
7088 * Compute the PS prolog key, which contains all the information needed to
7089 * build the PS prolog function, and set related bits in shader->config.
7091 static void si_get_ps_prolog_key(struct si_shader
*shader
,
7092 union si_shader_part_key
*key
,
7093 bool separate_prolog
)
7095 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7097 memset(key
, 0, sizeof(*key
));
7098 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
7099 key
->ps_prolog
.colors_read
= info
->colors_read
;
7100 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
7101 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
7102 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
7103 (key
->ps_prolog
.colors_read
||
7104 key
->ps_prolog
.states
.force_persp_sample_interp
||
7105 key
->ps_prolog
.states
.force_linear_sample_interp
||
7106 key
->ps_prolog
.states
.force_persp_center_interp
||
7107 key
->ps_prolog
.states
.force_linear_center_interp
||
7108 key
->ps_prolog
.states
.bc_optimize_for_persp
||
7109 key
->ps_prolog
.states
.bc_optimize_for_linear
);
7111 if (info
->colors_read
) {
7112 unsigned *color
= shader
->selector
->color_attr_index
;
7114 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
7115 /* BCOLORs are stored after the last input. */
7116 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
7117 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
7118 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
7121 for (unsigned i
= 0; i
< 2; i
++) {
7122 unsigned interp
= info
->input_interpolate
[color
[i
]];
7123 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
7125 if (!(info
->colors_read
& (0xf << i
*4)))
7128 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
7130 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
7131 interp
== TGSI_INTERPOLATE_COLOR
)
7132 interp
= TGSI_INTERPOLATE_CONSTANT
;
7135 case TGSI_INTERPOLATE_CONSTANT
:
7136 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
7138 case TGSI_INTERPOLATE_PERSPECTIVE
:
7139 case TGSI_INTERPOLATE_COLOR
:
7140 /* Force the interpolation location for colors here. */
7141 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
7142 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
7143 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
7144 location
= TGSI_INTERPOLATE_LOC_CENTER
;
7147 case TGSI_INTERPOLATE_LOC_SAMPLE
:
7148 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
7149 shader
->config
.spi_ps_input_ena
|=
7150 S_0286CC_PERSP_SAMPLE_ENA(1);
7152 case TGSI_INTERPOLATE_LOC_CENTER
:
7153 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
7154 shader
->config
.spi_ps_input_ena
|=
7155 S_0286CC_PERSP_CENTER_ENA(1);
7157 case TGSI_INTERPOLATE_LOC_CENTROID
:
7158 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
7159 shader
->config
.spi_ps_input_ena
|=
7160 S_0286CC_PERSP_CENTROID_ENA(1);
7166 case TGSI_INTERPOLATE_LINEAR
:
7167 /* Force the interpolation location for colors here. */
7168 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
7169 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
7170 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
7171 location
= TGSI_INTERPOLATE_LOC_CENTER
;
7173 /* The VGPR assignment for non-monolithic shaders
7174 * works because InitialPSInputAddr is set on the
7175 * main shader and PERSP_PULL_MODEL is never used.
7178 case TGSI_INTERPOLATE_LOC_SAMPLE
:
7179 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7180 separate_prolog
? 6 : 9;
7181 shader
->config
.spi_ps_input_ena
|=
7182 S_0286CC_LINEAR_SAMPLE_ENA(1);
7184 case TGSI_INTERPOLATE_LOC_CENTER
:
7185 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7186 separate_prolog
? 8 : 11;
7187 shader
->config
.spi_ps_input_ena
|=
7188 S_0286CC_LINEAR_CENTER_ENA(1);
7190 case TGSI_INTERPOLATE_LOC_CENTROID
:
7191 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7192 separate_prolog
? 10 : 13;
7193 shader
->config
.spi_ps_input_ena
|=
7194 S_0286CC_LINEAR_CENTROID_ENA(1);
7208 * Check whether a PS prolog is required based on the key.
7210 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
7212 return key
->ps_prolog
.colors_read
||
7213 key
->ps_prolog
.states
.force_persp_sample_interp
||
7214 key
->ps_prolog
.states
.force_linear_sample_interp
||
7215 key
->ps_prolog
.states
.force_persp_center_interp
||
7216 key
->ps_prolog
.states
.force_linear_center_interp
||
7217 key
->ps_prolog
.states
.bc_optimize_for_persp
||
7218 key
->ps_prolog
.states
.bc_optimize_for_linear
||
7219 key
->ps_prolog
.states
.poly_stipple
;
7223 * Compute the PS epilog key, which contains all the information needed to
7224 * build the PS epilog function.
7226 static void si_get_ps_epilog_key(struct si_shader
*shader
,
7227 union si_shader_part_key
*key
)
7229 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7230 memset(key
, 0, sizeof(*key
));
7231 key
->ps_epilog
.colors_written
= info
->colors_written
;
7232 key
->ps_epilog
.writes_z
= info
->writes_z
;
7233 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
7234 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
7235 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
7239 * Build the GS prolog function. Rotate the input vertices for triangle strips
7242 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
7243 union si_shader_part_key
*key
)
7245 const unsigned num_sgprs
= SI_GS_NUM_USER_SGPR
+ 2;
7246 const unsigned num_vgprs
= 8;
7247 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7248 LLVMBuilderRef builder
= gallivm
->builder
;
7249 LLVMTypeRef params
[32];
7250 LLVMTypeRef returns
[32];
7251 LLVMValueRef func
, ret
;
7253 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
7254 params
[i
] = ctx
->i32
;
7255 returns
[i
] = ctx
->i32
;
7258 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
7259 params
[num_sgprs
+ i
] = ctx
->i32
;
7260 returns
[num_sgprs
+ i
] = ctx
->f32
;
7263 /* Create the function. */
7264 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
7265 params
, num_sgprs
+ num_vgprs
, num_sgprs
- 1);
7266 func
= ctx
->main_fn
;
7268 /* Copy inputs to outputs. This should be no-op, as the registers match,
7269 * but it will prevent the compiler from overwriting them unintentionally.
7271 ret
= ctx
->return_value
;
7272 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
7273 LLVMValueRef p
= LLVMGetParam(func
, i
);
7274 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
7276 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
7277 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
7278 p
= LLVMBuildBitCast(builder
, p
, ctx
->f32
, "");
7279 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
7282 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
7283 /* Remap the input vertices for every other primitive. */
7284 const unsigned vtx_params
[6] = {
7292 LLVMValueRef prim_id
, rotate
;
7294 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
7295 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
7297 for (unsigned i
= 0; i
< 6; ++i
) {
7298 LLVMValueRef base
, rotated
, actual
;
7299 base
= LLVMGetParam(func
, vtx_params
[i
]);
7300 rotated
= LLVMGetParam(func
, vtx_params
[(i
+ 4) % 6]);
7301 actual
= LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
7302 actual
= LLVMBuildBitCast(builder
, actual
, ctx
->f32
, "");
7303 ret
= LLVMBuildInsertValue(builder
, ret
, actual
, vtx_params
[i
], "");
7307 LLVMBuildRet(builder
, ret
);
7311 * Given a list of shader part functions, build a wrapper function that
7312 * runs them in sequence to form a monolithic shader.
7314 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
7315 LLVMValueRef
*parts
,
7319 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7320 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
7321 /* PS epilog has one arg per color component */
7322 LLVMTypeRef param_types
[48];
7323 LLVMValueRef out
[48];
7324 LLVMTypeRef function_type
;
7325 unsigned num_params
;
7327 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
7328 unsigned num_sgprs
, num_vgprs
;
7329 unsigned last_sgpr_param
;
7332 for (unsigned i
= 0; i
< num_parts
; ++i
) {
7333 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
7334 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
7337 /* The parameters of the wrapper function correspond to those of the
7338 * first part in terms of SGPRs and VGPRs, but we use the types of the
7339 * main part to get the right types. This is relevant for the
7340 * dereferenceable attribute on descriptor table pointers.
7345 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
7346 num_params
= LLVMCountParamTypes(function_type
);
7348 for (unsigned i
= 0; i
< num_params
; ++i
) {
7349 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
7351 if (ac_is_sgpr_param(param
)) {
7352 assert(num_vgprs
== 0);
7353 num_sgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
7355 num_vgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
7358 assert(num_vgprs
+ num_sgprs
<= ARRAY_SIZE(param_types
));
7361 last_sgpr_param
= 0;
7363 while (gprs
< num_sgprs
+ num_vgprs
) {
7364 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], num_params
);
7367 param_types
[num_params
] = LLVMTypeOf(param
);
7368 if (gprs
< num_sgprs
)
7369 last_sgpr_param
= num_params
;
7370 size
= llvm_get_type_size(param_types
[num_params
]) / 4;
7373 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
7374 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
7375 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
7380 si_create_function(ctx
, "wrapper", NULL
, 0, param_types
, num_params
, last_sgpr_param
);
7382 /* Record the arguments of the function as if they were an output of
7388 for (unsigned i
= 0; i
< num_params
; ++i
) {
7389 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
7390 LLVMTypeRef param_type
= LLVMTypeOf(param
);
7391 LLVMTypeRef out_type
= i
<= last_sgpr_param
? ctx
->i32
: ctx
->f32
;
7392 unsigned size
= llvm_get_type_size(param_type
) / 4;
7395 if (param_type
!= out_type
)
7396 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
7397 out
[num_out
++] = param
;
7399 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
7401 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
7402 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
7403 param_type
= ctx
->i64
;
7406 if (param_type
!= vector_type
)
7407 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
7409 for (unsigned j
= 0; j
< size
; ++j
)
7410 out
[num_out
++] = LLVMBuildExtractElement(
7411 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
7414 if (i
<= last_sgpr_param
)
7415 num_out_sgpr
= num_out
;
7418 /* Now chain the parts. */
7419 for (unsigned part
= 0; part
< num_parts
; ++part
) {
7420 LLVMValueRef in
[48];
7422 LLVMTypeRef ret_type
;
7423 unsigned out_idx
= 0;
7425 num_params
= LLVMCountParams(parts
[part
]);
7426 assert(num_params
<= ARRAY_SIZE(param_types
));
7428 /* Derive arguments for the next part from outputs of the
7431 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
7433 LLVMTypeRef param_type
;
7435 unsigned param_size
;
7436 LLVMValueRef arg
= NULL
;
7438 param
= LLVMGetParam(parts
[part
], param_idx
);
7439 param_type
= LLVMTypeOf(param
);
7440 param_size
= llvm_get_type_size(param_type
) / 4;
7441 is_sgpr
= ac_is_sgpr_param(param
);
7444 #if HAVE_LLVM < 0x0400
7445 LLVMRemoveAttribute(param
, LLVMByValAttribute
);
7447 unsigned kind_id
= LLVMGetEnumAttributeKindForName("byval", 5);
7448 LLVMRemoveEnumAttributeAtIndex(parts
[part
], param_idx
+ 1, kind_id
);
7450 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
7453 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
7454 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
7456 if (param_size
== 1)
7459 arg
= lp_build_gather_values(gallivm
, &out
[out_idx
], param_size
);
7461 if (LLVMTypeOf(arg
) != param_type
) {
7462 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
7463 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
7464 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
7466 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
7470 in
[param_idx
] = arg
;
7471 out_idx
+= param_size
;
7474 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
7475 ret_type
= LLVMTypeOf(ret
);
7477 /* Extract the returned GPRs. */
7481 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
7482 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
7484 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
7486 for (unsigned i
= 0; i
< ret_size
; ++i
) {
7488 LLVMBuildExtractValue(builder
, ret
, i
, "");
7490 out
[num_out
++] = val
;
7492 if (LLVMTypeOf(val
) == ctx
->i32
) {
7493 assert(num_out_sgpr
+ 1 == num_out
);
7494 num_out_sgpr
= num_out
;
7500 LLVMBuildRetVoid(builder
);
7503 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
7504 LLVMTargetMachineRef tm
,
7505 struct si_shader
*shader
,
7507 struct pipe_debug_callback
*debug
)
7509 struct si_shader_selector
*sel
= shader
->selector
;
7510 struct si_shader_context ctx
;
7514 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
7515 * conversion fails. */
7516 if (r600_can_dump_shader(&sscreen
->b
, sel
->info
.processor
) &&
7517 !(sscreen
->b
.debug_flags
& DBG_NO_TGSI
)) {
7518 tgsi_dump(sel
->tokens
, 0);
7519 si_dump_streamout(&sel
->so
);
7522 si_init_shader_ctx(&ctx
, sscreen
, shader
, tm
);
7523 ctx
.separate_prolog
= !is_monolithic
;
7525 memset(shader
->info
.vs_output_param_offset
, EXP_PARAM_UNDEFINED
,
7526 sizeof(shader
->info
.vs_output_param_offset
));
7528 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
7530 ctx
.load_system_value
= declare_system_value
;
7532 if (!si_compile_tgsi_main(&ctx
, shader
)) {
7533 si_llvm_dispose(&ctx
);
7537 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
7538 LLVMValueRef parts
[3];
7542 need_prolog
= sel
->vs_needs_prolog
;
7543 need_epilog
= !shader
->key
.as_es
&& !shader
->key
.as_ls
;
7545 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7548 union si_shader_part_key prolog_key
;
7549 si_get_vs_prolog_key(shader
, &prolog_key
);
7550 si_build_vs_prolog_function(&ctx
, &prolog_key
);
7551 parts
[0] = ctx
.main_fn
;
7555 union si_shader_part_key epilog_key
;
7556 si_get_vs_epilog_key(shader
, &shader
->key
.part
.vs
.epilog
, &epilog_key
);
7557 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7558 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7561 si_build_wrapper_function(&ctx
, parts
, 1 + need_prolog
+ need_epilog
,
7562 need_prolog
? 1 : 0);
7563 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
7564 LLVMValueRef parts
[2];
7565 union si_shader_part_key epilog_key
;
7567 parts
[0] = ctx
.main_fn
;
7569 memset(&epilog_key
, 0, sizeof(epilog_key
));
7570 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7571 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7572 parts
[1] = ctx
.main_fn
;
7574 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7575 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_EVAL
&&
7576 !shader
->key
.as_es
) {
7577 LLVMValueRef parts
[2];
7578 union si_shader_part_key epilog_key
;
7580 parts
[0] = ctx
.main_fn
;
7582 si_get_vs_epilog_key(shader
, &shader
->key
.part
.tes
.epilog
, &epilog_key
);
7583 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7584 parts
[1] = ctx
.main_fn
;
7586 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7587 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7588 LLVMValueRef parts
[2];
7589 union si_shader_part_key prolog_key
;
7591 parts
[1] = ctx
.main_fn
;
7593 memset(&prolog_key
, 0, sizeof(prolog_key
));
7594 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7595 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7596 parts
[0] = ctx
.main_fn
;
7598 si_build_wrapper_function(&ctx
, parts
, 2, 1);
7599 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7600 LLVMValueRef parts
[3];
7601 union si_shader_part_key prolog_key
;
7602 union si_shader_part_key epilog_key
;
7605 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7606 need_prolog
= si_need_ps_prolog(&prolog_key
);
7608 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7611 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7612 parts
[0] = ctx
.main_fn
;
7615 si_get_ps_epilog_key(shader
, &epilog_key
);
7616 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7617 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7619 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2, need_prolog
? 1 : 0);
7622 mod
= ctx
.gallivm
.module
;
7624 /* Dump LLVM IR before any optimization passes */
7625 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
7626 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
7627 ac_dump_module(mod
);
7629 si_llvm_finalize_module(&ctx
,
7630 r600_extra_shader_checks(&sscreen
->b
, ctx
.type
));
7632 /* Post-optimization transformations and analysis. */
7633 si_eliminate_const_vs_outputs(&ctx
);
7635 if ((debug
&& debug
->debug_message
) ||
7636 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
7637 si_count_scratch_private_memory(&ctx
);
7639 /* Compile to bytecode. */
7640 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
7641 mod
, debug
, ctx
.type
, "TGSI shader");
7642 si_llvm_dispose(&ctx
);
7644 fprintf(stderr
, "LLVM failed to compile shader\n");
7648 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7649 * LLVM 3.9svn has this bug.
7651 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7652 unsigned wave_size
= 64;
7653 unsigned max_vgprs
= 256;
7654 unsigned max_sgprs
= sscreen
->b
.chip_class
>= VI
? 800 : 512;
7655 unsigned max_sgprs_per_wave
= 128;
7656 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
7657 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7658 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7660 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7661 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7663 if (shader
->config
.num_sgprs
> max_sgprs
||
7664 shader
->config
.num_vgprs
> max_vgprs
) {
7665 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7666 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7667 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7668 max_sgprs
, max_vgprs
);
7670 /* Just terminate the process, because dependent
7671 * shaders can hang due to bad input data, but use
7672 * the env var to allow shader-db to work.
7674 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7679 /* Add the scratch offset to input SGPRs. */
7680 if (shader
->config
.scratch_bytes_per_wave
)
7681 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7683 /* Calculate the number of fragment input VGPRs. */
7684 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7685 shader
->info
.num_input_vgprs
= 0;
7686 shader
->info
.face_vgpr_index
= -1;
7688 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7689 shader
->info
.num_input_vgprs
+= 2;
7690 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7691 shader
->info
.num_input_vgprs
+= 2;
7692 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7693 shader
->info
.num_input_vgprs
+= 2;
7694 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7695 shader
->info
.num_input_vgprs
+= 3;
7696 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7697 shader
->info
.num_input_vgprs
+= 2;
7698 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7699 shader
->info
.num_input_vgprs
+= 2;
7700 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7701 shader
->info
.num_input_vgprs
+= 2;
7702 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7703 shader
->info
.num_input_vgprs
+= 1;
7704 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7705 shader
->info
.num_input_vgprs
+= 1;
7706 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7707 shader
->info
.num_input_vgprs
+= 1;
7708 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7709 shader
->info
.num_input_vgprs
+= 1;
7710 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7711 shader
->info
.num_input_vgprs
+= 1;
7712 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7713 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7714 shader
->info
.num_input_vgprs
+= 1;
7716 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
))
7717 shader
->info
.num_input_vgprs
+= 1;
7718 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7719 shader
->info
.num_input_vgprs
+= 1;
7720 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7721 shader
->info
.num_input_vgprs
+= 1;
7728 * Create, compile and return a shader part (prolog or epilog).
7730 * \param sscreen screen
7731 * \param list list of shader parts of the same category
7732 * \param type shader type
7733 * \param key shader part key
7734 * \param prolog whether the part being requested is a prolog
7735 * \param tm LLVM target machine
7736 * \param debug debug callback
7737 * \param build the callback responsible for building the main function
7738 * \return non-NULL on success
7740 static struct si_shader_part
*
7741 si_get_shader_part(struct si_screen
*sscreen
,
7742 struct si_shader_part
**list
,
7743 enum pipe_shader_type type
,
7745 union si_shader_part_key
*key
,
7746 LLVMTargetMachineRef tm
,
7747 struct pipe_debug_callback
*debug
,
7748 void (*build
)(struct si_shader_context
*,
7749 union si_shader_part_key
*),
7752 struct si_shader_part
*result
;
7754 mtx_lock(&sscreen
->shader_parts_mutex
);
7756 /* Find existing. */
7757 for (result
= *list
; result
; result
= result
->next
) {
7758 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7759 mtx_unlock(&sscreen
->shader_parts_mutex
);
7764 /* Compile a new one. */
7765 result
= CALLOC_STRUCT(si_shader_part
);
7768 struct si_shader shader
= {};
7769 struct si_shader_context ctx
;
7770 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
7772 si_init_shader_ctx(&ctx
, sscreen
, &shader
, tm
);
7776 case PIPE_SHADER_VERTEX
:
7778 case PIPE_SHADER_TESS_CTRL
:
7780 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7782 case PIPE_SHADER_GEOMETRY
:
7785 case PIPE_SHADER_FRAGMENT
:
7787 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7789 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7792 unreachable("bad shader part");
7798 si_llvm_finalize_module(&ctx
,
7799 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_FRAGMENT
));
7801 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7802 gallivm
->module
, debug
, ctx
.type
, name
)) {
7808 result
->next
= *list
;
7812 si_llvm_dispose(&ctx
);
7813 mtx_unlock(&sscreen
->shader_parts_mutex
);
7818 * Build the vertex shader prolog function.
7820 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7821 * All inputs are returned unmodified. The vertex load indices are
7822 * stored after them, which will be used by the API VS for fetching inputs.
7824 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7829 * (VertexID + BaseVertex),
7830 * (InstanceID + StartInstance),
7831 * (InstanceID / 2 + StartInstance)
7833 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7834 union si_shader_part_key
*key
)
7836 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7837 LLVMTypeRef
*params
, *returns
;
7838 LLVMValueRef ret
, func
;
7839 int last_sgpr
, num_params
, num_returns
, i
;
7841 ctx
->param_vertex_id
= key
->vs_prolog
.num_input_sgprs
;
7842 ctx
->param_instance_id
= key
->vs_prolog
.num_input_sgprs
+ 3;
7844 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7845 params
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4) *
7846 sizeof(LLVMTypeRef
));
7847 returns
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4 +
7848 key
->vs_prolog
.last_input
+ 1) *
7849 sizeof(LLVMTypeRef
));
7853 /* Declare input and output SGPRs. */
7855 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7856 params
[num_params
++] = ctx
->i32
;
7857 returns
[num_returns
++] = ctx
->i32
;
7859 last_sgpr
= num_params
- 1;
7861 /* 4 preloaded VGPRs (outputs must be floats) */
7862 for (i
= 0; i
< 4; i
++) {
7863 params
[num_params
++] = ctx
->i32
;
7864 returns
[num_returns
++] = ctx
->f32
;
7867 /* Vertex load indices. */
7868 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7869 returns
[num_returns
++] = ctx
->f32
;
7871 /* Create the function. */
7872 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, params
,
7873 num_params
, last_sgpr
);
7874 func
= ctx
->main_fn
;
7876 /* Copy inputs to outputs. This should be no-op, as the registers match,
7877 * but it will prevent the compiler from overwriting them unintentionally.
7879 ret
= ctx
->return_value
;
7880 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7881 LLVMValueRef p
= LLVMGetParam(func
, i
);
7882 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7884 for (i
= num_params
- 4; i
< num_params
; i
++) {
7885 LLVMValueRef p
= LLVMGetParam(func
, i
);
7886 p
= LLVMBuildBitCast(gallivm
->builder
, p
, ctx
->f32
, "");
7887 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7890 /* Compute vertex load indices from instance divisors. */
7891 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7892 unsigned divisor
= key
->vs_prolog
.states
.instance_divisors
[i
];
7896 /* InstanceID / Divisor + StartInstance */
7897 index
= get_instance_index_for_fetch(ctx
,
7898 SI_SGPR_START_INSTANCE
,
7901 /* VertexID + BaseVertex */
7902 index
= LLVMBuildAdd(gallivm
->builder
,
7903 LLVMGetParam(func
, ctx
->param_vertex_id
),
7904 LLVMGetParam(func
, SI_SGPR_BASE_VERTEX
), "");
7907 index
= LLVMBuildBitCast(gallivm
->builder
, index
, ctx
->f32
, "");
7908 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, index
,
7912 si_llvm_build_ret(ctx
, ret
);
7916 * Build the vertex shader epilog function. This is also used by the tessellation
7917 * evaluation shader compiled as VS.
7919 * The input is PrimitiveID.
7921 * If PrimitiveID is required by the pixel shader, export it.
7922 * Otherwise, do nothing.
7924 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
7925 union si_shader_part_key
*key
)
7927 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7928 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7929 LLVMTypeRef params
[5];
7932 /* Declare input VGPRs. */
7933 num_params
= key
->vs_epilog
.states
.export_prim_id
?
7934 (VS_EPILOG_PRIMID_LOC
+ 1) : 0;
7935 assert(num_params
<= ARRAY_SIZE(params
));
7937 for (i
= 0; i
< num_params
; i
++)
7938 params
[i
] = ctx
->f32
;
7940 /* Create the function. */
7941 si_create_function(ctx
, "vs_epilog", NULL
, 0, params
, num_params
, -1);
7944 if (key
->vs_epilog
.states
.export_prim_id
) {
7945 struct lp_build_context
*base
= &bld_base
->base
;
7946 struct ac_export_args args
;
7948 args
.enabled_channels
= 0x1; /* enabled channels */
7949 args
.valid_mask
= 0; /* whether the EXEC mask is valid */
7950 args
.done
= 0; /* DONE bit */
7951 args
.target
= V_008DFC_SQ_EXP_PARAM
+
7952 key
->vs_epilog
.prim_id_param_offset
;
7953 args
.compr
= 0; /* COMPR flag (0 = 32-bit export) */
7954 args
.out
[0] = LLVMGetParam(ctx
->main_fn
,
7955 VS_EPILOG_PRIMID_LOC
); /* X */
7956 args
.out
[1] = base
->undef
; /* Y */
7957 args
.out
[2] = base
->undef
; /* Z */
7958 args
.out
[3] = base
->undef
; /* W */
7960 ac_build_export(&ctx
->ac
, &args
);
7963 LLVMBuildRetVoid(gallivm
->builder
);
7967 * Create & compile a vertex shader epilog. This a helper used by VS and TES.
7969 static bool si_get_vs_epilog(struct si_screen
*sscreen
,
7970 LLVMTargetMachineRef tm
,
7971 struct si_shader
*shader
,
7972 struct pipe_debug_callback
*debug
,
7973 struct si_vs_epilog_bits
*states
)
7975 union si_shader_part_key epilog_key
;
7977 si_get_vs_epilog_key(shader
, states
, &epilog_key
);
7979 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->vs_epilogs
,
7980 PIPE_SHADER_VERTEX
, true,
7981 &epilog_key
, tm
, debug
,
7982 si_build_vs_epilog_function
,
7983 "Vertex Shader Epilog");
7984 return shader
->epilog
!= NULL
;
7988 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7990 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7991 LLVMTargetMachineRef tm
,
7992 struct si_shader
*shader
,
7993 struct pipe_debug_callback
*debug
)
7995 if (shader
->selector
->vs_needs_prolog
) {
7996 union si_shader_part_key prolog_key
;
7998 /* Get the prolog. */
7999 si_get_vs_prolog_key(shader
, &prolog_key
);
8002 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
8003 PIPE_SHADER_VERTEX
, true,
8004 &prolog_key
, tm
, debug
,
8005 si_build_vs_prolog_function
,
8006 "Vertex Shader Prolog");
8007 if (!shader
->prolog
)
8011 /* Get the epilog. */
8012 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
&&
8013 !si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
8014 &shader
->key
.part
.vs
.epilog
))
8021 * Select and compile (or reuse) TES parts (epilog).
8023 static bool si_shader_select_tes_parts(struct si_screen
*sscreen
,
8024 LLVMTargetMachineRef tm
,
8025 struct si_shader
*shader
,
8026 struct pipe_debug_callback
*debug
)
8028 if (shader
->key
.as_es
)
8031 /* TES compiled as VS. */
8032 return si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
8033 &shader
->key
.part
.tes
.epilog
);
8037 * Compile the TCS epilog function. This writes tesselation factors to memory
8038 * based on the output primitive type of the tesselator (determined by TES).
8040 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
8041 union si_shader_part_key
*key
)
8043 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
8044 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
8045 LLVMTypeRef params
[16];
8047 int last_sgpr
, num_params
;
8049 /* Declare inputs. Only RW_BUFFERS and TESS_FACTOR_OFFSET are used. */
8050 params
[SI_PARAM_RW_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
8051 params
[SI_PARAM_CONST_BUFFERS
] = ctx
->i64
;
8052 params
[SI_PARAM_SAMPLERS
] = ctx
->i64
;
8053 params
[SI_PARAM_IMAGES
] = ctx
->i64
;
8054 params
[SI_PARAM_SHADER_BUFFERS
] = ctx
->i64
;
8055 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
8056 params
[SI_PARAM_TCS_OUT_OFFSETS
] = ctx
->i32
;
8057 params
[SI_PARAM_TCS_OUT_LAYOUT
] = ctx
->i32
;
8058 params
[SI_PARAM_TCS_IN_LAYOUT
] = ctx
->i32
;
8059 params
[ctx
->param_oc_lds
= SI_PARAM_TCS_OC_LDS
] = ctx
->i32
;
8060 params
[SI_PARAM_TESS_FACTOR_OFFSET
] = ctx
->i32
;
8061 last_sgpr
= SI_PARAM_TESS_FACTOR_OFFSET
;
8062 num_params
= last_sgpr
+ 1;
8064 params
[num_params
++] = ctx
->i32
; /* patch index within the wave (REL_PATCH_ID) */
8065 params
[num_params
++] = ctx
->i32
; /* invocation ID within the patch */
8066 params
[num_params
++] = ctx
->i32
; /* LDS offset where tess factors should be loaded from */
8068 /* Create the function. */
8069 si_create_function(ctx
, "tcs_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
8070 declare_tess_lds(ctx
);
8071 func
= ctx
->main_fn
;
8073 si_write_tess_factors(bld_base
,
8074 LLVMGetParam(func
, last_sgpr
+ 1),
8075 LLVMGetParam(func
, last_sgpr
+ 2),
8076 LLVMGetParam(func
, last_sgpr
+ 3));
8078 LLVMBuildRetVoid(gallivm
->builder
);
8082 * Select and compile (or reuse) TCS parts (epilog).
8084 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
8085 LLVMTargetMachineRef tm
,
8086 struct si_shader
*shader
,
8087 struct pipe_debug_callback
*debug
)
8089 union si_shader_part_key epilog_key
;
8091 /* Get the epilog. */
8092 memset(&epilog_key
, 0, sizeof(epilog_key
));
8093 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
8095 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
8096 PIPE_SHADER_TESS_CTRL
, false,
8097 &epilog_key
, tm
, debug
,
8098 si_build_tcs_epilog_function
,
8099 "Tessellation Control Shader Epilog");
8100 return shader
->epilog
!= NULL
;
8104 * Select and compile (or reuse) GS parts (prolog).
8106 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
8107 LLVMTargetMachineRef tm
,
8108 struct si_shader
*shader
,
8109 struct pipe_debug_callback
*debug
)
8111 union si_shader_part_key prolog_key
;
8113 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
8116 memset(&prolog_key
, 0, sizeof(prolog_key
));
8117 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
8119 shader
->prolog
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
8120 PIPE_SHADER_GEOMETRY
, true,
8121 &prolog_key
, tm
, debug
,
8122 si_build_gs_prolog_function
,
8123 "Geometry Shader Prolog");
8124 return shader
->prolog
!= NULL
;
8128 * Build the pixel shader prolog function. This handles:
8129 * - two-side color selection and interpolation
8130 * - overriding interpolation parameters for the API PS
8131 * - polygon stippling
8133 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
8134 * overriden by other states. (e.g. per-sample interpolation)
8135 * Interpolated colors are stored after the preloaded VGPRs.
8137 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
8138 union si_shader_part_key
*key
)
8140 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
8141 LLVMTypeRef
*params
;
8142 LLVMValueRef ret
, func
;
8143 int last_sgpr
, num_params
, num_returns
, i
, num_color_channels
;
8145 assert(si_need_ps_prolog(key
));
8147 /* Number of inputs + 8 color elements. */
8148 params
= alloca((key
->ps_prolog
.num_input_sgprs
+
8149 key
->ps_prolog
.num_input_vgprs
+ 8) *
8150 sizeof(LLVMTypeRef
));
8152 /* Declare inputs. */
8154 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
8155 params
[num_params
++] = ctx
->i32
;
8156 last_sgpr
= num_params
- 1;
8158 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
8159 params
[num_params
++] = ctx
->f32
;
8161 /* Declare outputs (same as inputs + add colors if needed) */
8162 num_returns
= num_params
;
8163 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
8164 for (i
= 0; i
< num_color_channels
; i
++)
8165 params
[num_returns
++] = ctx
->f32
;
8167 /* Create the function. */
8168 si_create_function(ctx
, "ps_prolog", params
, num_returns
, params
,
8169 num_params
, last_sgpr
);
8170 func
= ctx
->main_fn
;
8172 /* Copy inputs to outputs. This should be no-op, as the registers match,
8173 * but it will prevent the compiler from overwriting them unintentionally.
8175 ret
= ctx
->return_value
;
8176 for (i
= 0; i
< num_params
; i
++) {
8177 LLVMValueRef p
= LLVMGetParam(func
, i
);
8178 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
8181 /* Polygon stippling. */
8182 if (key
->ps_prolog
.states
.poly_stipple
) {
8183 /* POS_FIXED_PT is always last. */
8184 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
8185 key
->ps_prolog
.num_input_vgprs
- 1;
8186 LLVMValueRef ptr
[2], list
;
8188 /* Get the pointer to rw buffers. */
8189 ptr
[0] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS
);
8190 ptr
[1] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS_HI
);
8191 list
= lp_build_gather_values(gallivm
, ptr
, 2);
8192 list
= LLVMBuildBitCast(gallivm
->builder
, list
, ctx
->i64
, "");
8193 list
= LLVMBuildIntToPtr(gallivm
->builder
, list
,
8194 const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
), "");
8196 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
8199 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
8200 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
8201 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8202 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
8204 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
8205 * The hw doesn't compute CENTROID if the whole wave only
8206 * contains fully-covered quads.
8208 * PRIM_MASK is after user SGPRs.
8210 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
8211 bc_optimize
= LLVMBuildLShr(gallivm
->builder
, bc_optimize
,
8212 LLVMConstInt(ctx
->i32
, 31, 0), "");
8213 bc_optimize
= LLVMBuildTrunc(gallivm
->builder
, bc_optimize
,
8216 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
8217 /* Read PERSP_CENTER. */
8218 for (i
= 0; i
< 2; i
++)
8219 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
8220 /* Read PERSP_CENTROID. */
8221 for (i
= 0; i
< 2; i
++)
8222 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
8223 /* Select PERSP_CENTROID. */
8224 for (i
= 0; i
< 2; i
++) {
8225 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
8226 center
[i
], centroid
[i
], "");
8227 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8228 tmp
, base
+ 4 + i
, "");
8231 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
8232 /* Read LINEAR_CENTER. */
8233 for (i
= 0; i
< 2; i
++)
8234 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
8235 /* Read LINEAR_CENTROID. */
8236 for (i
= 0; i
< 2; i
++)
8237 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
8238 /* Select LINEAR_CENTROID. */
8239 for (i
= 0; i
< 2; i
++) {
8240 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
8241 center
[i
], centroid
[i
], "");
8242 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8243 tmp
, base
+ 10 + i
, "");
8248 /* Force per-sample interpolation. */
8249 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
8250 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8251 LLVMValueRef persp_sample
[2];
8253 /* Read PERSP_SAMPLE. */
8254 for (i
= 0; i
< 2; i
++)
8255 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
8256 /* Overwrite PERSP_CENTER. */
8257 for (i
= 0; i
< 2; i
++)
8258 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8259 persp_sample
[i
], base
+ 2 + i
, "");
8260 /* Overwrite PERSP_CENTROID. */
8261 for (i
= 0; i
< 2; i
++)
8262 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8263 persp_sample
[i
], base
+ 4 + i
, "");
8265 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
8266 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8267 LLVMValueRef linear_sample
[2];
8269 /* Read LINEAR_SAMPLE. */
8270 for (i
= 0; i
< 2; i
++)
8271 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
8272 /* Overwrite LINEAR_CENTER. */
8273 for (i
= 0; i
< 2; i
++)
8274 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8275 linear_sample
[i
], base
+ 8 + i
, "");
8276 /* Overwrite LINEAR_CENTROID. */
8277 for (i
= 0; i
< 2; i
++)
8278 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8279 linear_sample
[i
], base
+ 10 + i
, "");
8282 /* Force center interpolation. */
8283 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
8284 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8285 LLVMValueRef persp_center
[2];
8287 /* Read PERSP_CENTER. */
8288 for (i
= 0; i
< 2; i
++)
8289 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
8290 /* Overwrite PERSP_SAMPLE. */
8291 for (i
= 0; i
< 2; i
++)
8292 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8293 persp_center
[i
], base
+ i
, "");
8294 /* Overwrite PERSP_CENTROID. */
8295 for (i
= 0; i
< 2; i
++)
8296 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8297 persp_center
[i
], base
+ 4 + i
, "");
8299 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
8300 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8301 LLVMValueRef linear_center
[2];
8303 /* Read LINEAR_CENTER. */
8304 for (i
= 0; i
< 2; i
++)
8305 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
8306 /* Overwrite LINEAR_SAMPLE. */
8307 for (i
= 0; i
< 2; i
++)
8308 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8309 linear_center
[i
], base
+ 6 + i
, "");
8310 /* Overwrite LINEAR_CENTROID. */
8311 for (i
= 0; i
< 2; i
++)
8312 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8313 linear_center
[i
], base
+ 10 + i
, "");
8316 /* Interpolate colors. */
8317 for (i
= 0; i
< 2; i
++) {
8318 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
8319 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8320 key
->ps_prolog
.face_vgpr_index
;
8321 LLVMValueRef interp
[2], color
[4];
8322 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
8327 /* If the interpolation qualifier is not CONSTANT (-1). */
8328 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
8329 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8330 key
->ps_prolog
.color_interp_vgpr_index
[i
];
8332 /* Get the (i,j) updated by bc_optimize handling. */
8333 interp
[0] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
8335 interp
[1] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
8336 interp_vgpr
+ 1, "");
8337 interp_ij
= lp_build_gather_values(gallivm
, interp
, 2);
8340 /* Use the absolute location of the input. */
8341 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
8343 if (key
->ps_prolog
.states
.color_two_side
) {
8344 face
= LLVMGetParam(func
, face_vgpr
);
8345 face
= LLVMBuildBitCast(gallivm
->builder
, face
, ctx
->i32
, "");
8348 interp_fs_input(ctx
,
8349 key
->ps_prolog
.color_attr_index
[i
],
8350 TGSI_SEMANTIC_COLOR
, i
,
8351 key
->ps_prolog
.num_interp_inputs
,
8352 key
->ps_prolog
.colors_read
, interp_ij
,
8353 prim_mask
, face
, color
);
8356 unsigned chan
= u_bit_scan(&writemask
);
8357 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, color
[chan
],
8362 /* Tell LLVM to insert WQM instruction sequence when needed. */
8363 if (key
->ps_prolog
.wqm
) {
8364 LLVMAddTargetDependentFunctionAttr(func
,
8365 "amdgpu-ps-wqm-outputs", "");
8368 si_llvm_build_ret(ctx
, ret
);
8372 * Build the pixel shader epilog function. This handles everything that must be
8373 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
8375 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
8376 union si_shader_part_key
*key
)
8378 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
8379 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
8380 LLVMTypeRef params
[16+8*4+3];
8381 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8382 int last_sgpr
, num_params
, i
;
8383 struct si_ps_exports exp
= {};
8385 /* Declare input SGPRs. */
8386 params
[SI_PARAM_RW_BUFFERS
] = ctx
->i64
;
8387 params
[SI_PARAM_CONST_BUFFERS
] = ctx
->i64
;
8388 params
[SI_PARAM_SAMPLERS
] = ctx
->i64
;
8389 params
[SI_PARAM_IMAGES
] = ctx
->i64
;
8390 params
[SI_PARAM_SHADER_BUFFERS
] = ctx
->i64
;
8391 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
8392 last_sgpr
= SI_PARAM_ALPHA_REF
;
8394 /* Declare input VGPRs. */
8395 num_params
= (last_sgpr
+ 1) +
8396 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8397 key
->ps_epilog
.writes_z
+
8398 key
->ps_epilog
.writes_stencil
+
8399 key
->ps_epilog
.writes_samplemask
;
8401 num_params
= MAX2(num_params
,
8402 last_sgpr
+ 1 + PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8404 assert(num_params
<= ARRAY_SIZE(params
));
8406 for (i
= last_sgpr
+ 1; i
< num_params
; i
++)
8407 params
[i
] = ctx
->f32
;
8409 /* Create the function. */
8410 si_create_function(ctx
, "ps_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
8411 /* Disable elimination of unused inputs. */
8412 si_llvm_add_attribute(ctx
->main_fn
,
8413 "InitialPSInputAddr", 0xffffff);
8415 /* Process colors. */
8416 unsigned vgpr
= last_sgpr
+ 1;
8417 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8418 int last_color_export
= -1;
8420 /* Find the last color export. */
8421 if (!key
->ps_epilog
.writes_z
&&
8422 !key
->ps_epilog
.writes_stencil
&&
8423 !key
->ps_epilog
.writes_samplemask
) {
8424 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8426 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8427 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8428 /* Just set this if any of the colorbuffers are enabled. */
8430 ((1llu << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8431 last_color_export
= 0;
8433 for (i
= 0; i
< 8; i
++)
8434 if (colors_written
& (1 << i
) &&
8435 (spi_format
>> (i
* 4)) & 0xf)
8436 last_color_export
= i
;
8440 while (colors_written
) {
8441 LLVMValueRef color
[4];
8442 int mrt
= u_bit_scan(&colors_written
);
8444 for (i
= 0; i
< 4; i
++)
8445 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8447 si_export_mrt_color(bld_base
, color
, mrt
,
8449 mrt
== last_color_export
, &exp
);
8452 /* Process depth, stencil, samplemask. */
8453 if (key
->ps_epilog
.writes_z
)
8454 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8455 if (key
->ps_epilog
.writes_stencil
)
8456 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8457 if (key
->ps_epilog
.writes_samplemask
)
8458 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8460 if (depth
|| stencil
|| samplemask
)
8461 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8462 else if (last_color_export
== -1)
8463 si_export_null(bld_base
);
8466 si_emit_ps_exports(ctx
, &exp
);
8469 LLVMBuildRetVoid(gallivm
->builder
);
8473 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8475 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8476 LLVMTargetMachineRef tm
,
8477 struct si_shader
*shader
,
8478 struct pipe_debug_callback
*debug
)
8480 union si_shader_part_key prolog_key
;
8481 union si_shader_part_key epilog_key
;
8483 /* Get the prolog. */
8484 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8486 /* The prolog is a no-op if these aren't set. */
8487 if (si_need_ps_prolog(&prolog_key
)) {
8489 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8490 PIPE_SHADER_FRAGMENT
, true,
8491 &prolog_key
, tm
, debug
,
8492 si_build_ps_prolog_function
,
8493 "Fragment Shader Prolog");
8494 if (!shader
->prolog
)
8498 /* Get the epilog. */
8499 si_get_ps_epilog_key(shader
, &epilog_key
);
8502 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8503 PIPE_SHADER_FRAGMENT
, false,
8504 &epilog_key
, tm
, debug
,
8505 si_build_ps_epilog_function
,
8506 "Fragment Shader Epilog");
8507 if (!shader
->epilog
)
8510 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8511 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8512 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8513 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8516 /* Set up the enable bits for per-sample shading if needed. */
8517 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8518 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8519 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8520 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8521 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8522 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8524 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8525 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8526 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8527 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8528 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8529 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8531 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8532 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8533 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8534 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8535 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8536 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8538 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8539 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8540 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8541 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8542 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8543 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8546 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8547 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8548 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8549 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8550 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8553 /* At least one pair of interpolation weights must be enabled. */
8554 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8555 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8556 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8559 /* The sample mask input is always enabled, because the API shader always
8560 * passes it through to the epilog. Disable it here if it's unused.
8562 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8563 !shader
->selector
->info
.reads_samplemask
)
8564 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8569 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8572 /* SPI barrier management bug:
8573 * Make sure we have at least 4k of LDS in use to avoid the bug.
8574 * It applies to workgroup sizes of more than one wavefront.
8576 if (sscreen
->b
.family
== CHIP_BONAIRE
||
8577 sscreen
->b
.family
== CHIP_KABINI
||
8578 sscreen
->b
.family
== CHIP_MULLINS
)
8579 *lds_size
= MAX2(*lds_size
, 8);
8582 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8583 struct si_shader
*shader
)
8585 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8587 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8589 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8590 si_get_max_workgroup_size(shader
) > 64) {
8591 si_multiwave_lds_size_workaround(sscreen
,
8592 &shader
->config
.lds_size
);
8596 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
8597 struct si_shader
*shader
,
8598 struct pipe_debug_callback
*debug
)
8600 struct si_shader_selector
*sel
= shader
->selector
;
8601 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8604 /* LS, ES, VS are compiled on demand if the main part hasn't been
8605 * compiled for that stage.
8607 * Vertex shaders are compiled on demand when a vertex fetch
8608 * workaround must be applied.
8610 if (shader
->is_monolithic
) {
8611 /* Monolithic shader (compiled as a whole, has many variants,
8612 * may take a long time to compile).
8614 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
8618 /* The shader consists of 2-3 parts:
8620 * - the middle part is the user shader, it has 1 variant only
8621 * and it was compiled during the creation of the shader
8623 * - the prolog part is inserted at the beginning
8624 * - the epilog part is inserted at the end
8626 * The prolog and epilog have many (but simple) variants.
8629 /* Copy the compiled TGSI shader data over. */
8630 shader
->is_binary_shared
= true;
8631 shader
->binary
= mainp
->binary
;
8632 shader
->config
= mainp
->config
;
8633 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8634 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8635 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8636 memcpy(shader
->info
.vs_output_param_offset
,
8637 mainp
->info
.vs_output_param_offset
,
8638 sizeof(mainp
->info
.vs_output_param_offset
));
8639 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8640 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8641 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8643 /* Select prologs and/or epilogs. */
8644 switch (sel
->type
) {
8645 case PIPE_SHADER_VERTEX
:
8646 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
8649 case PIPE_SHADER_TESS_CTRL
:
8650 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
8653 case PIPE_SHADER_TESS_EVAL
:
8654 if (!si_shader_select_tes_parts(sscreen
, tm
, shader
, debug
))
8657 case PIPE_SHADER_GEOMETRY
:
8658 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
8661 case PIPE_SHADER_FRAGMENT
:
8662 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
8665 /* Make sure we have at least as many VGPRs as there
8666 * are allocated inputs.
8668 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8669 shader
->info
.num_input_vgprs
);
8673 /* Update SGPR and VGPR counts. */
8674 if (shader
->prolog
) {
8675 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8676 shader
->prolog
->config
.num_sgprs
);
8677 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8678 shader
->prolog
->config
.num_vgprs
);
8680 if (shader
->epilog
) {
8681 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8682 shader
->epilog
->config
.num_sgprs
);
8683 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8684 shader
->epilog
->config
.num_vgprs
);
8688 si_fix_resource_usage(sscreen
, shader
);
8689 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8693 r
= si_shader_binary_upload(sscreen
, shader
);
8695 fprintf(stderr
, "LLVM failed to upload shader\n");
8702 void si_shader_destroy(struct si_shader
*shader
)
8704 if (shader
->scratch_bo
)
8705 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8707 r600_resource_reference(&shader
->bo
, NULL
);
8709 if (!shader
->is_binary_shared
)
8710 radeon_shader_binary_clean(&shader
->binary
);
8712 free(shader
->shader_log
);