radeonsi: remove r600_pipe_common::screen
[mesa.git] / src / gallium / drivers / vc4 / vc4_job.c
1 /*
2 * Copyright © 2014-2015 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /** @file vc4_job.c
25 *
26 * Functions for submitting VC4 render jobs to the kernel.
27 */
28
29 #include <xf86drm.h>
30 #include "vc4_cl_dump.h"
31 #include "vc4_context.h"
32 #include "util/hash_table.h"
33
34 static void
35 remove_from_ht(struct hash_table *ht, void *key)
36 {
37 struct hash_entry *entry = _mesa_hash_table_search(ht, key);
38 _mesa_hash_table_remove(ht, entry);
39 }
40
41 static void
42 vc4_job_free(struct vc4_context *vc4, struct vc4_job *job)
43 {
44 struct vc4_bo **referenced_bos = job->bo_pointers.base;
45 for (int i = 0; i < cl_offset(&job->bo_handles) / 4; i++) {
46 vc4_bo_unreference(&referenced_bos[i]);
47 }
48
49 remove_from_ht(vc4->jobs, &job->key);
50
51 if (job->color_write) {
52 remove_from_ht(vc4->write_jobs, job->color_write->texture);
53 pipe_surface_reference(&job->color_write, NULL);
54 }
55 if (job->msaa_color_write) {
56 remove_from_ht(vc4->write_jobs, job->msaa_color_write->texture);
57 pipe_surface_reference(&job->msaa_color_write, NULL);
58 }
59 if (job->zs_write) {
60 remove_from_ht(vc4->write_jobs, job->zs_write->texture);
61 pipe_surface_reference(&job->zs_write, NULL);
62 }
63 if (job->msaa_zs_write) {
64 remove_from_ht(vc4->write_jobs, job->msaa_zs_write->texture);
65 pipe_surface_reference(&job->msaa_zs_write, NULL);
66 }
67
68 pipe_surface_reference(&job->color_read, NULL);
69 pipe_surface_reference(&job->zs_read, NULL);
70
71 if (vc4->job == job)
72 vc4->job = NULL;
73
74 ralloc_free(job);
75 }
76
77 static struct vc4_job *
78 vc4_job_create(struct vc4_context *vc4)
79 {
80 struct vc4_job *job = rzalloc(vc4, struct vc4_job);
81
82 vc4_init_cl(job, &job->bcl);
83 vc4_init_cl(job, &job->shader_rec);
84 vc4_init_cl(job, &job->uniforms);
85 vc4_init_cl(job, &job->bo_handles);
86 vc4_init_cl(job, &job->bo_pointers);
87
88 job->draw_min_x = ~0;
89 job->draw_min_y = ~0;
90 job->draw_max_x = 0;
91 job->draw_max_y = 0;
92
93 job->last_gem_handle_hindex = ~0;
94
95 if (vc4->perfmon)
96 job->perfmon = vc4->perfmon;
97
98 return job;
99 }
100
101 void
102 vc4_flush_jobs_writing_resource(struct vc4_context *vc4,
103 struct pipe_resource *prsc)
104 {
105 struct hash_entry *entry = _mesa_hash_table_search(vc4->write_jobs,
106 prsc);
107 if (entry) {
108 struct vc4_job *job = entry->data;
109 vc4_job_submit(vc4, job);
110 }
111 }
112
113 void
114 vc4_flush_jobs_reading_resource(struct vc4_context *vc4,
115 struct pipe_resource *prsc)
116 {
117 struct vc4_resource *rsc = vc4_resource(prsc);
118
119 vc4_flush_jobs_writing_resource(vc4, prsc);
120
121 struct hash_entry *entry;
122 hash_table_foreach(vc4->jobs, entry) {
123 struct vc4_job *job = entry->data;
124
125 struct vc4_bo **referenced_bos = job->bo_pointers.base;
126 bool found = false;
127 for (int i = 0; i < cl_offset(&job->bo_handles) / 4; i++) {
128 if (referenced_bos[i] == rsc->bo) {
129 found = true;
130 break;
131 }
132 }
133 if (found) {
134 vc4_job_submit(vc4, job);
135 continue;
136 }
137
138 /* Also check for the Z/color buffers, since the references to
139 * those are only added immediately before submit.
140 */
141 if (job->color_read && !(job->cleared & PIPE_CLEAR_COLOR)) {
142 struct vc4_resource *ctex =
143 vc4_resource(job->color_read->texture);
144 if (ctex->bo == rsc->bo) {
145 vc4_job_submit(vc4, job);
146 continue;
147 }
148 }
149
150 if (job->zs_read && !(job->cleared &
151 (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) {
152 struct vc4_resource *ztex =
153 vc4_resource(job->zs_read->texture);
154 if (ztex->bo == rsc->bo) {
155 vc4_job_submit(vc4, job);
156 continue;
157 }
158 }
159 }
160 }
161
162 /**
163 * Returns a vc4_job struture for tracking V3D rendering to a particular FBO.
164 *
165 * If we've already started rendering to this FBO, then return old same job,
166 * otherwise make a new one. If we're beginning rendering to an FBO, make
167 * sure that any previous reads of the FBO (or writes to its color/Z surfaces)
168 * have been flushed.
169 */
170 struct vc4_job *
171 vc4_get_job(struct vc4_context *vc4,
172 struct pipe_surface *cbuf, struct pipe_surface *zsbuf)
173 {
174 /* Return the existing job for this FBO if we have one */
175 struct vc4_job_key local_key = {.cbuf = cbuf, .zsbuf = zsbuf};
176 struct hash_entry *entry = _mesa_hash_table_search(vc4->jobs,
177 &local_key);
178 if (entry)
179 return entry->data;
180
181 /* Creating a new job. Make sure that any previous jobs reading or
182 * writing these buffers are flushed.
183 */
184 if (cbuf)
185 vc4_flush_jobs_reading_resource(vc4, cbuf->texture);
186 if (zsbuf)
187 vc4_flush_jobs_reading_resource(vc4, zsbuf->texture);
188
189 struct vc4_job *job = vc4_job_create(vc4);
190
191 if (cbuf) {
192 if (cbuf->texture->nr_samples > 1) {
193 job->msaa = true;
194 pipe_surface_reference(&job->msaa_color_write, cbuf);
195 } else {
196 pipe_surface_reference(&job->color_write, cbuf);
197 }
198 }
199
200 if (zsbuf) {
201 if (zsbuf->texture->nr_samples > 1) {
202 job->msaa = true;
203 pipe_surface_reference(&job->msaa_zs_write, zsbuf);
204 } else {
205 pipe_surface_reference(&job->zs_write, zsbuf);
206 }
207 }
208
209 if (job->msaa) {
210 job->tile_width = 32;
211 job->tile_height = 32;
212 } else {
213 job->tile_width = 64;
214 job->tile_height = 64;
215 }
216
217 if (cbuf)
218 _mesa_hash_table_insert(vc4->write_jobs, cbuf->texture, job);
219 if (zsbuf)
220 _mesa_hash_table_insert(vc4->write_jobs, zsbuf->texture, job);
221
222 job->key.cbuf = cbuf;
223 job->key.zsbuf = zsbuf;
224 _mesa_hash_table_insert(vc4->jobs, &job->key, job);
225
226 return job;
227 }
228
229 struct vc4_job *
230 vc4_get_job_for_fbo(struct vc4_context *vc4)
231 {
232 if (vc4->job)
233 return vc4->job;
234
235 struct pipe_surface *cbuf = vc4->framebuffer.cbufs[0];
236 struct pipe_surface *zsbuf = vc4->framebuffer.zsbuf;
237 struct vc4_job *job = vc4_get_job(vc4, cbuf, zsbuf);
238
239 /* The dirty flags are tracking what's been updated while vc4->job has
240 * been bound, so set them all to ~0 when switching between jobs. We
241 * also need to reset all state at the start of rendering.
242 */
243 vc4->dirty = ~0;
244
245 /* Set up the read surfaces in the job. If they aren't actually
246 * getting read (due to a clear starting the frame), job->cleared will
247 * mask out the read.
248 */
249 pipe_surface_reference(&job->color_read, cbuf);
250 pipe_surface_reference(&job->zs_read, zsbuf);
251
252 /* If we're binding to uninitialized buffers, no need to load their
253 * contents before drawing.
254 */
255 if (cbuf) {
256 struct vc4_resource *rsc = vc4_resource(cbuf->texture);
257 if (!rsc->writes)
258 job->cleared |= PIPE_CLEAR_COLOR0;
259 }
260
261 if (zsbuf) {
262 struct vc4_resource *rsc = vc4_resource(zsbuf->texture);
263 if (!rsc->writes)
264 job->cleared |= PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL;
265 }
266
267 job->draw_tiles_x = DIV_ROUND_UP(vc4->framebuffer.width,
268 job->tile_width);
269 job->draw_tiles_y = DIV_ROUND_UP(vc4->framebuffer.height,
270 job->tile_height);
271
272 /* Initialize the job with the raster order flags -- each draw will
273 * check that we haven't changed the flags, since that requires a
274 * flush.
275 */
276 if (vc4->rasterizer)
277 job->flags = vc4->rasterizer->tile_raster_order_flags;
278
279 vc4->job = job;
280
281 return job;
282 }
283
284 static void
285 vc4_submit_setup_rcl_surface(struct vc4_job *job,
286 struct drm_vc4_submit_rcl_surface *submit_surf,
287 struct pipe_surface *psurf,
288 bool is_depth, bool is_write)
289 {
290 struct vc4_surface *surf = vc4_surface(psurf);
291
292 if (!surf)
293 return;
294
295 struct vc4_resource *rsc = vc4_resource(psurf->texture);
296 submit_surf->hindex = vc4_gem_hindex(job, rsc->bo);
297 submit_surf->offset = surf->offset;
298
299 if (psurf->texture->nr_samples <= 1) {
300 if (is_depth) {
301 submit_surf->bits =
302 VC4_SET_FIELD(VC4_LOADSTORE_TILE_BUFFER_ZS,
303 VC4_LOADSTORE_TILE_BUFFER_BUFFER);
304
305 } else {
306 submit_surf->bits =
307 VC4_SET_FIELD(VC4_LOADSTORE_TILE_BUFFER_COLOR,
308 VC4_LOADSTORE_TILE_BUFFER_BUFFER) |
309 VC4_SET_FIELD(vc4_rt_format_is_565(psurf->format) ?
310 VC4_LOADSTORE_TILE_BUFFER_BGR565 :
311 VC4_LOADSTORE_TILE_BUFFER_RGBA8888,
312 VC4_LOADSTORE_TILE_BUFFER_FORMAT);
313 }
314 submit_surf->bits |=
315 VC4_SET_FIELD(surf->tiling,
316 VC4_LOADSTORE_TILE_BUFFER_TILING);
317 } else {
318 assert(!is_write);
319 submit_surf->flags |= VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES;
320 }
321
322 if (is_write)
323 rsc->writes++;
324 }
325
326 static void
327 vc4_submit_setup_rcl_render_config_surface(struct vc4_job *job,
328 struct drm_vc4_submit_rcl_surface *submit_surf,
329 struct pipe_surface *psurf)
330 {
331 struct vc4_surface *surf = vc4_surface(psurf);
332
333 if (!surf)
334 return;
335
336 struct vc4_resource *rsc = vc4_resource(psurf->texture);
337 submit_surf->hindex = vc4_gem_hindex(job, rsc->bo);
338 submit_surf->offset = surf->offset;
339
340 if (psurf->texture->nr_samples <= 1) {
341 submit_surf->bits =
342 VC4_SET_FIELD(vc4_rt_format_is_565(surf->base.format) ?
343 VC4_RENDER_CONFIG_FORMAT_BGR565 :
344 VC4_RENDER_CONFIG_FORMAT_RGBA8888,
345 VC4_RENDER_CONFIG_FORMAT) |
346 VC4_SET_FIELD(surf->tiling,
347 VC4_RENDER_CONFIG_MEMORY_FORMAT);
348 }
349
350 rsc->writes++;
351 }
352
353 static void
354 vc4_submit_setup_rcl_msaa_surface(struct vc4_job *job,
355 struct drm_vc4_submit_rcl_surface *submit_surf,
356 struct pipe_surface *psurf)
357 {
358 struct vc4_surface *surf = vc4_surface(psurf);
359
360 if (!surf)
361 return;
362
363 struct vc4_resource *rsc = vc4_resource(psurf->texture);
364 submit_surf->hindex = vc4_gem_hindex(job, rsc->bo);
365 submit_surf->offset = surf->offset;
366 submit_surf->bits = 0;
367 rsc->writes++;
368 }
369
370 /**
371 * Submits the job to the kernel and then reinitializes it.
372 */
373 void
374 vc4_job_submit(struct vc4_context *vc4, struct vc4_job *job)
375 {
376 if (!job->needs_flush)
377 goto done;
378
379 /* The RCL setup would choke if the draw bounds cause no drawing, so
380 * just drop the drawing if that's the case.
381 */
382 if (job->draw_max_x <= job->draw_min_x ||
383 job->draw_max_y <= job->draw_min_y) {
384 goto done;
385 }
386
387 if (vc4_debug & VC4_DEBUG_CL) {
388 fprintf(stderr, "BCL:\n");
389 vc4_dump_cl(job->bcl.base, cl_offset(&job->bcl), false);
390 }
391
392 if (cl_offset(&job->bcl) > 0) {
393 /* Increment the semaphore indicating that binning is done and
394 * unblocking the render thread. Note that this doesn't act
395 * until the FLUSH completes.
396 */
397 cl_ensure_space(&job->bcl, 8);
398 cl_emit(&job->bcl, INCREMENT_SEMAPHORE, incr);
399 /* The FLUSH caps all of our bin lists with a
400 * VC4_PACKET_RETURN.
401 */
402 cl_emit(&job->bcl, FLUSH, flush);
403 }
404 struct drm_vc4_submit_cl submit = {
405 .color_read.hindex = ~0,
406 .zs_read.hindex = ~0,
407 .color_write.hindex = ~0,
408 .msaa_color_write.hindex = ~0,
409 .zs_write.hindex = ~0,
410 .msaa_zs_write.hindex = ~0,
411 };
412
413 cl_ensure_space(&job->bo_handles, 6 * sizeof(uint32_t));
414 cl_ensure_space(&job->bo_pointers, 6 * sizeof(struct vc4_bo *));
415
416 if (job->resolve & PIPE_CLEAR_COLOR) {
417 if (!(job->cleared & PIPE_CLEAR_COLOR)) {
418 vc4_submit_setup_rcl_surface(job, &submit.color_read,
419 job->color_read,
420 false, false);
421 }
422 vc4_submit_setup_rcl_render_config_surface(job,
423 &submit.color_write,
424 job->color_write);
425 vc4_submit_setup_rcl_msaa_surface(job,
426 &submit.msaa_color_write,
427 job->msaa_color_write);
428 }
429 if (job->resolve & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
430 if (!(job->cleared & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) {
431 vc4_submit_setup_rcl_surface(job, &submit.zs_read,
432 job->zs_read, true, false);
433 }
434 vc4_submit_setup_rcl_surface(job, &submit.zs_write,
435 job->zs_write, true, true);
436 vc4_submit_setup_rcl_msaa_surface(job, &submit.msaa_zs_write,
437 job->msaa_zs_write);
438 }
439
440 if (job->msaa) {
441 /* This bit controls how many pixels the general
442 * (i.e. subsampled) loads/stores are iterating over
443 * (multisample loads replicate out to the other samples).
444 */
445 submit.color_write.bits |= VC4_RENDER_CONFIG_MS_MODE_4X;
446 /* Controls whether color_write's
447 * VC4_PACKET_STORE_MS_TILE_BUFFER does 4x decimation
448 */
449 submit.color_write.bits |= VC4_RENDER_CONFIG_DECIMATE_MODE_4X;
450 }
451
452 submit.bo_handles = (uintptr_t)job->bo_handles.base;
453 submit.bo_handle_count = cl_offset(&job->bo_handles) / 4;
454 submit.bin_cl = (uintptr_t)job->bcl.base;
455 submit.bin_cl_size = cl_offset(&job->bcl);
456 submit.shader_rec = (uintptr_t)job->shader_rec.base;
457 submit.shader_rec_size = cl_offset(&job->shader_rec);
458 submit.shader_rec_count = job->shader_rec_count;
459 submit.uniforms = (uintptr_t)job->uniforms.base;
460 submit.uniforms_size = cl_offset(&job->uniforms);
461 if (job->perfmon)
462 submit.perfmonid = job->perfmon->id;
463
464 assert(job->draw_min_x != ~0 && job->draw_min_y != ~0);
465 submit.min_x_tile = job->draw_min_x / job->tile_width;
466 submit.min_y_tile = job->draw_min_y / job->tile_height;
467 submit.max_x_tile = (job->draw_max_x - 1) / job->tile_width;
468 submit.max_y_tile = (job->draw_max_y - 1) / job->tile_height;
469 submit.width = job->draw_width;
470 submit.height = job->draw_height;
471 if (job->cleared) {
472 submit.flags |= VC4_SUBMIT_CL_USE_CLEAR_COLOR;
473 submit.clear_color[0] = job->clear_color[0];
474 submit.clear_color[1] = job->clear_color[1];
475 submit.clear_z = job->clear_depth;
476 submit.clear_s = job->clear_stencil;
477 }
478 submit.flags |= job->flags;
479
480 if (!(vc4_debug & VC4_DEBUG_NORAST)) {
481 int ret;
482
483 #ifndef USE_VC4_SIMULATOR
484 ret = drmIoctl(vc4->fd, DRM_IOCTL_VC4_SUBMIT_CL, &submit);
485 #else
486 ret = vc4_simulator_flush(vc4, &submit, job);
487 #endif
488 static bool warned = false;
489 if (ret && !warned) {
490 fprintf(stderr, "Draw call returned %s. "
491 "Expect corruption.\n", strerror(errno));
492 warned = true;
493 } else if (!ret) {
494 vc4->last_emit_seqno = submit.seqno;
495 if (job->perfmon)
496 job->perfmon->last_seqno = submit.seqno;
497 }
498 }
499
500 if (vc4->last_emit_seqno - vc4->screen->finished_seqno > 5) {
501 if (!vc4_wait_seqno(vc4->screen,
502 vc4->last_emit_seqno - 5,
503 PIPE_TIMEOUT_INFINITE,
504 "job throttling")) {
505 fprintf(stderr, "Job throttling failed\n");
506 }
507 }
508
509 if (vc4_debug & VC4_DEBUG_ALWAYS_SYNC) {
510 if (!vc4_wait_seqno(vc4->screen, vc4->last_emit_seqno,
511 PIPE_TIMEOUT_INFINITE, "sync")) {
512 fprintf(stderr, "Wait failed.\n");
513 abort();
514 }
515 }
516
517 done:
518 vc4_job_free(vc4, job);
519 }
520
521 static bool
522 vc4_job_compare(const void *a, const void *b)
523 {
524 return memcmp(a, b, sizeof(struct vc4_job_key)) == 0;
525 }
526
527 static uint32_t
528 vc4_job_hash(const void *key)
529 {
530 return _mesa_hash_data(key, sizeof(struct vc4_job_key));
531 }
532
533 void
534 vc4_job_init(struct vc4_context *vc4)
535 {
536 vc4->jobs = _mesa_hash_table_create(vc4,
537 vc4_job_hash,
538 vc4_job_compare);
539 vc4->write_jobs = _mesa_hash_table_create(vc4,
540 _mesa_hash_pointer,
541 _mesa_key_pointer_equal);
542 }
543