gallium: add PIPE_CAP_TGSI_VOTE for when the VOTE ops are allowed
[mesa.git] / src / gallium / drivers / vc4 / vc4_screen.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/ralloc.h"
34
35 #include "vc4_screen.h"
36 #include "vc4_context.h"
37 #include "vc4_resource.h"
38
39 static const struct debug_named_value debug_options[] = {
40 { "cl", VC4_DEBUG_CL,
41 "Dump command list during creation" },
42 { "qpu", VC4_DEBUG_QPU,
43 "Dump generated QPU instructions" },
44 { "qir", VC4_DEBUG_QIR,
45 "Dump QPU IR during program compile" },
46 { "nir", VC4_DEBUG_NIR,
47 "Dump NIR during program compile" },
48 { "tgsi", VC4_DEBUG_TGSI,
49 "Dump TGSI during program compile" },
50 { "shaderdb", VC4_DEBUG_SHADERDB,
51 "Dump program compile information for shader-db analysis" },
52 { "perf", VC4_DEBUG_PERF,
53 "Print during performance-related events" },
54 { "norast", VC4_DEBUG_NORAST,
55 "Skip actual hardware execution of commands" },
56 { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
57 "Flush after each draw call" },
58 { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
59 "Wait for finish after each flush" },
60 #if USE_VC4_SIMULATOR
61 { "dump", VC4_DEBUG_DUMP,
62 "Write a GPU command stream trace file" },
63 #endif
64 { NULL }
65 };
66
67 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
68 uint32_t vc4_debug;
69
70 static const char *
71 vc4_screen_get_name(struct pipe_screen *pscreen)
72 {
73 return "VC4";
74 }
75
76 static const char *
77 vc4_screen_get_vendor(struct pipe_screen *pscreen)
78 {
79 return "Broadcom";
80 }
81
82 static void
83 vc4_screen_destroy(struct pipe_screen *pscreen)
84 {
85 vc4_bufmgr_destroy(pscreen);
86 ralloc_free(pscreen);
87 }
88
89 static int
90 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
91 {
92 switch (param) {
93 /* Supported features (boolean caps). */
94 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
95 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
96 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
97 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
98 case PIPE_CAP_NPOT_TEXTURES:
99 case PIPE_CAP_SHAREABLE_SHADERS:
100 case PIPE_CAP_USER_CONSTANT_BUFFERS:
101 case PIPE_CAP_TEXTURE_SHADOW_MAP:
102 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
103 case PIPE_CAP_TWO_SIDED_STENCIL:
104 case PIPE_CAP_USER_INDEX_BUFFERS:
105 case PIPE_CAP_TEXTURE_MULTISAMPLE:
106 case PIPE_CAP_TEXTURE_SWIZZLE:
107 return 1;
108
109 /* lying for GL 2.0 */
110 case PIPE_CAP_OCCLUSION_QUERY:
111 case PIPE_CAP_POINT_SPRITE:
112 return 1;
113
114 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
115 return 256;
116
117 case PIPE_CAP_GLSL_FEATURE_LEVEL:
118 return 120;
119
120 case PIPE_CAP_MAX_VIEWPORTS:
121 return 1;
122
123 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
124 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
125 return 1;
126
127 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
128 return 1;
129
130 /* Unsupported features. */
131 case PIPE_CAP_ANISOTROPIC_FILTER:
132 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
133 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
134 case PIPE_CAP_CUBE_MAP_ARRAY:
135 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
136 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
137 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
138 case PIPE_CAP_SEAMLESS_CUBE_MAP:
139 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
140 case PIPE_CAP_TGSI_INSTANCEID:
141 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
142 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
143 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
144 case PIPE_CAP_COMPUTE:
145 case PIPE_CAP_START_INSTANCE:
146 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
147 case PIPE_CAP_SHADER_STENCIL_EXPORT:
148 case PIPE_CAP_TGSI_TEXCOORD:
149 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
150 case PIPE_CAP_CONDITIONAL_RENDER:
151 case PIPE_CAP_PRIMITIVE_RESTART:
152 case PIPE_CAP_TEXTURE_BARRIER:
153 case PIPE_CAP_SM3:
154 case PIPE_CAP_INDEP_BLEND_ENABLE:
155 case PIPE_CAP_INDEP_BLEND_FUNC:
156 case PIPE_CAP_DEPTH_CLIP_DISABLE:
157 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
158 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
159 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
160 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
161 case PIPE_CAP_USER_VERTEX_BUFFERS:
162 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
163 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
164 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
165 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
166 case PIPE_CAP_TEXTURE_GATHER_SM5:
167 case PIPE_CAP_FAKE_SW_MSAA:
168 case PIPE_CAP_TEXTURE_QUERY_LOD:
169 case PIPE_CAP_SAMPLE_SHADING:
170 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
171 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
172 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
173 case PIPE_CAP_MAX_TEXEL_OFFSET:
174 case PIPE_CAP_MAX_VERTEX_STREAMS:
175 case PIPE_CAP_DRAW_INDIRECT:
176 case PIPE_CAP_MULTI_DRAW_INDIRECT:
177 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
178 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
179 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
180 case PIPE_CAP_SAMPLER_VIEW_TARGET:
181 case PIPE_CAP_CLIP_HALFZ:
182 case PIPE_CAP_VERTEXID_NOBASE:
183 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
184 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
185 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
186 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
187 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
188 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
189 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
190 case PIPE_CAP_DEPTH_BOUNDS_TEST:
191 case PIPE_CAP_TGSI_TXQS:
192 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
193 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
194 case PIPE_CAP_CLEAR_TEXTURE:
195 case PIPE_CAP_DRAW_PARAMETERS:
196 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
197 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
198 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
199 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
200 case PIPE_CAP_INVALIDATE_BUFFER:
201 case PIPE_CAP_GENERATE_MIPMAP:
202 case PIPE_CAP_STRING_MARKER:
203 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
204 case PIPE_CAP_QUERY_BUFFER_OBJECT:
205 case PIPE_CAP_QUERY_MEMORY_INFO:
206 case PIPE_CAP_PCI_GROUP:
207 case PIPE_CAP_PCI_BUS:
208 case PIPE_CAP_PCI_DEVICE:
209 case PIPE_CAP_PCI_FUNCTION:
210 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
211 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
212 case PIPE_CAP_CULL_DISTANCE:
213 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
214 case PIPE_CAP_TGSI_VOTE:
215 return 0;
216
217 /* Stream output. */
218 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
219 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
220 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
221 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
222 return 0;
223
224 /* Geometry shader output, unsupported. */
225 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
226 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
227 return 0;
228
229 /* Texturing. */
230 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
231 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
232 return VC4_MAX_MIP_LEVELS;
233 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
234 /* Note: Not supported in hardware, just faking it. */
235 return 5;
236 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
237 return 0;
238
239 /* Render targets. */
240 case PIPE_CAP_MAX_RENDER_TARGETS:
241 return 1;
242
243 /* Queries. */
244 case PIPE_CAP_QUERY_TIME_ELAPSED:
245 case PIPE_CAP_QUERY_TIMESTAMP:
246 return 0;
247
248 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
249 case PIPE_CAP_MIN_TEXEL_OFFSET:
250 return 0;
251
252 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
253 return 2048;
254
255 case PIPE_CAP_ENDIANNESS:
256 return PIPE_ENDIAN_LITTLE;
257
258 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
259 return 64;
260
261 case PIPE_CAP_VENDOR_ID:
262 return 0x14E4;
263 case PIPE_CAP_DEVICE_ID:
264 return 0xFFFFFFFF;
265 case PIPE_CAP_ACCELERATED:
266 return 1;
267 case PIPE_CAP_VIDEO_MEMORY: {
268 uint64_t system_memory;
269
270 if (!os_get_total_physical_memory(&system_memory))
271 return 0;
272
273 return (int)(system_memory >> 20);
274 }
275 case PIPE_CAP_UMA:
276 return 1;
277
278 default:
279 fprintf(stderr, "unknown param %d\n", param);
280 return 0;
281 }
282 }
283
284 static float
285 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
286 {
287 switch (param) {
288 case PIPE_CAPF_MAX_LINE_WIDTH:
289 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
290 return 32;
291
292 case PIPE_CAPF_MAX_POINT_WIDTH:
293 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
294 return 512.0f;
295
296 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
297 return 0.0f;
298 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
299 return 0.0f;
300 case PIPE_CAPF_GUARD_BAND_LEFT:
301 case PIPE_CAPF_GUARD_BAND_TOP:
302 case PIPE_CAPF_GUARD_BAND_RIGHT:
303 case PIPE_CAPF_GUARD_BAND_BOTTOM:
304 return 0.0f;
305 default:
306 fprintf(stderr, "unknown paramf %d\n", param);
307 return 0;
308 }
309 }
310
311 static int
312 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
313 enum pipe_shader_cap param)
314 {
315 if (shader != PIPE_SHADER_VERTEX &&
316 shader != PIPE_SHADER_FRAGMENT) {
317 return 0;
318 }
319
320 /* this is probably not totally correct.. but it's a start: */
321 switch (param) {
322 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
323 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
324 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
325 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
326 return 16384;
327 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
328 return 0;
329 case PIPE_SHADER_CAP_MAX_INPUTS:
330 if (shader == PIPE_SHADER_FRAGMENT)
331 return 8;
332 else
333 return 16;
334 case PIPE_SHADER_CAP_MAX_OUTPUTS:
335 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
336 case PIPE_SHADER_CAP_MAX_TEMPS:
337 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
338 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
339 return 16 * 1024 * sizeof(float);
340 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
341 return 1;
342 case PIPE_SHADER_CAP_MAX_PREDS:
343 return 0; /* nothing uses this */
344 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
345 return 0;
346 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
347 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
348 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
349 return 0;
350 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
351 return 1;
352 case PIPE_SHADER_CAP_SUBROUTINES:
353 return 0;
354 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
355 return 0;
356 case PIPE_SHADER_CAP_INTEGERS:
357 return 1;
358 case PIPE_SHADER_CAP_DOUBLES:
359 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
360 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
361 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
362 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
363 return 0;
364 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
365 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
366 return VC4_MAX_TEXTURE_SAMPLERS;
367 case PIPE_SHADER_CAP_PREFERRED_IR:
368 return PIPE_SHADER_IR_TGSI;
369 case PIPE_SHADER_CAP_SUPPORTED_IRS:
370 return 0;
371 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
372 return 32;
373 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
374 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
375 return 0;
376 default:
377 fprintf(stderr, "unknown shader param %d\n", param);
378 return 0;
379 }
380 return 0;
381 }
382
383 static boolean
384 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
385 enum pipe_format format,
386 enum pipe_texture_target target,
387 unsigned sample_count,
388 unsigned usage)
389 {
390 unsigned retval = 0;
391
392 if (sample_count > 1 && sample_count != VC4_MAX_SAMPLES)
393 return FALSE;
394
395 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
396 !util_format_is_supported(format, usage)) {
397 return FALSE;
398 }
399
400 if (usage & PIPE_BIND_VERTEX_BUFFER) {
401 switch (format) {
402 case PIPE_FORMAT_R32G32B32A32_FLOAT:
403 case PIPE_FORMAT_R32G32B32_FLOAT:
404 case PIPE_FORMAT_R32G32_FLOAT:
405 case PIPE_FORMAT_R32_FLOAT:
406 case PIPE_FORMAT_R32G32B32A32_SNORM:
407 case PIPE_FORMAT_R32G32B32_SNORM:
408 case PIPE_FORMAT_R32G32_SNORM:
409 case PIPE_FORMAT_R32_SNORM:
410 case PIPE_FORMAT_R32G32B32A32_SSCALED:
411 case PIPE_FORMAT_R32G32B32_SSCALED:
412 case PIPE_FORMAT_R32G32_SSCALED:
413 case PIPE_FORMAT_R32_SSCALED:
414 case PIPE_FORMAT_R16G16B16A16_UNORM:
415 case PIPE_FORMAT_R16G16B16_UNORM:
416 case PIPE_FORMAT_R16G16_UNORM:
417 case PIPE_FORMAT_R16_UNORM:
418 case PIPE_FORMAT_R16G16B16A16_SNORM:
419 case PIPE_FORMAT_R16G16B16_SNORM:
420 case PIPE_FORMAT_R16G16_SNORM:
421 case PIPE_FORMAT_R16_SNORM:
422 case PIPE_FORMAT_R16G16B16A16_USCALED:
423 case PIPE_FORMAT_R16G16B16_USCALED:
424 case PIPE_FORMAT_R16G16_USCALED:
425 case PIPE_FORMAT_R16_USCALED:
426 case PIPE_FORMAT_R16G16B16A16_SSCALED:
427 case PIPE_FORMAT_R16G16B16_SSCALED:
428 case PIPE_FORMAT_R16G16_SSCALED:
429 case PIPE_FORMAT_R16_SSCALED:
430 case PIPE_FORMAT_R8G8B8A8_UNORM:
431 case PIPE_FORMAT_R8G8B8_UNORM:
432 case PIPE_FORMAT_R8G8_UNORM:
433 case PIPE_FORMAT_R8_UNORM:
434 case PIPE_FORMAT_R8G8B8A8_SNORM:
435 case PIPE_FORMAT_R8G8B8_SNORM:
436 case PIPE_FORMAT_R8G8_SNORM:
437 case PIPE_FORMAT_R8_SNORM:
438 case PIPE_FORMAT_R8G8B8A8_USCALED:
439 case PIPE_FORMAT_R8G8B8_USCALED:
440 case PIPE_FORMAT_R8G8_USCALED:
441 case PIPE_FORMAT_R8_USCALED:
442 case PIPE_FORMAT_R8G8B8A8_SSCALED:
443 case PIPE_FORMAT_R8G8B8_SSCALED:
444 case PIPE_FORMAT_R8G8_SSCALED:
445 case PIPE_FORMAT_R8_SSCALED:
446 retval |= PIPE_BIND_VERTEX_BUFFER;
447 break;
448 default:
449 break;
450 }
451 }
452
453 if ((usage & PIPE_BIND_RENDER_TARGET) &&
454 vc4_rt_format_supported(format)) {
455 retval |= PIPE_BIND_RENDER_TARGET;
456 }
457
458 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
459 vc4_tex_format_supported(format)) {
460 retval |= PIPE_BIND_SAMPLER_VIEW;
461 }
462
463 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
464 (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
465 format == PIPE_FORMAT_X8Z24_UNORM)) {
466 retval |= PIPE_BIND_DEPTH_STENCIL;
467 }
468
469 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
470 (format == PIPE_FORMAT_I8_UINT ||
471 format == PIPE_FORMAT_I16_UINT)) {
472 retval |= PIPE_BIND_INDEX_BUFFER;
473 }
474
475 if (usage & PIPE_BIND_TRANSFER_READ)
476 retval |= PIPE_BIND_TRANSFER_READ;
477 if (usage & PIPE_BIND_TRANSFER_WRITE)
478 retval |= PIPE_BIND_TRANSFER_WRITE;
479
480 #if 0
481 if (retval != usage) {
482 fprintf(stderr,
483 "not supported: format=%s, target=%d, sample_count=%d, "
484 "usage=0x%x, retval=0x%x\n", util_format_name(format),
485 target, sample_count, usage, retval);
486 }
487 #endif
488
489 return retval == usage;
490 }
491
492 struct pipe_screen *
493 vc4_screen_create(int fd)
494 {
495 struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
496 struct pipe_screen *pscreen;
497
498 pscreen = &screen->base;
499
500 pscreen->destroy = vc4_screen_destroy;
501 pscreen->get_param = vc4_screen_get_param;
502 pscreen->get_paramf = vc4_screen_get_paramf;
503 pscreen->get_shader_param = vc4_screen_get_shader_param;
504 pscreen->context_create = vc4_context_create;
505 pscreen->is_format_supported = vc4_screen_is_format_supported;
506
507 screen->fd = fd;
508 list_inithead(&screen->bo_cache.time_list);
509
510 vc4_fence_init(screen);
511
512 vc4_debug = debug_get_option_vc4_debug();
513 if (vc4_debug & VC4_DEBUG_SHADERDB)
514 vc4_debug |= VC4_DEBUG_NORAST;
515
516 #if USE_VC4_SIMULATOR
517 vc4_simulator_init(screen);
518 #endif
519
520 vc4_resource_screen_init(pscreen);
521
522 pscreen->get_name = vc4_screen_get_name;
523 pscreen->get_vendor = vc4_screen_get_vendor;
524 pscreen->get_device_vendor = vc4_screen_get_vendor;
525
526 return pscreen;
527 }
528
529 boolean
530 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
531 struct vc4_bo *bo,
532 unsigned stride,
533 struct winsys_handle *whandle)
534 {
535 whandle->stride = stride;
536
537 /* If we're passing some reference to our BO out to some other part of
538 * the system, then we can't do any optimizations about only us being
539 * the ones seeing it (like BO caching or shadow update avoidance).
540 */
541 bo->private = false;
542
543 switch (whandle->type) {
544 case DRM_API_HANDLE_TYPE_SHARED:
545 return vc4_bo_flink(bo, &whandle->handle);
546 case DRM_API_HANDLE_TYPE_KMS:
547 whandle->handle = bo->handle;
548 return TRUE;
549 case DRM_API_HANDLE_TYPE_FD:
550 whandle->handle = vc4_bo_get_dmabuf(bo);
551 return whandle->handle != -1;
552 }
553
554 return FALSE;
555 }
556
557 struct vc4_bo *
558 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
559 struct winsys_handle *whandle)
560 {
561 struct vc4_screen *screen = vc4_screen(pscreen);
562
563 if (whandle->offset != 0) {
564 fprintf(stderr,
565 "Attempt to import unsupported winsys offset %u\n",
566 whandle->offset);
567 return NULL;
568 }
569
570 switch (whandle->type) {
571 case DRM_API_HANDLE_TYPE_SHARED:
572 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
573 case DRM_API_HANDLE_TYPE_FD:
574 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
575 default:
576 fprintf(stderr,
577 "Attempt to import unsupported handle type %d\n",
578 whandle->type);
579 return NULL;
580 }
581 }