src/intel/compiler/brw_disasm.c

   1 /*
   2  * Copyright © 2008 Keith Packard
   3  *
   4  * Permission to use, copy, modify, distribute, and sell this software and its
   5  * documentation for any purpose is hereby granted without fee, provided that
   6  * the above copyright notice appear in all copies and that both that copyright
   7  * notice and this permission notice appear in supporting documentation, and
   8  * that the name of the copyright holders not be used in advertising or
   9  * publicity pertaining to distribution of the software without specific,
  10  * written prior permission.  The copyright holders make no representations
  11  * about the suitability of this software for any purpose.  It is provided "as
  12  * is" without express or implied warranty.
  13  *
  14  * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  15  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  16  * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  17  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  18  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  19  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  20  * OF THIS SOFTWARE.
  21  */
  22
  23 #include <stdio.h>
  24 #include <string.h>
  25 #include <stdarg.h>
  26
  27 #include "brw_eu_defines.h"
  28 #include "brw_inst.h"
  29 #include "brw_shader.h"
  30 #include "brw_reg.h"
  31 #include "brw_inst.h"
  32 #include "brw_eu.h"
  33 #include "util/half_float.h"
  34
  35 static bool
  36 has_jip(const struct gen_device_info *devinfo, enum opcode opcode)
  37 {
  38    if (devinfo->gen < 6)
  39       return false;
  40
  41    return opcode == BRW_OPCODE_IF ||
  42           opcode == BRW_OPCODE_ELSE ||
  43           opcode == BRW_OPCODE_ENDIF ||
  44           opcode == BRW_OPCODE_WHILE ||
  45           opcode == BRW_OPCODE_BREAK ||
  46           opcode == BRW_OPCODE_CONTINUE ||
  47           opcode == BRW_OPCODE_HALT;
  48 }
  49
  50 static bool
  51 has_uip(const struct gen_device_info *devinfo, enum opcode opcode)
  52 {
  53    if (devinfo->gen < 6)
  54       return false;
  55
  56    return (devinfo->gen >= 7 && opcode == BRW_OPCODE_IF) ||
  57           (devinfo->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
  58           opcode == BRW_OPCODE_BREAK ||
  59           opcode == BRW_OPCODE_CONTINUE ||
  60           opcode == BRW_OPCODE_HALT;
  61 }
  62
  63 static bool
  64 has_branch_ctrl(const struct gen_device_info *devinfo, enum opcode opcode)
  65 {
  66    if (devinfo->gen < 8)
  67       return false;
  68
  69    return opcode == BRW_OPCODE_IF ||
  70           opcode == BRW_OPCODE_ELSE;
  71           /* opcode == BRW_OPCODE_GOTO; */
  72 }
  73
  74 static bool
  75 is_logic_instruction(unsigned opcode)
  76 {
  77    return opcode == BRW_OPCODE_AND ||
  78           opcode == BRW_OPCODE_NOT ||
  79           opcode == BRW_OPCODE_OR ||
  80           opcode == BRW_OPCODE_XOR;
  81 }
  82
  83 static bool
  84 is_send(unsigned opcode)
  85 {
  86    return opcode == BRW_OPCODE_SEND ||
  87           opcode == BRW_OPCODE_SENDC ||
  88           opcode == BRW_OPCODE_SENDS ||
  89           opcode == BRW_OPCODE_SENDSC;
  90 }
  91
  92 static bool
  93 is_split_send(UNUSED const struct gen_device_info *devinfo, unsigned opcode)
  94 {
  95    return opcode == BRW_OPCODE_SENDS ||
  96           opcode == BRW_OPCODE_SENDSC;
  97 }
  98
  99 const char *const conditional_modifier[16] = {
 100    [BRW_CONDITIONAL_NONE] = "",
 101    [BRW_CONDITIONAL_Z]    = ".z",
 102    [BRW_CONDITIONAL_NZ]   = ".nz",
 103    [BRW_CONDITIONAL_G]    = ".g",
 104    [BRW_CONDITIONAL_GE]   = ".ge",
 105    [BRW_CONDITIONAL_L]    = ".l",
 106    [BRW_CONDITIONAL_LE]   = ".le",
 107    [BRW_CONDITIONAL_R]    = ".r",
 108    [BRW_CONDITIONAL_O]    = ".o",
 109    [BRW_CONDITIONAL_U]    = ".u",
 110 };
 111
 112 static const char *const m_negate[2] = {
 113    [0] = "",
 114    [1] = "-",
 115 };
 116
 117 static const char *const _abs[2] = {
 118    [0] = "",
 119    [1] = "(abs)",
 120 };
 121
 122 static const char *const m_bitnot[2] = { "", "~" };
 123
 124 static const char *const vert_stride[16] = {
 125    [0] = "0",
 126    [1] = "1",
 127    [2] = "2",
 128    [3] = "4",
 129    [4] = "8",
 130    [5] = "16",
 131    [6] = "32",
 132    [15] = "VxH",
 133 };
 134
 135 static const char *const width[8] = {
 136    [0] = "1",
 137    [1] = "2",
 138    [2] = "4",
 139    [3] = "8",
 140    [4] = "16",
 141 };
 142
 143 static const char *const horiz_stride[4] = {
 144    [0] = "0",
 145    [1] = "1",
 146    [2] = "2",
 147    [3] = "4"
 148 };
 149
 150 static const char *const chan_sel[4] = {
 151    [0] = "x",
 152    [1] = "y",
 153    [2] = "z",
 154    [3] = "w",
 155 };
 156
 157 static const char *const debug_ctrl[2] = {
 158    [0] = "",
 159    [1] = ".breakpoint"
 160 };
 161
 162 static const char *const saturate[2] = {
 163    [0] = "",
 164    [1] = ".sat"
 165 };
 166
 167 static const char *const cmpt_ctrl[2] = {
 168    [0] = "",
 169    [1] = "compacted"
 170 };
 171
 172 static const char *const accwr[2] = {
 173    [0] = "",
 174    [1] = "AccWrEnable"
 175 };
 176
 177 static const char *const branch_ctrl[2] = {
 178    [0] = "",
 179    [1] = "BranchCtrl"
 180 };
 181
 182 static const char *const wectrl[2] = {
 183    [0] = "",
 184    [1] = "WE_all"
 185 };
 186
 187 static const char *const exec_size[8] = {
 188    [0] = "1",
 189    [1] = "2",
 190    [2] = "4",
 191    [3] = "8",
 192    [4] = "16",
 193    [5] = "32"
 194 };
 195
 196 static const char *const pred_inv[2] = {
 197    [0] = "+",
 198    [1] = "-"
 199 };
 200
 201 const char *const pred_ctrl_align16[16] = {
 202    [1] = "",
 203    [2] = ".x",
 204    [3] = ".y",
 205    [4] = ".z",
 206    [5] = ".w",
 207    [6] = ".any4h",
 208    [7] = ".all4h",
 209 };
 210
 211 static const char *const pred_ctrl_align1[16] = {
 212    [BRW_PREDICATE_NORMAL]        = "",
 213    [BRW_PREDICATE_ALIGN1_ANYV]   = ".anyv",
 214    [BRW_PREDICATE_ALIGN1_ALLV]   = ".allv",
 215    [BRW_PREDICATE_ALIGN1_ANY2H]  = ".any2h",
 216    [BRW_PREDICATE_ALIGN1_ALL2H]  = ".all2h",
 217    [BRW_PREDICATE_ALIGN1_ANY4H]  = ".any4h",
 218    [BRW_PREDICATE_ALIGN1_ALL4H]  = ".all4h",
 219    [BRW_PREDICATE_ALIGN1_ANY8H]  = ".any8h",
 220    [BRW_PREDICATE_ALIGN1_ALL8H]  = ".all8h",
 221    [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
 222    [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",
 223    [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
 224    [BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h",
 225 };
 226
 227 static const char *const thread_ctrl[4] = {
 228    [BRW_THREAD_NORMAL] = "",
 229    [BRW_THREAD_ATOMIC] = "atomic",
 230    [BRW_THREAD_SWITCH] = "switch",
 231 };
 232
 233 static const char *const compr_ctrl[4] = {
 234    [0] = "",
 235    [1] = "sechalf",
 236    [2] = "compr",
 237    [3] = "compr4",
 238 };
 239
 240 static const char *const dep_ctrl[4] = {
 241    [0] = "",
 242    [1] = "NoDDClr",
 243    [2] = "NoDDChk",
 244    [3] = "NoDDClr,NoDDChk",
 245 };
 246
 247 static const char *const mask_ctrl[4] = {
 248    [0] = "",
 249    [1] = "nomask",
 250 };
 251
 252 static const char *const access_mode[2] = {
 253    [0] = "align1",
 254    [1] = "align16",
 255 };
 256
 257 static const char *const reg_file[4] = {
 258    [0] = "A",
 259    [1] = "g",
 260    [2] = "m",
 261    [3] = "imm",
 262 };
 263
 264 static const char *const writemask[16] = {
 265    [0x0] = ".",
 266    [0x1] = ".x",
 267    [0x2] = ".y",
 268    [0x3] = ".xy",
 269    [0x4] = ".z",
 270    [0x5] = ".xz",
 271    [0x6] = ".yz",
 272    [0x7] = ".xyz",
 273    [0x8] = ".w",
 274    [0x9] = ".xw",
 275    [0xa] = ".yw",
 276    [0xb] = ".xyw",
 277    [0xc] = ".zw",
 278    [0xd] = ".xzw",
 279    [0xe] = ".yzw",
 280    [0xf] = "",
 281 };
 282
 283 static const char *const end_of_thread[2] = {
 284    [0] = "",
 285    [1] = "EOT"
 286 };
 287
 288 /* SFIDs on Gen4-5 */
 289 static const char *const gen4_sfid[16] = {
 290    [BRW_SFID_NULL]            = "null",
 291    [BRW_SFID_MATH]            = "math",
 292    [BRW_SFID_SAMPLER]         = "sampler",
 293    [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
 294    [BRW_SFID_DATAPORT_READ]   = "read",
 295    [BRW_SFID_DATAPORT_WRITE]  = "write",
 296    [BRW_SFID_URB]             = "urb",
 297    [BRW_SFID_THREAD_SPAWNER]  = "thread_spawner",
 298    [BRW_SFID_VME]             = "vme",
 299 };
 300
 301 static const char *const gen6_sfid[16] = {
 302    [BRW_SFID_NULL]                     = "null",
 303    [BRW_SFID_MATH]                     = "math",
 304    [BRW_SFID_SAMPLER]                  = "sampler",
 305    [BRW_SFID_MESSAGE_GATEWAY]          = "gateway",
 306    [BRW_SFID_URB]                      = "urb",
 307    [BRW_SFID_THREAD_SPAWNER]           = "thread_spawner",
 308    [GEN6_SFID_DATAPORT_SAMPLER_CACHE]  = "dp_sampler",
 309    [GEN6_SFID_DATAPORT_RENDER_CACHE]   = "render",
 310    [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
 311    [GEN7_SFID_DATAPORT_DATA_CACHE]     = "data",
 312    [GEN7_SFID_PIXEL_INTERPOLATOR]      = "pixel interp",
 313    [HSW_SFID_DATAPORT_DATA_CACHE_1]    = "dp data 1",
 314    [HSW_SFID_CRE]                      = "cre",
 315 };
 316
 317 static const char *const gen7_gateway_subfuncid[8] = {
 318    [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY] = "open",
 319    [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY] = "close",
 320    [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG] = "forward msg",
 321    [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP] = "get timestamp",
 322    [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG] = "barrier msg",
 323    [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE] = "update state",
 324    [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE] = "mmio read/write",
 325 };
 326
 327 static const char *const gen4_dp_read_port_msg_type[4] = {
 328    [0b00] = "OWord Block Read",
 329    [0b01] = "OWord Dual Block Read",
 330    [0b10] = "Media Block Read",
 331    [0b11] = "DWord Scattered Read",
 332 };
 333
 334 static const char *const g45_dp_read_port_msg_type[8] = {
 335    [0b000] = "OWord Block Read",
 336    [0b010] = "OWord Dual Block Read",
 337    [0b100] = "Media Block Read",
 338    [0b110] = "DWord Scattered Read",
 339    [0b001] = "Render Target UNORM Read",
 340    [0b011] = "AVC Loop Filter Read",
 341 };
 342
 343 static const char *const dp_write_port_msg_type[8] = {
 344    [0b000] = "OWord block write",
 345    [0b001] = "OWord dual block write",
 346    [0b010] = "media block write",
 347    [0b011] = "DWord scattered write",
 348    [0b100] = "RT write",
 349    [0b101] = "streamed VB write",
 350    [0b110] = "RT UNORM write", /* G45+ */
 351    [0b111] = "flush render cache",
 352 };
 353
 354 static const char *const dp_rc_msg_type_gen6[16] = {
 355    [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
 356    [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
 357    [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
 358    [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
 359    [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
 360       "OWORD unaligned block read",
 361    [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
 362    [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
 363    [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
 364    [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
 365       "OWORD dual block write",
 366    [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
 367    [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
 368       "DWORD scattered write",
 369    [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
 370    [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
 371    [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
 372 };
 373
 374 static const char *const dp_rc_msg_type_gen7[16] = {
 375    [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ] = "media block read",
 376    [GEN7_DATAPORT_RC_TYPED_SURFACE_READ] = "typed surface read",
 377    [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP] = "typed atomic op",
 378    [GEN7_DATAPORT_RC_MEMORY_FENCE] = "memory fence",
 379    [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE] = "media block write",
 380    [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write",
 381    [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE] = "typed surface write"
 382 };
 383
 384 static const char *const dp_rc_msg_type_gen9[16] = {
 385    [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write",
 386    [GEN9_DATAPORT_RC_RENDER_TARGET_READ] = "RT read"
 387 };
 388
 389 static const char *const *
 390 dp_rc_msg_type(const struct gen_device_info *devinfo)
 391 {
 392    return (devinfo->gen >= 9 ? dp_rc_msg_type_gen9 :
 393            devinfo->gen >= 7 ? dp_rc_msg_type_gen7 :
 394            devinfo->gen >= 6 ? dp_rc_msg_type_gen6 :
 395            dp_write_port_msg_type);
 396 }
 397
 398 static const char *const m_rt_write_subtype[] = {
 399    [0b000] = "SIMD16",
 400    [0b001] = "SIMD16/RepData",
 401    [0b010] = "SIMD8/DualSrcLow",
 402    [0b011] = "SIMD8/DualSrcHigh",
 403    [0b100] = "SIMD8",
 404    [0b101] = "SIMD8/ImageWrite",   /* Gen6+ */
 405    [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
 406 };
 407
 408 static const char *const dp_dc0_msg_type_gen7[16] = {
 409    [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
 410    [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
 411       "DC unaligned OWORD block read",
 412    [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
 413    [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
 414    [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
 415    [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read",
 416    [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
 417    [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
 418    [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
 419    [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
 420    [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
 421    [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
 422    [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
 423 };
 424
 425 static const char *const dp_dc1_msg_type_hsw[32] = {
 426    [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
 427    [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
 428    [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
 429       "DC untyped 4x2 atomic op",
 430    [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
 431    [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
 432    [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
 433    [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
 434    [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
 435    [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
 436    [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
 437    [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
 438       "DC 4x2 atomic counter op",
 439    [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
 440    [GEN9_DATAPORT_DC_PORT1_A64_SCATTERED_READ] = "DC A64 scattered read",
 441    [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ] = "DC A64 untyped surface read",
 442    [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP] = "DC A64 untyped atomic op",
 443    [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE] = "DC A64 untyped surface write",
 444    [GEN8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE] = "DC A64 scattered write",
 445    [GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP] =
 446       "DC untyped atomic float op",
 447    [GEN9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP] =
 448       "DC A64 untyped atomic float op",
 449 };
 450
 451 static const char *const aop[16] = {
 452    [BRW_AOP_AND]    = "and",
 453    [BRW_AOP_OR]     = "or",
 454    [BRW_AOP_XOR]    = "xor",
 455    [BRW_AOP_MOV]    = "mov",
 456    [BRW_AOP_INC]    = "inc",
 457    [BRW_AOP_DEC]    = "dec",
 458    [BRW_AOP_ADD]    = "add",
 459    [BRW_AOP_SUB]    = "sub",
 460    [BRW_AOP_REVSUB] = "revsub",
 461    [BRW_AOP_IMAX]   = "imax",
 462    [BRW_AOP_IMIN]   = "imin",
 463    [BRW_AOP_UMAX]   = "umax",
 464    [BRW_AOP_UMIN]   = "umin",
 465    [BRW_AOP_CMPWR]  = "cmpwr",
 466    [BRW_AOP_PREDEC] = "predec",
 467 };
 468
 469 static const char *const aop_float[4] = {
 470    [BRW_AOP_FMAX]   = "fmax",
 471    [BRW_AOP_FMIN]   = "fmin",
 472    [BRW_AOP_FCMPWR] = "fcmpwr",
 473 };
 474
 475 static const char * const pixel_interpolator_msg_types[4] = {
 476     [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",
 477     [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",
 478     [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",
 479     [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",
 480 };
 481
 482 static const char *const math_function[16] = {
 483    [BRW_MATH_FUNCTION_INV]    = "inv",
 484    [BRW_MATH_FUNCTION_LOG]    = "log",
 485    [BRW_MATH_FUNCTION_EXP]    = "exp",
 486    [BRW_MATH_FUNCTION_SQRT]   = "sqrt",
 487    [BRW_MATH_FUNCTION_RSQ]    = "rsq",
 488    [BRW_MATH_FUNCTION_SIN]    = "sin",
 489    [BRW_MATH_FUNCTION_COS]    = "cos",
 490    [BRW_MATH_FUNCTION_SINCOS] = "sincos",
 491    [BRW_MATH_FUNCTION_FDIV]   = "fdiv",
 492    [BRW_MATH_FUNCTION_POW]    = "pow",
 493    [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
 494    [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT]  = "intdiv",
 495    [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
 496    [GEN8_MATH_FUNCTION_INVM]  = "invm",
 497    [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
 498 };
 499
 500 static const char *const math_saturate[2] = {
 501    [0] = "",
 502    [1] = "sat"
 503 };
 504
 505 static const char *const math_signed[2] = {
 506    [0] = "",
 507    [1] = "signed"
 508 };
 509
 510 static const char *const math_scalar[2] = {
 511    [0] = "",
 512    [1] = "scalar"
 513 };
 514
 515 static const char *const math_precision[2] = {
 516    [0] = "",
 517    [1] = "partial_precision"
 518 };
 519
 520 static const char *const gen5_urb_opcode[] = {
 521    [0] = "urb_write",
 522    [1] = "ff_sync",
 523 };
 524
 525 static const char *const gen7_urb_opcode[] = {
 526    [BRW_URB_OPCODE_WRITE_HWORD] = "write HWord",
 527    [BRW_URB_OPCODE_WRITE_OWORD] = "write OWord",
 528    [BRW_URB_OPCODE_READ_HWORD] = "read HWord",
 529    [BRW_URB_OPCODE_READ_OWORD] = "read OWord",
 530    [GEN7_URB_OPCODE_ATOMIC_MOV] = "atomic mov",  /* Gen7+ */
 531    [GEN7_URB_OPCODE_ATOMIC_INC] = "atomic inc",  /* Gen7+ */
 532    [GEN8_URB_OPCODE_ATOMIC_ADD] = "atomic add",  /* Gen8+ */
 533    [GEN8_URB_OPCODE_SIMD8_WRITE] = "SIMD8 write", /* Gen8+ */
 534    [GEN8_URB_OPCODE_SIMD8_READ] = "SIMD8 read",  /* Gen8+ */
 535    /* [9-15] - reserved */
 536 };
 537
 538 static const char *const urb_swizzle[4] = {
 539    [BRW_URB_SWIZZLE_NONE]       = "",
 540    [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
 541    [BRW_URB_SWIZZLE_TRANSPOSE]  = "transpose",
 542 };
 543
 544 static const char *const urb_allocate[2] = {
 545    [0] = "",
 546    [1] = "allocate"
 547 };
 548
 549 static const char *const urb_used[2] = {
 550    [0] = "",
 551    [1] = "used"
 552 };
 553
 554 static const char *const urb_complete[2] = {
 555    [0] = "",
 556    [1] = "complete"
 557 };
 558
 559 static const char *const gen5_sampler_msg_type[] = {
 560    [GEN5_SAMPLER_MESSAGE_SAMPLE]              = "sample",
 561    [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS]         = "sample_b",
 562    [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD]          = "sample_l",
 563    [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE]      = "sample_c",
 564    [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS]       = "sample_d",
 565    [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c",
 566    [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE]  = "sample_l_c",
 567    [GEN5_SAMPLER_MESSAGE_SAMPLE_LD]           = "ld",
 568    [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4]      = "gather4",
 569    [GEN5_SAMPLER_MESSAGE_LOD]                 = "lod",
 570    [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO]      = "resinfo",
 571    [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO]   = "sampleinfo",
 572    [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C]    = "gather4_c",
 573    [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO]   = "gather4_po",
 574    [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c",
 575    [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c",
 576    [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ]           = "sample_lz",
 577    [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ]         = "sample_c_lz",
 578    [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ]        = "ld_lz",
 579    [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W]     = "ld2dms_w",
 580    [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS]       = "ld_mcs",
 581    [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS]       = "ld2dms",
 582    [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS]       = "ld2dss",
 583 };
 584
 585 static const char *const gen5_sampler_simd_mode[4] = {
 586    [BRW_SAMPLER_SIMD_MODE_SIMD4X2]   = "SIMD4x2",
 587    [BRW_SAMPLER_SIMD_MODE_SIMD8]     = "SIMD8",
 588    [BRW_SAMPLER_SIMD_MODE_SIMD16]    = "SIMD16",
 589    [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64",
 590 };
 591
 592 static const char *const sampler_target_format[4] = {
 593    [0] = "F",
 594    [2] = "UD",
 595    [3] = "D"
 596 };
 597
 598
 599 static int column;
 600
 601 static int
 602 string(FILE *file, const char *string)
 603 {
 604    fputs(string, file);
 605    column += strlen(string);
 606    return 0;
 607 }
 608
 609 static int
 610 format(FILE *f, const char *format, ...) PRINTFLIKE(2, 3);
 611
 612 static int
 613 format(FILE *f, const char *format, ...)
 614 {
 615    char buf[1024];
 616    va_list args;
 617    va_start(args, format);
 618
 619    vsnprintf(buf, sizeof(buf) - 1, format, args);
 620    va_end(args);
 621    string(f, buf);
 622    return 0;
 623 }
 624
 625 static int
 626 newline(FILE *f)
 627 {
 628    putc('\n', f);
 629    column = 0;
 630    return 0;
 631 }
 632
 633 static int
 634 pad(FILE *f, int c)
 635 {
 636    do
 637       string(f, " ");
 638    while (column < c);
 639    return 0;
 640 }
 641
 642 static int
 643 control(FILE *file, const char *name, const char *const ctrl[],
 644         unsigned id, int *space)
 645 {
 646    if (!ctrl[id]) {
 647       fprintf(file, "*** invalid %s value %d ", name, id);
 648       return 1;
 649    }
 650    if (ctrl[id][0]) {
 651       if (space && *space)
 652          string(file, " ");
 653       string(file, ctrl[id]);
 654       if (space)
 655          *space = 1;
 656    }
 657    return 0;
 658 }
 659
 660 static int
 661 print_opcode(FILE *file, const struct gen_device_info *devinfo,
 662              enum opcode id)
 663 {
 664    const struct opcode_desc *desc = brw_opcode_desc(devinfo, id);
 665    if (!desc) {
 666       format(file, "*** invalid opcode value %d ", id);
 667       return 1;
 668    }
 669    string(file, desc->name);
 670    return 0;
 671 }
 672
 673 static int
 674 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
 675 {
 676    int err = 0;
 677
 678    /* Clear the Compr4 instruction compression bit. */
 679    if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
 680       _reg_nr &= ~BRW_MRF_COMPR4;
 681
 682    if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
 683       switch (_reg_nr & 0xf0) {
 684       case BRW_ARF_NULL:
 685          string(file, "null");
 686          break;
 687       case BRW_ARF_ADDRESS:
 688          format(file, "a%d", _reg_nr & 0x0f);
 689          break;
 690       case BRW_ARF_ACCUMULATOR:
 691          format(file, "acc%d", _reg_nr & 0x0f);
 692          break;
 693       case BRW_ARF_FLAG:
 694          format(file, "f%d", _reg_nr & 0x0f);
 695          break;
 696       case BRW_ARF_MASK:
 697          format(file, "mask%d", _reg_nr & 0x0f);
 698          break;
 699       case BRW_ARF_MASK_STACK:
 700          format(file, "msd%d", _reg_nr & 0x0f);
 701          break;
 702       case BRW_ARF_STATE:
 703          format(file, "sr%d", _reg_nr & 0x0f);
 704          break;
 705       case BRW_ARF_CONTROL:
 706          format(file, "cr%d", _reg_nr & 0x0f);
 707          break;
 708       case BRW_ARF_NOTIFICATION_COUNT:
 709          format(file, "n%d", _reg_nr & 0x0f);
 710          break;
 711       case BRW_ARF_IP:
 712          string(file, "ip");
 713          return -1;
 714          break;
 715       case BRW_ARF_TDR:
 716          format(file, "tdr0");
 717          return -1;
 718       case BRW_ARF_TIMESTAMP:
 719          format(file, "tm%d", _reg_nr & 0x0f);
 720          break;
 721       default:
 722          format(file, "ARF%d", _reg_nr);
 723          break;
 724       }
 725    } else {
 726       err |= control(file, "src reg file", reg_file, _reg_file, NULL);
 727       format(file, "%d", _reg_nr);
 728    }
 729    return err;
 730 }
 731
 732 static int
 733 dest(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
 734 {
 735    enum brw_reg_type type = brw_inst_dst_type(devinfo, inst);
 736    unsigned elem_size = brw_reg_type_to_size(type);
 737    int err = 0;
 738
 739    if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {
 740       /* These are fixed for split sends */
 741       type = BRW_REGISTER_TYPE_UD;
 742       elem_size = 4;
 743       if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
 744          err |= reg(file, brw_inst_send_dst_reg_file(devinfo, inst),
 745                     brw_inst_dst_da_reg_nr(devinfo, inst));
 746          unsigned subreg_nr = brw_inst_dst_da16_subreg_nr(devinfo, inst);
 747          if (subreg_nr)
 748             format(file, ".%u", subreg_nr);
 749          string(file, brw_reg_type_to_letters(type));
 750       } else {
 751          string(file, "g[a0");
 752          if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
 753             format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) /
 754                    elem_size);
 755          if (brw_inst_send_dst_ia16_addr_imm(devinfo, inst))
 756             format(file, " %d", brw_inst_send_dst_ia16_addr_imm(devinfo, inst));
 757          string(file, "]<");
 758          string(file, brw_reg_type_to_letters(type));
 759       }
 760    } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
 761       if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
 762          err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
 763                     brw_inst_dst_da_reg_nr(devinfo, inst));
 764          if (err == -1)
 765             return 0;
 766          if (brw_inst_dst_da1_subreg_nr(devinfo, inst))
 767             format(file, ".%"PRIu64, brw_inst_dst_da1_subreg_nr(devinfo, inst) /
 768                    elem_size);
 769          string(file, "<");
 770          err |= control(file, "horiz stride", horiz_stride,
 771                         brw_inst_dst_hstride(devinfo, inst), NULL);
 772          string(file, ">");
 773          string(file, brw_reg_type_to_letters(type));
 774       } else {
 775          string(file, "g[a0");
 776          if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
 777             format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) /
 778                    elem_size);
 779          if (brw_inst_dst_ia1_addr_imm(devinfo, inst))
 780             format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst));
 781          string(file, "]<");
 782          err |= control(file, "horiz stride", horiz_stride,
 783                         brw_inst_dst_hstride(devinfo, inst), NULL);
 784          string(file, ">");
 785          string(file, brw_reg_type_to_letters(type));
 786       }
 787    } else {
 788       if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
 789          err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
 790                     brw_inst_dst_da_reg_nr(devinfo, inst));
 791          if (err == -1)
 792             return 0;
 793          if (brw_inst_dst_da16_subreg_nr(devinfo, inst))
 794             format(file, ".%u", 16 / elem_size);
 795          string(file, "<1>");
 796          err |= control(file, "writemask", writemask,
 797                         brw_inst_da16_writemask(devinfo, inst), NULL);
 798          string(file, brw_reg_type_to_letters(type));
 799       } else {
 800          err = 1;
 801          string(file, "Indirect align16 address mode not supported");
 802       }
 803    }
 804
 805    return 0;
 806 }
 807
 808 static int
 809 dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
 810 {
 811    bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
 812    int err = 0;
 813    uint32_t reg_file;
 814    unsigned subreg_nr;
 815    enum brw_reg_type type;
 816
 817    if (devinfo->gen == 6 && brw_inst_3src_a16_dst_reg_file(devinfo, inst))
 818       reg_file = BRW_MESSAGE_REGISTER_FILE;
 819    else if (devinfo->gen >= 12)
 820       reg_file = brw_inst_3src_a1_dst_reg_file(devinfo, inst);
 821    else if (is_align1 && brw_inst_3src_a1_dst_reg_file(devinfo, inst))
 822       reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
 823    else
 824       reg_file = BRW_GENERAL_REGISTER_FILE;
 825
 826    err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst));
 827    if (err == -1)
 828       return 0;
 829
 830    if (is_align1) {
 831       type = brw_inst_3src_a1_dst_type(devinfo, inst);
 832       subreg_nr = brw_inst_3src_a1_dst_subreg_nr(devinfo, inst);
 833    } else {
 834       type = brw_inst_3src_a16_dst_type(devinfo, inst);
 835       subreg_nr = brw_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4;
 836    }
 837    subreg_nr /= brw_reg_type_to_size(type);
 838
 839    if (subreg_nr)
 840       format(file, ".%u", subreg_nr);
 841    string(file, "<1>");
 842
 843    if (!is_align1) {
 844       err |= control(file, "writemask", writemask,
 845                      brw_inst_3src_a16_dst_writemask(devinfo, inst), NULL);
 846    }
 847    string(file, brw_reg_type_to_letters(type));
 848
 849    return 0;
 850 }
 851
 852 static int
 853 src_align1_region(FILE *file,
 854                   unsigned _vert_stride, unsigned _width,
 855                   unsigned _horiz_stride)
 856 {
 857    int err = 0;
 858    string(file, "<");
 859    err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
 860    string(file, ",");
 861    err |= control(file, "width", width, _width, NULL);
 862    string(file, ",");
 863    err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
 864    string(file, ">");
 865    return err;
 866 }
 867
 868 static int
 869 src_da1(FILE *file,
 870         const struct gen_device_info *devinfo,
 871         unsigned opcode,
 872         enum brw_reg_type type, unsigned _reg_file,
 873         unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
 874         unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
 875         unsigned _negate)
 876 {
 877    int err = 0;
 878
 879    if (devinfo->gen >= 8 && is_logic_instruction(opcode))
 880       err |= control(file, "bitnot", m_bitnot, _negate, NULL);
 881    else
 882       err |= control(file, "negate", m_negate, _negate, NULL);
 883
 884    err |= control(file, "abs", _abs, __abs, NULL);
 885
 886    err |= reg(file, _reg_file, reg_num);
 887    if (err == -1)
 888       return 0;
 889    if (sub_reg_num) {
 890       unsigned elem_size = brw_reg_type_to_size(type);
 891       format(file, ".%d", sub_reg_num / elem_size);   /* use formal style like spec */
 892    }
 893    src_align1_region(file, _vert_stride, _width, _horiz_stride);
 894    string(file, brw_reg_type_to_letters(type));
 895    return err;
 896 }
 897
 898 static int
 899 src_ia1(FILE *file,
 900         const struct gen_device_info *devinfo,
 901         unsigned opcode,
 902         enum brw_reg_type type,
 903         int _addr_imm,
 904         unsigned _addr_subreg_nr,
 905         unsigned _negate,
 906         unsigned __abs,
 907         unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
 908 {
 909    int err = 0;
 910
 911    if (devinfo->gen >= 8 && is_logic_instruction(opcode))
 912       err |= control(file, "bitnot", m_bitnot, _negate, NULL);
 913    else
 914       err |= control(file, "negate", m_negate, _negate, NULL);
 915
 916    err |= control(file, "abs", _abs, __abs, NULL);
 917
 918    string(file, "g[a0");
 919    if (_addr_subreg_nr)
 920       format(file, ".%d", _addr_subreg_nr);
 921    if (_addr_imm)
 922       format(file, " %d", _addr_imm);
 923    string(file, "]");
 924    src_align1_region(file, _vert_stride, _width, _horiz_stride);
 925    string(file, brw_reg_type_to_letters(type));
 926    return err;
 927 }
 928
 929 static int
 930 src_swizzle(FILE *file, unsigned swiz)
 931 {
 932    unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
 933    unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
 934    unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
 935    unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
 936    int err = 0;
 937
 938    if (x == y && x == z && x == w) {
 939       string(file, ".");
 940       err |= control(file, "channel select", chan_sel, x, NULL);
 941    } else if (swiz != BRW_SWIZZLE_XYZW) {
 942       string(file, ".");
 943       err |= control(file, "channel select", chan_sel, x, NULL);
 944       err |= control(file, "channel select", chan_sel, y, NULL);
 945       err |= control(file, "channel select", chan_sel, z, NULL);
 946       err |= control(file, "channel select", chan_sel, w, NULL);
 947    }
 948    return err;
 949 }
 950
 951 static int
 952 src_da16(FILE *file,
 953          const struct gen_device_info *devinfo,
 954          unsigned opcode,
 955          enum brw_reg_type type,
 956          unsigned _reg_file,
 957          unsigned _vert_stride,
 958          unsigned _reg_nr,
 959          unsigned _subreg_nr,
 960          unsigned __abs,
 961          unsigned _negate,
 962          unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
 963 {
 964    int err = 0;
 965
 966    if (devinfo->gen >= 8 && is_logic_instruction(opcode))
 967       err |= control(file, "bitnot", m_bitnot, _negate, NULL);
 968    else
 969       err |= control(file, "negate", m_negate, _negate, NULL);
 970
 971    err |= control(file, "abs", _abs, __abs, NULL);
 972
 973    err |= reg(file, _reg_file, _reg_nr);
 974    if (err == -1)
 975       return 0;
 976    if (_subreg_nr) {
 977       unsigned elem_size = brw_reg_type_to_size(type);
 978
 979       /* bit4 for subreg number byte addressing. Make this same meaning as
 980          in da1 case, so output looks consistent. */
 981       format(file, ".%d", 16 / elem_size);
 982    }
 983    string(file, "<");
 984    err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
 985    string(file, ">");
 986    err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
 987    string(file, brw_reg_type_to_letters(type));
 988    return err;
 989 }
 990
 991 static enum brw_vertical_stride
 992 vstride_from_align1_3src_vstride(const struct gen_device_info *devinfo,
 993                                  enum gen10_align1_3src_vertical_stride vstride)
 994 {
 995    switch (vstride) {
 996    case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0;
 997    case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2:
 998       if (devinfo->gen >= 12)
 999          return BRW_VERTICAL_STRIDE_1;
1000       else
1001          return BRW_VERTICAL_STRIDE_2;
1002    case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4;
1003    case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8: return BRW_VERTICAL_STRIDE_8;
1004    default:
1005       unreachable("not reached");
1006    }
1007 }
1008
1009 static enum brw_horizontal_stride
1010 hstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride)
1011 {
1012    switch (hstride) {
1013    case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_HORIZONTAL_STRIDE_0;
1014    case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_HORIZONTAL_STRIDE_1;
1015    case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_HORIZONTAL_STRIDE_2;
1016    case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_HORIZONTAL_STRIDE_4;
1017    default:
1018       unreachable("not reached");
1019    }
1020 }
1021
1022 static enum brw_vertical_stride
1023 vstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride)
1024 {
1025    switch (hstride) {
1026    case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0;
1027    case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_VERTICAL_STRIDE_1;
1028    case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_VERTICAL_STRIDE_2;
1029    case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4;
1030    default:
1031       unreachable("not reached");
1032    }
1033 }
1034
1035 /* From "GEN10 Regioning Rules for Align1 Ternary Operations" in the
1036  * "Register Region Restrictions" documentation
1037  */
1038 static enum brw_width
1039 implied_width(enum brw_vertical_stride _vert_stride,
1040               enum brw_horizontal_stride _horiz_stride)
1041 {
1042    /* "1. Width is 1 when Vertical and Horizontal Strides are both zero." */
1043    if (_vert_stride == BRW_VERTICAL_STRIDE_0 &&
1044        _horiz_stride == BRW_HORIZONTAL_STRIDE_0) {
1045       return BRW_WIDTH_1;
1046
1047    /* "2. Width is equal to vertical stride when Horizontal Stride is zero." */
1048    } else if (_horiz_stride == BRW_HORIZONTAL_STRIDE_0) {
1049       switch (_vert_stride) {
1050       case BRW_VERTICAL_STRIDE_2: return BRW_WIDTH_2;
1051       case BRW_VERTICAL_STRIDE_4: return BRW_WIDTH_4;
1052       case BRW_VERTICAL_STRIDE_8: return BRW_WIDTH_8;
1053       case BRW_VERTICAL_STRIDE_0:
1054       default:
1055          unreachable("not reached");
1056       }
1057
1058    } else {
1059       /* FINISHME: Implement these: */
1060
1061       /* "3. Width is equal to Vertical Stride/Horizontal Stride when both
1062        *     Strides are non-zero.
1063        *
1064        *  4. Vertical Stride must not be zero if Horizontal Stride is non-zero.
1065        *     This implies Vertical Stride is always greater than Horizontal
1066        *     Stride."
1067        *
1068        * Given these statements and the knowledge that the stride and width
1069        * values are encoded in logarithmic form, we can perform the division
1070        * by just subtracting.
1071        */
1072       return _vert_stride - _horiz_stride;
1073    }
1074 }
1075
1076 static int
1077 src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1078 {
1079    int err = 0;
1080    unsigned reg_nr, subreg_nr;
1081    enum brw_reg_file _file;
1082    enum brw_reg_type type;
1083    enum brw_vertical_stride _vert_stride;
1084    enum brw_width _width;
1085    enum brw_horizontal_stride _horiz_stride;
1086    bool is_scalar_region;
1087    bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
1088
1089    if (is_align1) {
1090       if (devinfo->gen >= 12) {
1091          _file = brw_inst_3src_a1_src0_reg_file(devinfo, inst);
1092          reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);
1093          subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst);
1094          type = brw_inst_3src_a1_src0_type(devinfo, inst);
1095       } else if (brw_inst_3src_a1_src0_reg_file(devinfo, inst) ==
1096                  BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
1097          _file = BRW_GENERAL_REGISTER_FILE;
1098          reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);
1099          subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst);
1100          type = brw_inst_3src_a1_src0_type(devinfo, inst);
1101       } else if (brw_inst_3src_a1_src0_type(devinfo, inst) ==
1102                  BRW_REGISTER_TYPE_NF) {
1103          _file = BRW_ARCHITECTURE_REGISTER_FILE;
1104          reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);
1105          subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst);
1106          type = brw_inst_3src_a1_src0_type(devinfo, inst);
1107       } else {
1108          _file = BRW_IMMEDIATE_VALUE;
1109          uint16_t imm_val = brw_inst_3src_a1_src0_imm(devinfo, inst);
1110          enum brw_reg_type type = brw_inst_3src_a1_src0_type(devinfo, inst);
1111
1112          if (type == BRW_REGISTER_TYPE_W) {
1113             format(file, "%dW", imm_val);
1114          } else if (type == BRW_REGISTER_TYPE_UW) {
1115             format(file, "0x%04xUW", imm_val);
1116          } else if (type == BRW_REGISTER_TYPE_HF) {
1117             format(file, "%-gF", _mesa_half_to_float(imm_val));
1118          }
1119          return 0;
1120       }
1121
1122       _vert_stride = vstride_from_align1_3src_vstride(
1123          devinfo, brw_inst_3src_a1_src0_vstride(devinfo, inst));
1124       _horiz_stride = hstride_from_align1_3src_hstride(
1125                          brw_inst_3src_a1_src0_hstride(devinfo, inst));
1126       _width = implied_width(_vert_stride, _horiz_stride);
1127    } else {
1128       _file = BRW_GENERAL_REGISTER_FILE;
1129       reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);
1130       subreg_nr = brw_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4;
1131       type = brw_inst_3src_a16_src_type(devinfo, inst);
1132
1133       if (brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) {
1134          _vert_stride = BRW_VERTICAL_STRIDE_0;
1135          _width = BRW_WIDTH_1;
1136          _horiz_stride = BRW_HORIZONTAL_STRIDE_0;
1137       } else {
1138          _vert_stride = BRW_VERTICAL_STRIDE_4;
1139          _width = BRW_WIDTH_4;
1140          _horiz_stride = BRW_HORIZONTAL_STRIDE_1;
1141       }
1142    }
1143    is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&
1144                       _width == BRW_WIDTH_1 &&
1145                       _horiz_stride == BRW_HORIZONTAL_STRIDE_0;
1146
1147    subreg_nr /= brw_reg_type_to_size(type);
1148
1149    err |= control(file, "negate", m_negate,
1150                   brw_inst_3src_src0_negate(devinfo, inst), NULL);
1151    err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL);
1152
1153    err |= reg(file, _file, reg_nr);
1154    if (err == -1)
1155       return 0;
1156    if (subreg_nr || is_scalar_region)
1157       format(file, ".%d", subreg_nr);
1158    src_align1_region(file, _vert_stride, _width, _horiz_stride);
1159    if (!is_scalar_region && !is_align1)
1160       err |= src_swizzle(file, brw_inst_3src_a16_src0_swizzle(devinfo, inst));
1161    string(file, brw_reg_type_to_letters(type));
1162    return err;
1163 }
1164
1165 static int
1166 src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1167 {
1168    int err = 0;
1169    unsigned reg_nr, subreg_nr;
1170    enum brw_reg_file _file;
1171    enum brw_reg_type type;
1172    enum brw_vertical_stride _vert_stride;
1173    enum brw_width _width;
1174    enum brw_horizontal_stride _horiz_stride;
1175    bool is_scalar_region;
1176    bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
1177
1178    if (is_align1) {
1179       if (devinfo->gen >= 12) {
1180          _file = brw_inst_3src_a1_src1_reg_file(devinfo, inst);
1181       } else if (brw_inst_3src_a1_src1_reg_file(devinfo, inst) ==
1182                  BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
1183          _file = BRW_GENERAL_REGISTER_FILE;
1184       } else {
1185          _file = BRW_ARCHITECTURE_REGISTER_FILE;
1186       }
1187
1188       reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst);
1189       subreg_nr = brw_inst_3src_a1_src1_subreg_nr(devinfo, inst);
1190       type = brw_inst_3src_a1_src1_type(devinfo, inst);
1191
1192       _vert_stride = vstride_from_align1_3src_vstride(
1193          devinfo, brw_inst_3src_a1_src1_vstride(devinfo, inst));
1194       _horiz_stride = hstride_from_align1_3src_hstride(
1195                          brw_inst_3src_a1_src1_hstride(devinfo, inst));
1196       _width = implied_width(_vert_stride, _horiz_stride);
1197    } else {
1198       _file = BRW_GENERAL_REGISTER_FILE;
1199       reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst);
1200       subreg_nr = brw_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4;
1201       type = brw_inst_3src_a16_src_type(devinfo, inst);
1202
1203       if (brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) {
1204          _vert_stride = BRW_VERTICAL_STRIDE_0;
1205          _width = BRW_WIDTH_1;
1206          _horiz_stride = BRW_HORIZONTAL_STRIDE_0;
1207       } else {
1208          _vert_stride = BRW_VERTICAL_STRIDE_4;
1209          _width = BRW_WIDTH_4;
1210          _horiz_stride = BRW_HORIZONTAL_STRIDE_1;
1211       }
1212    }
1213    is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&
1214                       _width == BRW_WIDTH_1 &&
1215                       _horiz_stride == BRW_HORIZONTAL_STRIDE_0;
1216
1217    subreg_nr /= brw_reg_type_to_size(type);
1218
1219    err |= control(file, "negate", m_negate,
1220                   brw_inst_3src_src1_negate(devinfo, inst), NULL);
1221    err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL);
1222
1223    err |= reg(file, _file, reg_nr);
1224    if (err == -1)
1225       return 0;
1226    if (subreg_nr || is_scalar_region)
1227       format(file, ".%d", subreg_nr);
1228    src_align1_region(file, _vert_stride, _width, _horiz_stride);
1229    if (!is_scalar_region && !is_align1)
1230       err |= src_swizzle(file, brw_inst_3src_a16_src1_swizzle(devinfo, inst));
1231    string(file, brw_reg_type_to_letters(type));
1232    return err;
1233 }
1234
1235 static int
1236 src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1237 {
1238    int err = 0;
1239    unsigned reg_nr, subreg_nr;
1240    enum brw_reg_file _file;
1241    enum brw_reg_type type;
1242    enum brw_vertical_stride _vert_stride;
1243    enum brw_width _width;
1244    enum brw_horizontal_stride _horiz_stride;
1245    bool is_scalar_region;
1246    bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
1247
1248    if (is_align1) {
1249       if (devinfo->gen >= 12) {
1250          _file = brw_inst_3src_a1_src2_reg_file(devinfo, inst);
1251          reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst);
1252          subreg_nr = brw_inst_3src_a1_src2_subreg_nr(devinfo, inst);
1253          type = brw_inst_3src_a1_src2_type(devinfo, inst);
1254       } else if (brw_inst_3src_a1_src2_reg_file(devinfo, inst) ==
1255                  BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
1256          _file = BRW_GENERAL_REGISTER_FILE;
1257          reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst);
1258          subreg_nr = brw_inst_3src_a1_src2_subreg_nr(devinfo, inst);
1259          type = brw_inst_3src_a1_src2_type(devinfo, inst);
1260       } else {
1261          _file = BRW_IMMEDIATE_VALUE;
1262          uint16_t imm_val = brw_inst_3src_a1_src2_imm(devinfo, inst);
1263          enum brw_reg_type type = brw_inst_3src_a1_src2_type(devinfo, inst);
1264
1265          if (type == BRW_REGISTER_TYPE_W) {
1266             format(file, "%dW", imm_val);
1267          } else if (type == BRW_REGISTER_TYPE_UW) {
1268             format(file, "0x%04xUW", imm_val);
1269          } else if (type == BRW_REGISTER_TYPE_HF) {
1270             format(file, "%-gF", _mesa_half_to_float(imm_val));
1271          }
1272          return 0;
1273       }
1274
1275       /* FINISHME: No vertical stride on src2. Is using the hstride in place
1276        *           correct? Doesn't seem like it, since there's hstride=1 but
1277        *           no vstride=1.
1278        */
1279       _vert_stride = vstride_from_align1_3src_hstride(
1280                         brw_inst_3src_a1_src2_hstride(devinfo, inst));
1281       _horiz_stride = hstride_from_align1_3src_hstride(
1282                          brw_inst_3src_a1_src2_hstride(devinfo, inst));
1283       _width = implied_width(_vert_stride, _horiz_stride);
1284    } else {
1285       _file = BRW_GENERAL_REGISTER_FILE;
1286       reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst);
1287       subreg_nr = brw_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4;
1288       type = brw_inst_3src_a16_src_type(devinfo, inst);
1289
1290       if (brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) {
1291          _vert_stride = BRW_VERTICAL_STRIDE_0;
1292          _width = BRW_WIDTH_1;
1293          _horiz_stride = BRW_HORIZONTAL_STRIDE_0;
1294       } else {
1295          _vert_stride = BRW_VERTICAL_STRIDE_4;
1296          _width = BRW_WIDTH_4;
1297          _horiz_stride = BRW_HORIZONTAL_STRIDE_1;
1298       }
1299    }
1300    is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&
1301                       _width == BRW_WIDTH_1 &&
1302                       _horiz_stride == BRW_HORIZONTAL_STRIDE_0;
1303
1304    subreg_nr /= brw_reg_type_to_size(type);
1305
1306    err |= control(file, "negate", m_negate,
1307                   brw_inst_3src_src2_negate(devinfo, inst), NULL);
1308    err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL);
1309
1310    err |= reg(file, _file, reg_nr);
1311    if (err == -1)
1312       return 0;
1313    if (subreg_nr || is_scalar_region)
1314       format(file, ".%d", subreg_nr);
1315    src_align1_region(file, _vert_stride, _width, _horiz_stride);
1316    if (!is_scalar_region && !is_align1)
1317       err |= src_swizzle(file, brw_inst_3src_a16_src2_swizzle(devinfo, inst));
1318    string(file, brw_reg_type_to_letters(type));
1319    return err;
1320 }
1321
1322 static int
1323 imm(FILE *file, const struct gen_device_info *devinfo, enum brw_reg_type type,
1324     const brw_inst *inst)
1325 {
1326    switch (type) {
1327    case BRW_REGISTER_TYPE_UQ:
1328       format(file, "0x%016"PRIx64"UQ", brw_inst_imm_uq(devinfo, inst));
1329       break;
1330    case BRW_REGISTER_TYPE_Q:
1331       format(file, "0x%016"PRIx64"Q", brw_inst_imm_uq(devinfo, inst));
1332       break;
1333    case BRW_REGISTER_TYPE_UD:
1334       format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst));
1335       break;
1336    case BRW_REGISTER_TYPE_D:
1337       format(file, "%dD", brw_inst_imm_d(devinfo, inst));
1338       break;
1339    case BRW_REGISTER_TYPE_UW:
1340       format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst));
1341       break;
1342    case BRW_REGISTER_TYPE_W:
1343       format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst));
1344       break;
1345    case BRW_REGISTER_TYPE_UV:
1346       format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
1347       break;
1348    case BRW_REGISTER_TYPE_VF:
1349       format(file, "0x%"PRIx64"VF", brw_inst_bits(inst, 127, 96));
1350       pad(file, 48);
1351       format(file, "/* [%-gF, %-gF, %-gF, %-gF]VF */",
1352              brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
1353              brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),
1354              brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),
1355              brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24));
1356       break;
1357    case BRW_REGISTER_TYPE_V:
1358       format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));
1359       break;
1360    case BRW_REGISTER_TYPE_F:
1361       /* The DIM instruction's src0 uses an F type but contains a
1362        * 64-bit immediate
1363        */
1364       if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_DIM) {
1365          format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 64));
1366          pad(file, 48);
1367          format(file, "/* %-gF */", brw_inst_imm_df(devinfo, inst));
1368       } else {
1369          format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 96));
1370          pad(file, 48);
1371          format(file, " /* %-gF */", brw_inst_imm_f(devinfo, inst));
1372       }
1373       break;
1374    case BRW_REGISTER_TYPE_DF:
1375       format(file, "0x%016"PRIx64"DF", brw_inst_bits(inst, 127, 64));
1376       pad(file, 48);
1377       format(file, "/* %-gDF */", brw_inst_imm_df(devinfo, inst));
1378       break;
1379    case BRW_REGISTER_TYPE_HF:
1380       string(file, "Half Float IMM");
1381       break;
1382    case BRW_REGISTER_TYPE_NF:
1383    case BRW_REGISTER_TYPE_UB:
1384    case BRW_REGISTER_TYPE_B:
1385       format(file, "*** invalid immediate type %d ", type);
1386    }
1387    return 0;
1388 }
1389
1390 static int
1391 src_sends_da(FILE *file,
1392              const struct gen_device_info *devinfo,
1393              enum brw_reg_type type,
1394              unsigned _reg_nr,
1395              unsigned _reg_subnr)
1396 {
1397    int err = 0;
1398
1399    err |= reg(file, BRW_GENERAL_REGISTER_FILE, _reg_nr);
1400    if (err == -1)
1401       return 0;
1402    if (_reg_subnr)
1403       format(file, ".1");
1404    string(file, brw_reg_type_to_letters(type));
1405
1406    return err;
1407 }
1408
1409 static int
1410 src_sends_ia(FILE *file,
1411              const struct gen_device_info *devinfo,
1412              enum brw_reg_type type,
1413              int _addr_imm,
1414              unsigned _addr_subreg_nr)
1415 {
1416    string(file, "g[a0");
1417    if (_addr_subreg_nr)
1418       format(file, ".1");
1419    if (_addr_imm)
1420       format(file, " %d", _addr_imm);
1421    string(file, "]");
1422    string(file, brw_reg_type_to_letters(type));
1423
1424    return 0;
1425 }
1426
1427 static int
1428 src0(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1429 {
1430    if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {
1431       if (brw_inst_send_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1432          return src_sends_da(file,
1433                              devinfo,
1434                              BRW_REGISTER_TYPE_UD,
1435                              brw_inst_src0_da_reg_nr(devinfo, inst),
1436                              brw_inst_src0_da16_subreg_nr(devinfo, inst));
1437       } else {
1438          return src_sends_ia(file,
1439                              devinfo,
1440                              BRW_REGISTER_TYPE_UD,
1441                              brw_inst_send_src0_ia16_addr_imm(devinfo, inst),
1442                              brw_inst_src0_ia_subreg_nr(devinfo, inst));
1443       }
1444    } else if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1445       return imm(file, devinfo, brw_inst_src0_type(devinfo, inst), inst);
1446    } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1447       if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1448          return src_da1(file,
1449                         devinfo,
1450                         brw_inst_opcode(devinfo, inst),
1451                         brw_inst_src0_type(devinfo, inst),
1452                         brw_inst_src0_reg_file(devinfo, inst),
1453                         brw_inst_src0_vstride(devinfo, inst),
1454                         brw_inst_src0_width(devinfo, inst),
1455                         brw_inst_src0_hstride(devinfo, inst),
1456                         brw_inst_src0_da_reg_nr(devinfo, inst),
1457                         brw_inst_src0_da1_subreg_nr(devinfo, inst),
1458                         brw_inst_src0_abs(devinfo, inst),
1459                         brw_inst_src0_negate(devinfo, inst));
1460       } else {
1461          return src_ia1(file,
1462                         devinfo,
1463                         brw_inst_opcode(devinfo, inst),
1464                         brw_inst_src0_type(devinfo, inst),
1465                         brw_inst_src0_ia1_addr_imm(devinfo, inst),
1466                         brw_inst_src0_ia_subreg_nr(devinfo, inst),
1467                         brw_inst_src0_negate(devinfo, inst),
1468                         brw_inst_src0_abs(devinfo, inst),
1469                         brw_inst_src0_hstride(devinfo, inst),
1470                         brw_inst_src0_width(devinfo, inst),
1471                         brw_inst_src0_vstride(devinfo, inst));
1472       }
1473    } else {
1474       if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1475          return src_da16(file,
1476                          devinfo,
1477                          brw_inst_opcode(devinfo, inst),
1478                          brw_inst_src0_type(devinfo, inst),
1479                          brw_inst_src0_reg_file(devinfo, inst),
1480                          brw_inst_src0_vstride(devinfo, inst),
1481                          brw_inst_src0_da_reg_nr(devinfo, inst),
1482                          brw_inst_src0_da16_subreg_nr(devinfo, inst),
1483                          brw_inst_src0_abs(devinfo, inst),
1484                          brw_inst_src0_negate(devinfo, inst),
1485                          brw_inst_src0_da16_swiz_x(devinfo, inst),
1486                          brw_inst_src0_da16_swiz_y(devinfo, inst),
1487                          brw_inst_src0_da16_swiz_z(devinfo, inst),
1488                          brw_inst_src0_da16_swiz_w(devinfo, inst));
1489       } else {
1490          string(file, "Indirect align16 address mode not supported");
1491          return 1;
1492       }
1493    }
1494 }
1495
1496 static int
1497 src1(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1498 {
1499    if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {
1500       return src_sends_da(file,
1501                           devinfo,
1502                           BRW_REGISTER_TYPE_UD,
1503                           brw_inst_send_src1_reg_nr(devinfo, inst),
1504                           0 /* subreg_nr */);
1505    } else if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1506       return imm(file, devinfo, brw_inst_src1_type(devinfo, inst), inst);
1507    } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1508       if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1509          return src_da1(file,
1510                         devinfo,
1511                         brw_inst_opcode(devinfo, inst),
1512                         brw_inst_src1_type(devinfo, inst),
1513                         brw_inst_src1_reg_file(devinfo, inst),
1514                         brw_inst_src1_vstride(devinfo, inst),
1515                         brw_inst_src1_width(devinfo, inst),
1516                         brw_inst_src1_hstride(devinfo, inst),
1517                         brw_inst_src1_da_reg_nr(devinfo, inst),
1518                         brw_inst_src1_da1_subreg_nr(devinfo, inst),
1519                         brw_inst_src1_abs(devinfo, inst),
1520                         brw_inst_src1_negate(devinfo, inst));
1521       } else {
1522          return src_ia1(file,
1523                         devinfo,
1524                         brw_inst_opcode(devinfo, inst),
1525                         brw_inst_src1_type(devinfo, inst),
1526                         brw_inst_src1_ia1_addr_imm(devinfo, inst),
1527                         brw_inst_src1_ia_subreg_nr(devinfo, inst),
1528                         brw_inst_src1_negate(devinfo, inst),
1529                         brw_inst_src1_abs(devinfo, inst),
1530                         brw_inst_src1_hstride(devinfo, inst),
1531                         brw_inst_src1_width(devinfo, inst),
1532                         brw_inst_src1_vstride(devinfo, inst));
1533       }
1534    } else {
1535       if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1536          return src_da16(file,
1537                          devinfo,
1538                          brw_inst_opcode(devinfo, inst),
1539                          brw_inst_src1_type(devinfo, inst),
1540                          brw_inst_src1_reg_file(devinfo, inst),
1541                          brw_inst_src1_vstride(devinfo, inst),
1542                          brw_inst_src1_da_reg_nr(devinfo, inst),
1543                          brw_inst_src1_da16_subreg_nr(devinfo, inst),
1544                          brw_inst_src1_abs(devinfo, inst),
1545                          brw_inst_src1_negate(devinfo, inst),
1546                          brw_inst_src1_da16_swiz_x(devinfo, inst),
1547                          brw_inst_src1_da16_swiz_y(devinfo, inst),
1548                          brw_inst_src1_da16_swiz_z(devinfo, inst),
1549                          brw_inst_src1_da16_swiz_w(devinfo, inst));
1550       } else {
1551          string(file, "Indirect align16 address mode not supported");
1552          return 1;
1553       }
1554    }
1555 }
1556
1557 static int
1558 qtr_ctrl(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1559 {
1560    int qtr_ctl = brw_inst_qtr_control(devinfo, inst);
1561    int exec_size = 1 << brw_inst_exec_size(devinfo, inst);
1562    const unsigned nib_ctl = devinfo->gen < 7 ? 0 :
1563                             brw_inst_nib_control(devinfo, inst);
1564
1565    if (exec_size < 8 || nib_ctl) {
1566       format(file, " %dN", qtr_ctl * 2 + nib_ctl + 1);
1567    } else if (exec_size == 8) {
1568       switch (qtr_ctl) {
1569       case 0:
1570          string(file, " 1Q");
1571          break;
1572       case 1:
1573          string(file, " 2Q");
1574          break;
1575       case 2:
1576          string(file, " 3Q");
1577          break;
1578       case 3:
1579          string(file, " 4Q");
1580          break;
1581       }
1582    } else if (exec_size == 16) {
1583       if (qtr_ctl < 2)
1584          string(file, " 1H");
1585       else
1586          string(file, " 2H");
1587    }
1588    return 0;
1589 }
1590
1591 static int
1592 swsb(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1593 {
1594    const struct tgl_swsb swsb = tgl_swsb_decode(brw_inst_swsb(devinfo, inst));
1595    if (swsb.regdist)
1596       format(file, " @%d", swsb.regdist);
1597    if (swsb.mode)
1598       format(file, " $%d%s", swsb.sbid,
1599              (swsb.mode & TGL_SBID_SET ? "" :
1600               swsb.mode & TGL_SBID_DST ? ".dst" : ".src"));
1601    return 0;
1602 }
1603
1604 #ifdef DEBUG
1605 static __attribute__((__unused__)) int
1606 brw_disassemble_imm(const struct gen_device_info *devinfo,
1607                     uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0)
1608 {
1609    brw_inst inst;
1610    inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0);
1611    inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2);
1612    return brw_disassemble_inst(stderr, devinfo, &inst, false);
1613 }
1614 #endif
1615
1616 int
1617 brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
1618                      const brw_inst *inst, bool is_compacted)
1619 {
1620    int err = 0;
1621    int space = 0;
1622
1623    const enum opcode opcode = brw_inst_opcode(devinfo, inst);
1624    const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
1625
1626    if (brw_inst_pred_control(devinfo, inst)) {
1627       string(file, "(");
1628       err |= control(file, "predicate inverse", pred_inv,
1629                      brw_inst_pred_inv(devinfo, inst), NULL);
1630       format(file, "f%"PRIu64".%"PRIu64,
1631              devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0,
1632              brw_inst_flag_subreg_nr(devinfo, inst));
1633       if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1634          err |= control(file, "predicate control align1", pred_ctrl_align1,
1635                         brw_inst_pred_control(devinfo, inst), NULL);
1636       } else {
1637          err |= control(file, "predicate control align16", pred_ctrl_align16,
1638                         brw_inst_pred_control(devinfo, inst), NULL);
1639       }
1640       string(file, ") ");
1641    }
1642
1643    err |= print_opcode(file, devinfo, opcode);
1644    err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst),
1645                   NULL);
1646
1647    err |= control(file, "debug control", debug_ctrl,
1648                   brw_inst_debug_control(devinfo, inst), NULL);
1649
1650    if (opcode == BRW_OPCODE_MATH) {
1651       string(file, " ");
1652       err |= control(file, "function", math_function,
1653                      brw_inst_math_function(devinfo, inst), NULL);
1654    } else if (!is_send(opcode)) {
1655       err |= control(file, "conditional modifier", conditional_modifier,
1656                      brw_inst_cond_modifier(devinfo, inst), NULL);
1657
1658       /* If we're using the conditional modifier, print which flags reg is
1659        * used for it.  Note that on gen6+, the embedded-condition SEL and
1660        * control flow doesn't update flags.
1661        */
1662       if (brw_inst_cond_modifier(devinfo, inst) &&
1663           (devinfo->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1664                                 opcode != BRW_OPCODE_CSEL &&
1665                                 opcode != BRW_OPCODE_IF &&
1666                                 opcode != BRW_OPCODE_WHILE))) {
1667          format(file, ".f%"PRIu64".%"PRIu64,
1668                 devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0,
1669                 brw_inst_flag_subreg_nr(devinfo, inst));
1670       }
1671    }
1672
1673    if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1674       string(file, "(");
1675       err |= control(file, "execution size", exec_size,
1676                      brw_inst_exec_size(devinfo, inst), NULL);
1677       string(file, ")");
1678    }
1679
1680    if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6)
1681       format(file, " %"PRIu64, brw_inst_base_mrf(devinfo, inst));
1682
1683    if (has_uip(devinfo, opcode)) {
1684       /* Instructions that have UIP also have JIP. */
1685       pad(file, 16);
1686       format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1687       pad(file, 32);
1688       format(file, "UIP: %d", brw_inst_uip(devinfo, inst));
1689    } else if (has_jip(devinfo, opcode)) {
1690       pad(file, 16);
1691       if (devinfo->gen >= 7) {
1692          format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1693       } else {
1694          format(file, "JIP: %d", brw_inst_gen6_jump_count(devinfo, inst));
1695       }
1696    } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1697                                    opcode == BRW_OPCODE_CONTINUE ||
1698                                    opcode == BRW_OPCODE_ELSE)) {
1699       pad(file, 16);
1700       format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1701       pad(file, 32);
1702       format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
1703    } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF ||
1704                                    opcode == BRW_OPCODE_IFF ||
1705                                    opcode == BRW_OPCODE_HALT ||
1706                                    opcode == BRW_OPCODE_WHILE)) {
1707       pad(file, 16);
1708       format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1709    } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1710       pad(file, 16);
1711       format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
1712    } else if (opcode == BRW_OPCODE_JMPI) {
1713       pad(file, 16);
1714       err |= src1(file, devinfo, inst);
1715    } else if (desc && desc->nsrc == 3) {
1716       pad(file, 16);
1717       err |= dest_3src(file, devinfo, inst);
1718
1719       pad(file, 32);
1720       err |= src0_3src(file, devinfo, inst);
1721
1722       pad(file, 48);
1723       err |= src1_3src(file, devinfo, inst);
1724
1725       pad(file, 64);
1726       err |= src2_3src(file, devinfo, inst);
1727    } else if (desc) {
1728       if (desc->ndst > 0) {
1729          pad(file, 16);
1730          err |= dest(file, devinfo, inst);
1731       }
1732
1733       if (desc->nsrc > 0) {
1734          pad(file, 32);
1735          err |= src0(file, devinfo, inst);
1736       }
1737
1738       if (desc->nsrc > 1) {
1739          pad(file, 48);
1740          err |= src1(file, devinfo, inst);
1741       }
1742    }
1743
1744    if (is_send(opcode)) {
1745       enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);
1746
1747       bool has_imm_desc = false, has_imm_ex_desc = false;
1748       uint32_t imm_desc = 0, imm_ex_desc = 0;
1749       if (is_split_send(devinfo, opcode)) {
1750          pad(file, 64);
1751          if (brw_inst_send_sel_reg32_desc(devinfo, inst)) {
1752             /* show the indirect descriptor source */
1753             err |= src_sends_ia(file, devinfo, BRW_REGISTER_TYPE_UD, 0, 0);
1754          } else {
1755             has_imm_desc = true;
1756             imm_desc = brw_inst_send_desc(devinfo, inst);
1757             fprintf(file, "0x%08"PRIx32, imm_desc);
1758          }
1759
1760          pad(file, 80);
1761          if (brw_inst_send_sel_reg32_ex_desc(devinfo, inst)) {
1762             /* show the indirect descriptor source */
1763             err |= src_sends_ia(file, devinfo, BRW_REGISTER_TYPE_UD, 0,
1764                                 brw_inst_send_ex_desc_ia_subreg_nr(devinfo, inst));
1765          } else {
1766             has_imm_ex_desc = true;
1767             imm_ex_desc = brw_inst_sends_ex_desc(devinfo, inst);
1768             fprintf(file, "0x%08"PRIx32, imm_ex_desc);
1769          }
1770       } else {
1771          if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1772             /* show the indirect descriptor source */
1773             pad(file, 48);
1774             err |= src1(file, devinfo, inst);
1775             pad(file, 64);
1776          } else {
1777             has_imm_desc = true;
1778             imm_desc = brw_inst_send_desc(devinfo, inst);
1779             pad(file, 48);
1780          }
1781
1782          /* Print message descriptor as immediate source */
1783          fprintf(file, "0x%08"PRIx64, inst->data[1] >> 32);
1784       }
1785
1786       newline(file);
1787       pad(file, 16);
1788       space = 0;
1789
1790       fprintf(file, "            ");
1791       err |= control(file, "SFID", devinfo->gen >= 6 ? gen6_sfid : gen4_sfid,
1792                      sfid, &space);
1793       string(file, " MsgDesc:");
1794
1795       if (!has_imm_desc) {
1796          format(file, " indirect");
1797       } else {
1798          switch (sfid) {
1799          case BRW_SFID_MATH:
1800             err |= control(file, "math function", math_function,
1801                            brw_inst_math_msg_function(devinfo, inst), &space);
1802             err |= control(file, "math saturate", math_saturate,
1803                            brw_inst_math_msg_saturate(devinfo, inst), &space);
1804             err |= control(file, "math signed", math_signed,
1805                            brw_inst_math_msg_signed_int(devinfo, inst), &space);
1806             err |= control(file, "math scalar", math_scalar,
1807                            brw_inst_math_msg_data_type(devinfo, inst), &space);
1808             err |= control(file, "math precision", math_precision,
1809                            brw_inst_math_msg_precision(devinfo, inst), &space);
1810             break;
1811          case BRW_SFID_SAMPLER:
1812             if (devinfo->gen >= 5) {
1813                err |= control(file, "sampler message", gen5_sampler_msg_type,
1814                               brw_sampler_desc_msg_type(devinfo, imm_desc),
1815                               &space);
1816                err |= control(file, "sampler simd mode", gen5_sampler_simd_mode,
1817                               brw_sampler_desc_simd_mode(devinfo, imm_desc),
1818                               &space);
1819                format(file, " Surface = %u Sampler = %u",
1820                       brw_sampler_desc_binding_table_index(devinfo, imm_desc),
1821                       brw_sampler_desc_sampler(devinfo, imm_desc));
1822             } else {
1823                format(file, " (%u, %u, %u, ",
1824                       brw_sampler_desc_binding_table_index(devinfo, imm_desc),
1825                       brw_sampler_desc_sampler(devinfo, imm_desc),
1826                       brw_sampler_desc_msg_type(devinfo, imm_desc));
1827                if (!devinfo->is_g4x) {
1828                   err |= control(file, "sampler target format",
1829                                  sampler_target_format,
1830                                  brw_sampler_desc_return_format(devinfo, imm_desc),
1831                                  NULL);
1832                }
1833                string(file, ")");
1834             }
1835             break;
1836          case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1837          case GEN6_SFID_DATAPORT_CONSTANT_CACHE:
1838             /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1839             if (devinfo->gen >= 6) {
1840                format(file, " (%u, %u, %u, %u)",
1841                       brw_dp_desc_binding_table_index(devinfo, imm_desc),
1842                       brw_dp_desc_msg_control(devinfo, imm_desc),
1843                       brw_dp_desc_msg_type(devinfo, imm_desc),
1844                       devinfo->gen >= 7 ? 0u :
1845                       brw_dp_write_desc_write_commit(devinfo, imm_desc));
1846             } else {
1847                bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x;
1848                err |= control(file, "DP read message type",
1849                               is_965 ? gen4_dp_read_port_msg_type :
1850                                        g45_dp_read_port_msg_type,
1851                               brw_dp_read_desc_msg_type(devinfo, imm_desc),
1852                               &space);
1853
1854                format(file, " MsgCtrl = 0x%u",
1855                       brw_dp_read_desc_msg_control(devinfo, imm_desc));
1856
1857                format(file, " Surface = %u",
1858                       brw_dp_desc_binding_table_index(devinfo, imm_desc));
1859             }
1860             break;
1861
1862          case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1863             /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1864             unsigned msg_type = brw_dp_write_desc_msg_type(devinfo, imm_desc);
1865
1866             err |= control(file, "DP rc message type",
1867                            dp_rc_msg_type(devinfo), msg_type, &space);
1868
1869             bool is_rt_write = msg_type ==
1870                (devinfo->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1871                                   : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1872
1873             if (is_rt_write) {
1874                err |= control(file, "RT message type", m_rt_write_subtype,
1875                               brw_inst_rt_message_type(devinfo, inst), &space);
1876                if (devinfo->gen >= 6 && brw_inst_rt_slot_group(devinfo, inst))
1877                   string(file, " Hi");
1878                if (brw_dp_write_desc_last_render_target(devinfo, imm_desc))
1879                   string(file, " LastRT");
1880                if (devinfo->gen < 7 &&
1881                    brw_dp_write_desc_write_commit(devinfo, imm_desc))
1882                   string(file, " WriteCommit");
1883             } else {
1884                format(file, " MsgCtrl = 0x%u",
1885                       brw_dp_write_desc_msg_control(devinfo, imm_desc));
1886             }
1887
1888             format(file, " Surface = %u",
1889                    brw_dp_desc_binding_table_index(devinfo, imm_desc));
1890             break;
1891          }
1892
1893          case BRW_SFID_URB: {
1894             unsigned opcode = brw_inst_urb_opcode(devinfo, inst);
1895
1896             format(file, " %"PRIu64, brw_inst_urb_global_offset(devinfo, inst));
1897
1898             space = 1;
1899
1900             err |= control(file, "urb opcode",
1901                            devinfo->gen >= 7 ? gen7_urb_opcode
1902                                              : gen5_urb_opcode,
1903                            opcode, &space);
1904
1905             if (devinfo->gen >= 7 &&
1906                 brw_inst_urb_per_slot_offset(devinfo, inst)) {
1907                string(file, " per-slot");
1908             }
1909
1910             if (opcode == GEN8_URB_OPCODE_SIMD8_WRITE ||
1911                 opcode == GEN8_URB_OPCODE_SIMD8_READ) {
1912                if (brw_inst_urb_channel_mask_present(devinfo, inst))
1913                   string(file, " masked");
1914             } else {
1915                err |= control(file, "urb swizzle", urb_swizzle,
1916                               brw_inst_urb_swizzle_control(devinfo, inst),
1917                               &space);
1918             }
1919
1920             if (devinfo->gen < 7) {
1921                err |= control(file, "urb allocate", urb_allocate,
1922                               brw_inst_urb_allocate(devinfo, inst), &space);
1923                err |= control(file, "urb used", urb_used,
1924                               brw_inst_urb_used(devinfo, inst), &space);
1925             }
1926             if (devinfo->gen < 8) {
1927                err |= control(file, "urb complete", urb_complete,
1928                               brw_inst_urb_complete(devinfo, inst), &space);
1929             }
1930             break;
1931          }
1932          case BRW_SFID_THREAD_SPAWNER:
1933             break;
1934
1935          case BRW_SFID_MESSAGE_GATEWAY:
1936             format(file, " (%s)",
1937                    gen7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]);
1938             break;
1939
1940          case GEN7_SFID_DATAPORT_DATA_CACHE:
1941             if (devinfo->gen >= 7) {
1942                format(file, " (");
1943
1944                err |= control(file, "DP DC0 message type",
1945                               dp_dc0_msg_type_gen7,
1946                               brw_dp_desc_msg_type(devinfo, imm_desc), &space);
1947
1948                format(file, ", %u, ",
1949                       brw_dp_desc_binding_table_index(devinfo, imm_desc));
1950
1951                switch (brw_inst_dp_msg_type(devinfo, inst)) {
1952                case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1953                   control(file, "atomic op", aop,
1954                           brw_dp_desc_msg_control(devinfo, imm_desc) & 0xf,
1955                           &space);
1956                   break;
1957                default:
1958                   format(file, "%u",
1959                          brw_dp_desc_msg_control(devinfo, imm_desc));
1960                }
1961                format(file, ")");
1962                break;
1963             }
1964             /* FALLTHROUGH */
1965
1966          case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1967             if (devinfo->gen >= 7) {
1968                format(file, " (");
1969
1970                unsigned msg_ctrl = brw_dp_desc_msg_control(devinfo, imm_desc);
1971
1972                err |= control(file, "DP DC1 message type",
1973                               dp_dc1_msg_type_hsw,
1974                               brw_dp_desc_msg_type(devinfo, imm_desc), &space);
1975
1976                format(file, ", Surface = %u, ",
1977                       brw_dp_desc_binding_table_index(devinfo, imm_desc));
1978
1979                switch (brw_inst_dp_msg_type(devinfo, inst)) {
1980                case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1981                case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1982                case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1983                   format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1984                   /* fallthrough */
1985                case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1986                case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1987                case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1988                case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP:
1989                   control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1990                   break;
1991                case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1992                case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1993                case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1994                case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE:
1995                case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE:
1996                case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ: {
1997                   static const char *simd_modes[] = { "4x2", "16", "8" };
1998                   format(file, "SIMD%s, Mask = 0x%x",
1999                          simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
2000                   break;
2001                }
2002                case GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP:
2003                case GEN9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP:
2004                   format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
2005                   control(file, "atomic float op", aop_float, msg_ctrl & 0xf,
2006                           &space);
2007                   break;
2008                default:
2009                   format(file, "0x%x", msg_ctrl);
2010                }
2011                format(file, ")");
2012                break;
2013             }
2014             /* FALLTHROUGH */
2015          }
2016
2017          case GEN7_SFID_PIXEL_INTERPOLATOR:
2018             if (devinfo->gen >= 7) {
2019                format(file, " (%s, %s, 0x%02"PRIx64")",
2020                       brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp",
2021                       pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)],
2022                       brw_inst_pi_message_data(devinfo, inst));
2023                break;
2024             }
2025             /* FALLTHROUGH */
2026
2027          default:
2028             format(file, "unsupported shared function ID %d", sfid);
2029             break;
2030          }
2031
2032          if (space)
2033             string(file, " ");
2034       }
2035       if (has_imm_desc)
2036          format(file, "mlen %u", brw_message_desc_mlen(devinfo, imm_desc));
2037       if (has_imm_ex_desc) {
2038          format(file, " ex_mlen %u",
2039                 brw_message_ex_desc_ex_mlen(devinfo, imm_ex_desc));
2040       }
2041       if (has_imm_desc)
2042          format(file, " rlen %u", brw_message_desc_rlen(devinfo, imm_desc));
2043    }
2044    pad(file, 64);
2045    if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
2046       string(file, "{");
2047       space = 1;
2048       err |= control(file, "access mode", access_mode,
2049                      brw_inst_access_mode(devinfo, inst), &space);
2050       if (devinfo->gen >= 6) {
2051          err |= control(file, "write enable control", wectrl,
2052                         brw_inst_mask_control(devinfo, inst), &space);
2053       } else {
2054          err |= control(file, "mask control", mask_ctrl,
2055                         brw_inst_mask_control(devinfo, inst), &space);
2056       }
2057
2058       if (devinfo->gen < 12) {
2059          err |= control(file, "dependency control", dep_ctrl,
2060                         ((brw_inst_no_dd_check(devinfo, inst) << 1) |
2061                          brw_inst_no_dd_clear(devinfo, inst)), &space);
2062       }
2063
2064       if (devinfo->gen >= 6)
2065          err |= qtr_ctrl(file, devinfo, inst);
2066       else {
2067          if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED &&
2068              desc && desc->ndst > 0 &&
2069              brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE &&
2070              brw_inst_dst_da_reg_nr(devinfo, inst) & BRW_MRF_COMPR4) {
2071             format(file, " compr4");
2072          } else {
2073             err |= control(file, "compression control", compr_ctrl,
2074                            brw_inst_qtr_control(devinfo, inst), &space);
2075          }
2076       }
2077
2078       if (devinfo->gen >= 12)
2079          err |= swsb(file, devinfo, inst);
2080
2081       err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
2082       err |= control(file, "thread control", thread_ctrl,
2083                      (devinfo->gen >= 12 ? brw_inst_atomic_control(devinfo, inst) :
2084                                            brw_inst_thread_control(devinfo, inst)),
2085                      &space);
2086       if (has_branch_ctrl(devinfo, opcode)) {
2087          err |= control(file, "branch ctrl", branch_ctrl,
2088                         brw_inst_branch_control(devinfo, inst), &space);
2089       } else if (devinfo->gen >= 6) {
2090          err |= control(file, "acc write control", accwr,
2091                         brw_inst_acc_wr_control(devinfo, inst), &space);
2092       }
2093       if (is_send(opcode))
2094          err |= control(file, "end of thread", end_of_thread,
2095                         brw_inst_eot(devinfo, inst), &space);
2096       if (space)
2097          string(file, " ");
2098       string(file, "}");
2099    }
2100    string(file, ";");
2101    newline(file);
2102    return err;
2103 }