2 * Copyright © 2008 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
27 #include "brw_eu_defines.h"
29 #include "brw_shader.h"
35 has_jip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
40 return opcode
== BRW_OPCODE_IF
||
41 opcode
== BRW_OPCODE_ELSE
||
42 opcode
== BRW_OPCODE_ENDIF
||
43 opcode
== BRW_OPCODE_WHILE
||
44 opcode
== BRW_OPCODE_BREAK
||
45 opcode
== BRW_OPCODE_CONTINUE
||
46 opcode
== BRW_OPCODE_HALT
;
50 has_uip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
55 return (devinfo
->gen
>= 7 && opcode
== BRW_OPCODE_IF
) ||
56 (devinfo
->gen
>= 8 && opcode
== BRW_OPCODE_ELSE
) ||
57 opcode
== BRW_OPCODE_BREAK
||
58 opcode
== BRW_OPCODE_CONTINUE
||
59 opcode
== BRW_OPCODE_HALT
;
63 has_branch_ctrl(const struct gen_device_info
*devinfo
, enum opcode opcode
)
68 return opcode
== BRW_OPCODE_IF
||
69 opcode
== BRW_OPCODE_ELSE
;
70 /* opcode == BRW_OPCODE_GOTO; */
74 is_logic_instruction(unsigned opcode
)
76 return opcode
== BRW_OPCODE_AND
||
77 opcode
== BRW_OPCODE_NOT
||
78 opcode
== BRW_OPCODE_OR
||
79 opcode
== BRW_OPCODE_XOR
;
82 const char *const conditional_modifier
[16] = {
83 [BRW_CONDITIONAL_NONE
] = "",
84 [BRW_CONDITIONAL_Z
] = ".z",
85 [BRW_CONDITIONAL_NZ
] = ".nz",
86 [BRW_CONDITIONAL_G
] = ".g",
87 [BRW_CONDITIONAL_GE
] = ".ge",
88 [BRW_CONDITIONAL_L
] = ".l",
89 [BRW_CONDITIONAL_LE
] = ".le",
90 [BRW_CONDITIONAL_R
] = ".r",
91 [BRW_CONDITIONAL_O
] = ".o",
92 [BRW_CONDITIONAL_U
] = ".u",
95 static const char *const m_negate
[2] = {
100 static const char *const _abs
[2] = {
105 static const char *const m_bitnot
[2] = { "", "~" };
107 static const char *const vert_stride
[16] = {
118 static const char *const width
[8] = {
126 static const char *const horiz_stride
[4] = {
133 static const char *const chan_sel
[4] = {
140 static const char *const debug_ctrl
[2] = {
145 static const char *const saturate
[2] = {
150 static const char *const cmpt_ctrl
[2] = {
155 static const char *const accwr
[2] = {
160 static const char *const branch_ctrl
[2] = {
165 static const char *const wectrl
[2] = {
170 static const char *const exec_size
[8] = {
179 static const char *const pred_inv
[2] = {
184 const char *const pred_ctrl_align16
[16] = {
194 static const char *const pred_ctrl_align1
[16] = {
195 [BRW_PREDICATE_NORMAL
] = "",
196 [BRW_PREDICATE_ALIGN1_ANYV
] = ".anyv",
197 [BRW_PREDICATE_ALIGN1_ALLV
] = ".allv",
198 [BRW_PREDICATE_ALIGN1_ANY2H
] = ".any2h",
199 [BRW_PREDICATE_ALIGN1_ALL2H
] = ".all2h",
200 [BRW_PREDICATE_ALIGN1_ANY4H
] = ".any4h",
201 [BRW_PREDICATE_ALIGN1_ALL4H
] = ".all4h",
202 [BRW_PREDICATE_ALIGN1_ANY8H
] = ".any8h",
203 [BRW_PREDICATE_ALIGN1_ALL8H
] = ".all8h",
204 [BRW_PREDICATE_ALIGN1_ANY16H
] = ".any16h",
205 [BRW_PREDICATE_ALIGN1_ALL16H
] = ".all16h",
206 [BRW_PREDICATE_ALIGN1_ANY32H
] = ".any32h",
207 [BRW_PREDICATE_ALIGN1_ALL32H
] = ".all32h",
210 static const char *const thread_ctrl
[4] = {
211 [BRW_THREAD_NORMAL
] = "",
212 [BRW_THREAD_ATOMIC
] = "atomic",
213 [BRW_THREAD_SWITCH
] = "switch",
216 static const char *const compr_ctrl
[4] = {
223 static const char *const dep_ctrl
[4] = {
227 [3] = "NoDDClr,NoDDChk",
230 static const char *const mask_ctrl
[4] = {
235 static const char *const access_mode
[2] = {
240 static const char * const reg_encoding
[] = {
241 [BRW_HW_REG_TYPE_UD
] = "UD",
242 [BRW_HW_REG_TYPE_D
] = "D",
243 [BRW_HW_REG_TYPE_UW
] = "UW",
244 [BRW_HW_REG_TYPE_W
] = "W",
245 [BRW_HW_REG_TYPE_F
] = "F",
246 [GEN8_HW_REG_TYPE_UQ
] = "UQ",
247 [GEN8_HW_REG_TYPE_Q
] = "Q",
249 [BRW_HW_REG_TYPE_UB
] = "UB",
250 [BRW_HW_REG_TYPE_B
] = "B",
251 [GEN7_HW_REG_TYPE_DF
] = "DF",
252 [GEN8_HW_REG_TYPE_HF
] = "HF",
255 static const char *const three_source_reg_encoding
[] = {
256 [BRW_3SRC_TYPE_F
] = "F",
257 [BRW_3SRC_TYPE_D
] = "D",
258 [BRW_3SRC_TYPE_UD
] = "UD",
259 [BRW_3SRC_TYPE_DF
] = "DF",
262 static const char *const reg_file
[4] = {
269 static const char *const writemask
[16] = {
288 static const char *const end_of_thread
[2] = {
293 /* SFIDs on Gen4-5 */
294 static const char *const gen4_sfid
[16] = {
295 [BRW_SFID_NULL
] = "null",
296 [BRW_SFID_MATH
] = "math",
297 [BRW_SFID_SAMPLER
] = "sampler",
298 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
299 [BRW_SFID_DATAPORT_READ
] = "read",
300 [BRW_SFID_DATAPORT_WRITE
] = "write",
301 [BRW_SFID_URB
] = "urb",
302 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
303 [BRW_SFID_VME
] = "vme",
306 static const char *const gen6_sfid
[16] = {
307 [BRW_SFID_NULL
] = "null",
308 [BRW_SFID_MATH
] = "math",
309 [BRW_SFID_SAMPLER
] = "sampler",
310 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
311 [BRW_SFID_URB
] = "urb",
312 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
313 [GEN6_SFID_DATAPORT_SAMPLER_CACHE
] = "sampler",
314 [GEN6_SFID_DATAPORT_RENDER_CACHE
] = "render",
315 [GEN6_SFID_DATAPORT_CONSTANT_CACHE
] = "const",
316 [GEN7_SFID_DATAPORT_DATA_CACHE
] = "data",
317 [GEN7_SFID_PIXEL_INTERPOLATOR
] = "pixel interp",
318 [HSW_SFID_DATAPORT_DATA_CACHE_1
] = "dp data 1",
319 [HSW_SFID_CRE
] = "cre",
322 static const char *const gen7_gateway_subfuncid
[8] = {
323 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY
] = "open",
324 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY
] = "close",
325 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG
] = "forward msg",
326 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP
] = "get timestamp",
327 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG
] = "barrier msg",
328 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE
] = "update state",
329 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE
] = "mmio read/write",
332 static const char *const gen4_dp_read_port_msg_type
[4] = {
333 [0b00] = "OWord Block Read",
334 [0b01] = "OWord Dual Block Read",
335 [0b10] = "Media Block Read",
336 [0b11] = "DWord Scattered Read",
339 static const char *const g45_dp_read_port_msg_type
[8] = {
340 [0b000] = "OWord Block Read",
341 [0b010] = "OWord Dual Block Read",
342 [0b100] = "Media Block Read",
343 [0b110] = "DWord Scattered Read",
344 [0b001] = "Render Target UNORM Read",
345 [0b011] = "AVC Loop Filter Read",
348 static const char *const dp_write_port_msg_type
[8] = {
349 [0b000] = "OWord block write",
350 [0b001] = "OWord dual block write",
351 [0b010] = "media block write",
352 [0b011] = "DWord scattered write",
353 [0b100] = "RT write",
354 [0b101] = "streamed VB write",
355 [0b110] = "RT UNORM write", /* G45+ */
356 [0b111] = "flush render cache",
359 static const char *const dp_rc_msg_type_gen6
[16] = {
360 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ
] = "OWORD block read",
361 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ
] = "RT UNORM read",
362 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ
] = "OWORD dual block read",
363 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ
] = "media block read",
364 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ
] =
365 "OWORD unaligned block read",
366 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ
] = "DWORD scattered read",
367 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE
] = "DWORD atomic write",
368 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE
] = "OWORD block write",
369 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE
] =
370 "OWORD dual block write",
371 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE
] = "media block write",
372 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE
] =
373 "DWORD scattered write",
374 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
] = "RT write",
375 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE
] = "streamed VB write",
376 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE
] = "RT UNORM write",
379 static const char *const dp_rc_msg_type_gen7
[16] = {
380 [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ
] = "media block read",
381 [GEN7_DATAPORT_RC_TYPED_SURFACE_READ
] = "typed surface read",
382 [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP
] = "typed atomic op",
383 [GEN7_DATAPORT_RC_MEMORY_FENCE
] = "memory fence",
384 [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE
] = "media block write",
385 [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
386 [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE
] = "typed surface write"
389 static const char *const dp_rc_msg_type_gen9
[16] = {
390 [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
391 [GEN9_DATAPORT_RC_RENDER_TARGET_READ
] = "RT read"
394 static const char *const *
395 dp_rc_msg_type(const struct gen_device_info
*devinfo
)
397 return (devinfo
->gen
>= 9 ? dp_rc_msg_type_gen9
:
398 devinfo
->gen
>= 7 ? dp_rc_msg_type_gen7
:
399 devinfo
->gen
>= 6 ? dp_rc_msg_type_gen6
:
400 dp_write_port_msg_type
);
403 static const char *const m_rt_write_subtype
[] = {
405 [0b001] = "SIMD16/RepData",
406 [0b010] = "SIMD8/DualSrcLow",
407 [0b011] = "SIMD8/DualSrcHigh",
409 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
410 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
413 static const char *const dp_dc0_msg_type_gen7
[16] = {
414 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ
] = "DC OWORD block read",
415 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ
] =
416 "DC unaligned OWORD block read",
417 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ
] = "DC OWORD dual block read",
418 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ
] = "DC DWORD scattered read",
419 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ
] = "DC byte scattered read",
420 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ
] = "DC untyped surface read",
421 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
] = "DC untyped atomic",
422 [GEN7_DATAPORT_DC_MEMORY_FENCE
] = "DC mfence",
423 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE
] = "DC OWORD block write",
424 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE
] = "DC OWORD dual block write",
425 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE
] = "DC DWORD scatterd write",
426 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE
] = "DC byte scattered write",
427 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
430 static const char *const dp_dc1_msg_type_hsw
[16] = {
431 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
] = "untyped surface read",
432 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
] = "DC untyped atomic op",
433 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
] =
434 "DC untyped 4x2 atomic op",
435 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ
] = "DC media block read",
436 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
] = "DC typed surface read",
437 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
] = "DC typed atomic",
438 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
] = "DC typed 4x2 atomic op",
439 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
440 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE
] = "DC media block write",
441 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
] = "DC atomic counter op",
442 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
] =
443 "DC 4x2 atomic counter op",
444 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
] = "DC typed surface write",
447 static const char *const aop
[16] = {
448 [BRW_AOP_AND
] = "and",
450 [BRW_AOP_XOR
] = "xor",
451 [BRW_AOP_MOV
] = "mov",
452 [BRW_AOP_INC
] = "inc",
453 [BRW_AOP_DEC
] = "dec",
454 [BRW_AOP_ADD
] = "add",
455 [BRW_AOP_SUB
] = "sub",
456 [BRW_AOP_REVSUB
] = "revsub",
457 [BRW_AOP_IMAX
] = "imax",
458 [BRW_AOP_IMIN
] = "imin",
459 [BRW_AOP_UMAX
] = "umax",
460 [BRW_AOP_UMIN
] = "umin",
461 [BRW_AOP_CMPWR
] = "cmpwr",
462 [BRW_AOP_PREDEC
] = "predec",
465 static const char * const pixel_interpolator_msg_types
[4] = {
466 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET
] = "per_message_offset",
467 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE
] = "sample_position",
468 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID
] = "centroid",
469 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET
] = "per_slot_offset",
472 static const char *const math_function
[16] = {
473 [BRW_MATH_FUNCTION_INV
] = "inv",
474 [BRW_MATH_FUNCTION_LOG
] = "log",
475 [BRW_MATH_FUNCTION_EXP
] = "exp",
476 [BRW_MATH_FUNCTION_SQRT
] = "sqrt",
477 [BRW_MATH_FUNCTION_RSQ
] = "rsq",
478 [BRW_MATH_FUNCTION_SIN
] = "sin",
479 [BRW_MATH_FUNCTION_COS
] = "cos",
480 [BRW_MATH_FUNCTION_SINCOS
] = "sincos",
481 [BRW_MATH_FUNCTION_FDIV
] = "fdiv",
482 [BRW_MATH_FUNCTION_POW
] = "pow",
483 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER
] = "intdivmod",
484 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
] = "intdiv",
485 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER
] = "intmod",
486 [GEN8_MATH_FUNCTION_INVM
] = "invm",
487 [GEN8_MATH_FUNCTION_RSQRTM
] = "rsqrtm",
490 static const char *const math_saturate
[2] = {
495 static const char *const math_signed
[2] = {
500 static const char *const math_scalar
[2] = {
505 static const char *const math_precision
[2] = {
507 [1] = "partial_precision"
510 static const char *const gen5_urb_opcode
[] = {
515 static const char *const gen7_urb_opcode
[] = {
516 [BRW_URB_OPCODE_WRITE_HWORD
] = "write HWord",
517 [BRW_URB_OPCODE_WRITE_OWORD
] = "write OWord",
518 [BRW_URB_OPCODE_READ_HWORD
] = "read HWord",
519 [BRW_URB_OPCODE_READ_OWORD
] = "read OWord",
520 [GEN7_URB_OPCODE_ATOMIC_MOV
] = "atomic mov", /* Gen7+ */
521 [GEN7_URB_OPCODE_ATOMIC_INC
] = "atomic inc", /* Gen7+ */
522 [GEN8_URB_OPCODE_ATOMIC_ADD
] = "atomic add", /* Gen8+ */
523 [GEN8_URB_OPCODE_SIMD8_WRITE
] = "SIMD8 write", /* Gen8+ */
524 [GEN8_URB_OPCODE_SIMD8_READ
] = "SIMD8 read", /* Gen8+ */
525 /* [9-15] - reserved */
528 static const char *const urb_swizzle
[4] = {
529 [BRW_URB_SWIZZLE_NONE
] = "",
530 [BRW_URB_SWIZZLE_INTERLEAVE
] = "interleave",
531 [BRW_URB_SWIZZLE_TRANSPOSE
] = "transpose",
534 static const char *const urb_allocate
[2] = {
539 static const char *const urb_used
[2] = {
544 static const char *const urb_complete
[2] = {
549 static const char *const gen5_sampler_msg_type
[] = {
550 [GEN5_SAMPLER_MESSAGE_SAMPLE
] = "sample",
551 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS
] = "sample_b",
552 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD
] = "sample_l",
553 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE
] = "sample_c",
554 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS
] = "sample_d",
555 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE
] = "sample_b_c",
556 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE
] = "sample_l_c",
557 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD
] = "ld",
558 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4
] = "gather4",
559 [GEN5_SAMPLER_MESSAGE_LOD
] = "lod",
560 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO
] = "resinfo",
561 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO
] = "sampleinfo",
562 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C
] = "gather4_c",
563 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO
] = "gather4_po",
564 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C
] = "gather4_po_c",
565 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE
] = "sample_d_c",
566 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ
] = "sample_lz",
567 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ
] = "sample_c_lz",
568 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ
] = "ld_lz",
569 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W
] = "ld2dms_w",
570 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS
] = "ld_mcs",
571 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS
] = "ld2dms",
572 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS
] = "ld2dss",
575 static const char *const gen5_sampler_simd_mode
[4] = {
576 [BRW_SAMPLER_SIMD_MODE_SIMD4X2
] = "SIMD4x2",
577 [BRW_SAMPLER_SIMD_MODE_SIMD8
] = "SIMD8",
578 [BRW_SAMPLER_SIMD_MODE_SIMD16
] = "SIMD16",
579 [BRW_SAMPLER_SIMD_MODE_SIMD32_64
] = "SIMD32/64",
582 static const char *const sampler_target_format
[4] = {
592 string(FILE *file
, const char *string
)
595 column
+= strlen(string
);
600 format(FILE *f
, const char *format
, ...) PRINTFLIKE(2, 3);
603 format(FILE *f
, const char *format
, ...)
607 va_start(args
, format
);
609 vsnprintf(buf
, sizeof(buf
) - 1, format
, args
);
633 control(FILE *file
, const char *name
, const char *const ctrl
[],
634 unsigned id
, int *space
)
637 fprintf(file
, "*** invalid %s value %d ", name
, id
);
643 string(file
, ctrl
[id
]);
651 print_opcode(FILE *file
, const struct gen_device_info
*devinfo
,
654 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, id
);
656 format(file
, "*** invalid opcode value %d ", id
);
659 string(file
, desc
->name
);
664 reg(FILE *file
, unsigned _reg_file
, unsigned _reg_nr
)
668 /* Clear the Compr4 instruction compression bit. */
669 if (_reg_file
== BRW_MESSAGE_REGISTER_FILE
)
670 _reg_nr
&= ~BRW_MRF_COMPR4
;
672 if (_reg_file
== BRW_ARCHITECTURE_REGISTER_FILE
) {
673 switch (_reg_nr
& 0xf0) {
675 string(file
, "null");
677 case BRW_ARF_ADDRESS
:
678 format(file
, "a%d", _reg_nr
& 0x0f);
680 case BRW_ARF_ACCUMULATOR
:
681 format(file
, "acc%d", _reg_nr
& 0x0f);
684 format(file
, "f%d", _reg_nr
& 0x0f);
687 format(file
, "mask%d", _reg_nr
& 0x0f);
689 case BRW_ARF_MASK_STACK
:
690 format(file
, "msd%d", _reg_nr
& 0x0f);
693 format(file
, "sr%d", _reg_nr
& 0x0f);
695 case BRW_ARF_CONTROL
:
696 format(file
, "cr%d", _reg_nr
& 0x0f);
698 case BRW_ARF_NOTIFICATION_COUNT
:
699 format(file
, "n%d", _reg_nr
& 0x0f);
706 format(file
, "tdr0");
708 case BRW_ARF_TIMESTAMP
:
709 format(file
, "tm%d", _reg_nr
& 0x0f);
712 format(file
, "ARF%d", _reg_nr
);
716 err
|= control(file
, "src reg file", reg_file
, _reg_file
, NULL
);
717 format(file
, "%d", _reg_nr
);
723 dest(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
725 unsigned elem_size
= brw_element_size(devinfo
, inst
, dst
);
728 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
729 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
730 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
731 brw_inst_dst_da_reg_nr(devinfo
, inst
));
734 if (brw_inst_dst_da1_subreg_nr(devinfo
, inst
))
735 format(file
, ".%"PRIu64
, brw_inst_dst_da1_subreg_nr(devinfo
, inst
) /
738 err
|= control(file
, "horiz stride", horiz_stride
,
739 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
741 err
|= control(file
, "dest reg encoding", reg_encoding
,
742 brw_inst_dst_reg_type(devinfo
, inst
), NULL
);
744 string(file
, "g[a0");
745 if (brw_inst_dst_ia_subreg_nr(devinfo
, inst
))
746 format(file
, ".%"PRIu64
, brw_inst_dst_ia_subreg_nr(devinfo
, inst
) /
748 if (brw_inst_dst_ia1_addr_imm(devinfo
, inst
))
749 format(file
, " %d", brw_inst_dst_ia1_addr_imm(devinfo
, inst
));
751 err
|= control(file
, "horiz stride", horiz_stride
,
752 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
754 err
|= control(file
, "dest reg encoding", reg_encoding
,
755 brw_inst_dst_reg_type(devinfo
, inst
), NULL
);
758 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
759 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
760 brw_inst_dst_da_reg_nr(devinfo
, inst
));
763 if (brw_inst_dst_da16_subreg_nr(devinfo
, inst
))
764 format(file
, ".%u", 16 / elem_size
);
766 err
|= control(file
, "writemask", writemask
,
767 brw_inst_da16_writemask(devinfo
, inst
), NULL
);
768 err
|= control(file
, "dest reg encoding", reg_encoding
,
769 brw_inst_dst_reg_type(devinfo
, inst
), NULL
);
772 string(file
, "Indirect align16 address mode not supported");
780 dest_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
785 if (devinfo
->gen
== 6 && brw_inst_3src_dst_reg_file(devinfo
, inst
))
786 reg_file
= BRW_MESSAGE_REGISTER_FILE
;
788 reg_file
= BRW_GENERAL_REGISTER_FILE
;
790 err
|= reg(file
, reg_file
, brw_inst_3src_dst_reg_nr(devinfo
, inst
));
793 if (brw_inst_3src_dst_subreg_nr(devinfo
, inst
))
794 format(file
, ".%"PRIu64
, brw_inst_3src_dst_subreg_nr(devinfo
, inst
));
796 err
|= control(file
, "writemask", writemask
,
797 brw_inst_3src_dst_writemask(devinfo
, inst
), NULL
);
798 err
|= control(file
, "dest reg encoding", three_source_reg_encoding
,
799 brw_inst_3src_dst_type(devinfo
, inst
), NULL
);
805 src_align1_region(FILE *file
,
806 unsigned _vert_stride
, unsigned _width
,
807 unsigned _horiz_stride
)
811 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
813 err
|= control(file
, "width", width
, _width
, NULL
);
815 err
|= control(file
, "horiz_stride", horiz_stride
, _horiz_stride
, NULL
);
822 const struct gen_device_info
*devinfo
,
824 unsigned type
, unsigned _reg_file
,
825 unsigned _vert_stride
, unsigned _width
, unsigned _horiz_stride
,
826 unsigned reg_num
, unsigned sub_reg_num
, unsigned __abs
,
831 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
832 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
834 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
836 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
838 err
|= reg(file
, _reg_file
, reg_num
);
842 unsigned elem_size
= brw_hw_reg_type_to_size(devinfo
, type
, _reg_file
);
843 format(file
, ".%d", sub_reg_num
/ elem_size
); /* use formal style like spec */
845 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
846 err
|= control(file
, "src reg encoding", reg_encoding
, type
, NULL
);
852 const struct gen_device_info
*devinfo
,
857 unsigned _addr_subreg_nr
,
860 unsigned _horiz_stride
, unsigned _width
, unsigned _vert_stride
)
864 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
865 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
867 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
869 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
871 string(file
, "g[a0");
873 format(file
, ".%d", _addr_subreg_nr
);
875 format(file
, " %d", _addr_imm
);
877 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
878 err
|= control(file
, "src reg encoding", reg_encoding
, type
, NULL
);
883 src_swizzle(FILE *file
, unsigned swiz
)
885 unsigned x
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_X
);
886 unsigned y
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Y
);
887 unsigned z
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Z
);
888 unsigned w
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_W
);
891 if (x
== y
&& x
== z
&& x
== w
) {
893 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
894 } else if (swiz
!= BRW_SWIZZLE_XYZW
) {
896 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
897 err
|= control(file
, "channel select", chan_sel
, y
, NULL
);
898 err
|= control(file
, "channel select", chan_sel
, z
, NULL
);
899 err
|= control(file
, "channel select", chan_sel
, w
, NULL
);
906 const struct gen_device_info
*devinfo
,
910 unsigned _vert_stride
,
915 unsigned swz_x
, unsigned swz_y
, unsigned swz_z
, unsigned swz_w
)
919 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
920 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
922 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
924 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
926 err
|= reg(file
, _reg_file
, _reg_nr
);
931 brw_hw_reg_type_to_size(devinfo
, _reg_type
, _reg_file
);
933 /* bit4 for subreg number byte addressing. Make this same meaning as
934 in da1 case, so output looks consistent. */
935 format(file
, ".%d", 16 / elem_size
);
938 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
940 err
|= src_swizzle(file
, BRW_SWIZZLE4(swz_x
, swz_y
, swz_z
, swz_w
));
941 err
|= control(file
, "src da16 reg type", reg_encoding
, _reg_type
, NULL
);
946 src0_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
949 unsigned src0_subreg_nr
= brw_inst_3src_src0_subreg_nr(devinfo
, inst
);
951 err
|= control(file
, "negate", m_negate
,
952 brw_inst_3src_src0_negate(devinfo
, inst
), NULL
);
953 err
|= control(file
, "abs", _abs
, brw_inst_3src_src0_abs(devinfo
, inst
), NULL
);
955 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
956 brw_inst_3src_src0_reg_nr(devinfo
, inst
));
959 if (src0_subreg_nr
|| brw_inst_3src_src0_rep_ctrl(devinfo
, inst
))
960 format(file
, ".%d", src0_subreg_nr
);
961 if (brw_inst_3src_src0_rep_ctrl(devinfo
, inst
))
962 string(file
, "<0,1,0>");
964 string(file
, "<4,4,1>");
965 err
|= src_swizzle(file
, brw_inst_3src_src0_swizzle(devinfo
, inst
));
967 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
968 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
973 src1_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
976 unsigned src1_subreg_nr
= brw_inst_3src_src1_subreg_nr(devinfo
, inst
);
978 err
|= control(file
, "negate", m_negate
,
979 brw_inst_3src_src1_negate(devinfo
, inst
), NULL
);
980 err
|= control(file
, "abs", _abs
, brw_inst_3src_src1_abs(devinfo
, inst
), NULL
);
982 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
983 brw_inst_3src_src1_reg_nr(devinfo
, inst
));
986 if (src1_subreg_nr
|| brw_inst_3src_src1_rep_ctrl(devinfo
, inst
))
987 format(file
, ".%d", src1_subreg_nr
);
988 if (brw_inst_3src_src1_rep_ctrl(devinfo
, inst
))
989 string(file
, "<0,1,0>");
991 string(file
, "<4,4,1>");
992 err
|= src_swizzle(file
, brw_inst_3src_src1_swizzle(devinfo
, inst
));
994 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
995 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
1001 src2_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1004 unsigned src2_subreg_nr
= brw_inst_3src_src2_subreg_nr(devinfo
, inst
);
1006 err
|= control(file
, "negate", m_negate
,
1007 brw_inst_3src_src2_negate(devinfo
, inst
), NULL
);
1008 err
|= control(file
, "abs", _abs
, brw_inst_3src_src2_abs(devinfo
, inst
), NULL
);
1010 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
1011 brw_inst_3src_src2_reg_nr(devinfo
, inst
));
1014 if (src2_subreg_nr
|| brw_inst_3src_src2_rep_ctrl(devinfo
, inst
))
1015 format(file
, ".%d", src2_subreg_nr
);
1016 if (brw_inst_3src_src2_rep_ctrl(devinfo
, inst
))
1017 string(file
, "<0,1,0>");
1019 string(file
, "<4,4,1>");
1020 err
|= src_swizzle(file
, brw_inst_3src_src2_swizzle(devinfo
, inst
));
1022 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
1023 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
1028 imm(FILE *file
, const struct gen_device_info
*devinfo
, enum hw_imm_type type
,
1029 const brw_inst
*inst
)
1032 case GEN8_HW_IMM_TYPE_UQ
:
1033 format(file
, "0x%16lxUD", brw_inst_imm_uq(devinfo
, inst
));
1035 case GEN8_HW_IMM_TYPE_Q
:
1036 format(file
, "%ldD", brw_inst_imm_uq(devinfo
, inst
));
1038 case BRW_HW_IMM_TYPE_UD
:
1039 format(file
, "0x%08xUD", brw_inst_imm_ud(devinfo
, inst
));
1041 case BRW_HW_IMM_TYPE_D
:
1042 format(file
, "%dD", brw_inst_imm_d(devinfo
, inst
));
1044 case BRW_HW_IMM_TYPE_UW
:
1045 format(file
, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo
, inst
));
1047 case BRW_HW_IMM_TYPE_W
:
1048 format(file
, "%dW", (int16_t) brw_inst_imm_d(devinfo
, inst
));
1050 case BRW_HW_IMM_TYPE_UV
:
1051 format(file
, "0x%08xUV", brw_inst_imm_ud(devinfo
, inst
));
1053 case BRW_HW_IMM_TYPE_VF
:
1054 format(file
, "[%-gF, %-gF, %-gF, %-gF]VF",
1055 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
)),
1056 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 8),
1057 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 16),
1058 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 24));
1060 case BRW_HW_IMM_TYPE_V
:
1061 format(file
, "0x%08xV", brw_inst_imm_ud(devinfo
, inst
));
1063 case BRW_HW_IMM_TYPE_F
:
1064 format(file
, "%-gF", brw_inst_imm_f(devinfo
, inst
));
1066 case GEN8_HW_IMM_TYPE_DF
:
1067 format(file
, "%-gDF", brw_inst_imm_df(devinfo
, inst
));
1069 case GEN8_HW_IMM_TYPE_HF
:
1070 string(file
, "Half Float IMM");
1077 src0(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1079 if (brw_inst_src0_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1080 return imm(file
, devinfo
, brw_inst_src0_reg_type(devinfo
, inst
), inst
);
1081 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1082 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1083 return src_da1(file
,
1085 brw_inst_opcode(devinfo
, inst
),
1086 brw_inst_src0_reg_type(devinfo
, inst
),
1087 brw_inst_src0_reg_file(devinfo
, inst
),
1088 brw_inst_src0_vstride(devinfo
, inst
),
1089 brw_inst_src0_width(devinfo
, inst
),
1090 brw_inst_src0_hstride(devinfo
, inst
),
1091 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1092 brw_inst_src0_da1_subreg_nr(devinfo
, inst
),
1093 brw_inst_src0_abs(devinfo
, inst
),
1094 brw_inst_src0_negate(devinfo
, inst
));
1096 return src_ia1(file
,
1098 brw_inst_opcode(devinfo
, inst
),
1099 brw_inst_src0_reg_type(devinfo
, inst
),
1100 brw_inst_src0_reg_file(devinfo
, inst
),
1101 brw_inst_src0_ia1_addr_imm(devinfo
, inst
),
1102 brw_inst_src0_ia_subreg_nr(devinfo
, inst
),
1103 brw_inst_src0_negate(devinfo
, inst
),
1104 brw_inst_src0_abs(devinfo
, inst
),
1105 brw_inst_src0_hstride(devinfo
, inst
),
1106 brw_inst_src0_width(devinfo
, inst
),
1107 brw_inst_src0_vstride(devinfo
, inst
));
1110 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1111 return src_da16(file
,
1113 brw_inst_opcode(devinfo
, inst
),
1114 brw_inst_src0_reg_type(devinfo
, inst
),
1115 brw_inst_src0_reg_file(devinfo
, inst
),
1116 brw_inst_src0_vstride(devinfo
, inst
),
1117 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1118 brw_inst_src0_da16_subreg_nr(devinfo
, inst
),
1119 brw_inst_src0_abs(devinfo
, inst
),
1120 brw_inst_src0_negate(devinfo
, inst
),
1121 brw_inst_src0_da16_swiz_x(devinfo
, inst
),
1122 brw_inst_src0_da16_swiz_y(devinfo
, inst
),
1123 brw_inst_src0_da16_swiz_z(devinfo
, inst
),
1124 brw_inst_src0_da16_swiz_w(devinfo
, inst
));
1126 string(file
, "Indirect align16 address mode not supported");
1133 src1(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1135 if (brw_inst_src1_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1136 return imm(file
, devinfo
, brw_inst_src1_reg_type(devinfo
, inst
), inst
);
1137 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1138 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1139 return src_da1(file
,
1141 brw_inst_opcode(devinfo
, inst
),
1142 brw_inst_src1_reg_type(devinfo
, inst
),
1143 brw_inst_src1_reg_file(devinfo
, inst
),
1144 brw_inst_src1_vstride(devinfo
, inst
),
1145 brw_inst_src1_width(devinfo
, inst
),
1146 brw_inst_src1_hstride(devinfo
, inst
),
1147 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1148 brw_inst_src1_da1_subreg_nr(devinfo
, inst
),
1149 brw_inst_src1_abs(devinfo
, inst
),
1150 brw_inst_src1_negate(devinfo
, inst
));
1152 return src_ia1(file
,
1154 brw_inst_opcode(devinfo
, inst
),
1155 brw_inst_src1_reg_type(devinfo
, inst
),
1156 brw_inst_src1_reg_file(devinfo
, inst
),
1157 brw_inst_src1_ia1_addr_imm(devinfo
, inst
),
1158 brw_inst_src1_ia_subreg_nr(devinfo
, inst
),
1159 brw_inst_src1_negate(devinfo
, inst
),
1160 brw_inst_src1_abs(devinfo
, inst
),
1161 brw_inst_src1_hstride(devinfo
, inst
),
1162 brw_inst_src1_width(devinfo
, inst
),
1163 brw_inst_src1_vstride(devinfo
, inst
));
1166 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1167 return src_da16(file
,
1169 brw_inst_opcode(devinfo
, inst
),
1170 brw_inst_src1_reg_type(devinfo
, inst
),
1171 brw_inst_src1_reg_file(devinfo
, inst
),
1172 brw_inst_src1_vstride(devinfo
, inst
),
1173 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1174 brw_inst_src1_da16_subreg_nr(devinfo
, inst
),
1175 brw_inst_src1_abs(devinfo
, inst
),
1176 brw_inst_src1_negate(devinfo
, inst
),
1177 brw_inst_src1_da16_swiz_x(devinfo
, inst
),
1178 brw_inst_src1_da16_swiz_y(devinfo
, inst
),
1179 brw_inst_src1_da16_swiz_z(devinfo
, inst
),
1180 brw_inst_src1_da16_swiz_w(devinfo
, inst
));
1182 string(file
, "Indirect align16 address mode not supported");
1189 qtr_ctrl(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1191 int qtr_ctl
= brw_inst_qtr_control(devinfo
, inst
);
1192 int exec_size
= 1 << brw_inst_exec_size(devinfo
, inst
);
1193 const unsigned nib_ctl
= devinfo
->gen
< 7 ? 0 :
1194 brw_inst_nib_control(devinfo
, inst
);
1196 if (exec_size
< 8 || nib_ctl
) {
1197 format(file
, " %dN", qtr_ctl
* 2 + nib_ctl
+ 1);
1198 } else if (exec_size
== 8) {
1201 string(file
, " 1Q");
1204 string(file
, " 2Q");
1207 string(file
, " 3Q");
1210 string(file
, " 4Q");
1213 } else if (exec_size
== 16) {
1215 string(file
, " 1H");
1217 string(file
, " 2H");
1223 static __attribute__((__unused__
)) int
1224 brw_disassemble_imm(const struct gen_device_info
*devinfo
,
1225 uint32_t dw3
, uint32_t dw2
, uint32_t dw1
, uint32_t dw0
)
1228 inst
.data
[0] = (((uint64_t) dw1
) << 32) | ((uint64_t) dw0
);
1229 inst
.data
[1] = (((uint64_t) dw3
) << 32) | ((uint64_t) dw2
);
1230 return brw_disassemble_inst(stderr
, devinfo
, &inst
, false);
1235 brw_disassemble_inst(FILE *file
, const struct gen_device_info
*devinfo
,
1236 const brw_inst
*inst
, bool is_compacted
)
1241 const enum opcode opcode
= brw_inst_opcode(devinfo
, inst
);
1242 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, opcode
);
1244 if (brw_inst_pred_control(devinfo
, inst
)) {
1246 err
|= control(file
, "predicate inverse", pred_inv
,
1247 brw_inst_pred_inv(devinfo
, inst
), NULL
);
1248 format(file
, "f%"PRIu64
, devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0);
1249 if (brw_inst_flag_subreg_nr(devinfo
, inst
))
1250 format(file
, ".%"PRIu64
, brw_inst_flag_subreg_nr(devinfo
, inst
));
1251 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1252 err
|= control(file
, "predicate control align1", pred_ctrl_align1
,
1253 brw_inst_pred_control(devinfo
, inst
), NULL
);
1255 err
|= control(file
, "predicate control align16", pred_ctrl_align16
,
1256 brw_inst_pred_control(devinfo
, inst
), NULL
);
1261 err
|= print_opcode(file
, devinfo
, opcode
);
1262 err
|= control(file
, "saturate", saturate
, brw_inst_saturate(devinfo
, inst
),
1265 err
|= control(file
, "debug control", debug_ctrl
,
1266 brw_inst_debug_control(devinfo
, inst
), NULL
);
1268 if (opcode
== BRW_OPCODE_MATH
) {
1270 err
|= control(file
, "function", math_function
,
1271 brw_inst_math_function(devinfo
, inst
), NULL
);
1272 } else if (opcode
!= BRW_OPCODE_SEND
&& opcode
!= BRW_OPCODE_SENDC
) {
1273 err
|= control(file
, "conditional modifier", conditional_modifier
,
1274 brw_inst_cond_modifier(devinfo
, inst
), NULL
);
1276 /* If we're using the conditional modifier, print which flags reg is
1277 * used for it. Note that on gen6+, the embedded-condition SEL and
1278 * control flow doesn't update flags.
1280 if (brw_inst_cond_modifier(devinfo
, inst
) &&
1281 (devinfo
->gen
< 6 || (opcode
!= BRW_OPCODE_SEL
&&
1282 opcode
!= BRW_OPCODE_IF
&&
1283 opcode
!= BRW_OPCODE_WHILE
))) {
1284 format(file
, ".f%"PRIu64
,
1285 devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0);
1286 if (brw_inst_flag_subreg_nr(devinfo
, inst
))
1287 format(file
, ".%"PRIu64
, brw_inst_flag_subreg_nr(devinfo
, inst
));
1291 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1293 err
|= control(file
, "execution size", exec_size
,
1294 brw_inst_exec_size(devinfo
, inst
), NULL
);
1298 if (opcode
== BRW_OPCODE_SEND
&& devinfo
->gen
< 6)
1299 format(file
, " %"PRIu64
, brw_inst_base_mrf(devinfo
, inst
));
1301 if (has_uip(devinfo
, opcode
)) {
1302 /* Instructions that have UIP also have JIP. */
1304 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1306 format(file
, "UIP: %d", brw_inst_uip(devinfo
, inst
));
1307 } else if (has_jip(devinfo
, opcode
)) {
1309 if (devinfo
->gen
>= 7) {
1310 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1312 format(file
, "JIP: %d", brw_inst_gen6_jump_count(devinfo
, inst
));
1314 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_BREAK
||
1315 opcode
== BRW_OPCODE_CONTINUE
||
1316 opcode
== BRW_OPCODE_ELSE
)) {
1318 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1320 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1321 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_IF
||
1322 opcode
== BRW_OPCODE_IFF
||
1323 opcode
== BRW_OPCODE_HALT
)) {
1325 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1326 } else if (devinfo
->gen
< 6 && opcode
== BRW_OPCODE_ENDIF
) {
1328 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1329 } else if (opcode
== BRW_OPCODE_JMPI
) {
1331 err
|= src1(file
, devinfo
, inst
);
1332 } else if (desc
&& desc
->nsrc
== 3) {
1334 err
|= dest_3src(file
, devinfo
, inst
);
1337 err
|= src0_3src(file
, devinfo
, inst
);
1340 err
|= src1_3src(file
, devinfo
, inst
);
1343 err
|= src2_3src(file
, devinfo
, inst
);
1345 if (desc
->ndst
> 0) {
1347 err
|= dest(file
, devinfo
, inst
);
1350 if (desc
->nsrc
> 0) {
1352 err
|= src0(file
, devinfo
, inst
);
1355 if (desc
->nsrc
> 1) {
1357 err
|= src1(file
, devinfo
, inst
);
1361 if (opcode
== BRW_OPCODE_SEND
|| opcode
== BRW_OPCODE_SENDC
) {
1362 enum brw_message_target sfid
= brw_inst_sfid(devinfo
, inst
);
1364 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1365 /* show the indirect descriptor source */
1367 err
|= src1(file
, devinfo
, inst
);
1375 err
|= control(file
, "SFID", devinfo
->gen
>= 6 ? gen6_sfid
: gen4_sfid
,
1379 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1380 format(file
, " indirect");
1384 err
|= control(file
, "math function", math_function
,
1385 brw_inst_math_msg_function(devinfo
, inst
), &space
);
1386 err
|= control(file
, "math saturate", math_saturate
,
1387 brw_inst_math_msg_saturate(devinfo
, inst
), &space
);
1388 err
|= control(file
, "math signed", math_signed
,
1389 brw_inst_math_msg_signed_int(devinfo
, inst
), &space
);
1390 err
|= control(file
, "math scalar", math_scalar
,
1391 brw_inst_math_msg_data_type(devinfo
, inst
), &space
);
1392 err
|= control(file
, "math precision", math_precision
,
1393 brw_inst_math_msg_precision(devinfo
, inst
), &space
);
1395 case BRW_SFID_SAMPLER
:
1396 if (devinfo
->gen
>= 5) {
1397 err
|= control(file
, "sampler message", gen5_sampler_msg_type
,
1398 brw_inst_sampler_msg_type(devinfo
, inst
), &space
);
1399 err
|= control(file
, "sampler simd mode", gen5_sampler_simd_mode
,
1400 brw_inst_sampler_simd_mode(devinfo
, inst
), &space
);
1401 format(file
, " Surface = %"PRIu64
" Sampler = %"PRIu64
,
1402 brw_inst_binding_table_index(devinfo
, inst
),
1403 brw_inst_sampler(devinfo
, inst
));
1405 format(file
, " (%"PRIu64
", %"PRIu64
", %"PRIu64
", ",
1406 brw_inst_binding_table_index(devinfo
, inst
),
1407 brw_inst_sampler(devinfo
, inst
),
1408 brw_inst_sampler_msg_type(devinfo
, inst
));
1409 if (!devinfo
->is_g4x
) {
1410 err
|= control(file
, "sampler target format",
1411 sampler_target_format
,
1412 brw_inst_sampler_return_format(devinfo
, inst
), NULL
);
1417 case GEN6_SFID_DATAPORT_SAMPLER_CACHE
:
1418 case GEN6_SFID_DATAPORT_CONSTANT_CACHE
:
1419 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1420 if (devinfo
->gen
>= 6) {
1421 format(file
, " (%"PRIu64
", %"PRIu64
", %"PRIu64
", %"PRIu64
")",
1422 brw_inst_binding_table_index(devinfo
, inst
),
1423 brw_inst_dp_msg_control(devinfo
, inst
),
1424 brw_inst_dp_msg_type(devinfo
, inst
),
1425 devinfo
->gen
>= 7 ? 0 : brw_inst_dp_write_commit(devinfo
, inst
));
1427 bool is_965
= devinfo
->gen
== 4 && !devinfo
->is_g4x
;
1428 err
|= control(file
, "DP read message type",
1429 is_965
? gen4_dp_read_port_msg_type
:
1430 g45_dp_read_port_msg_type
,
1431 brw_inst_dp_read_msg_type(devinfo
, inst
),
1434 format(file
, " MsgCtrl = 0x%"PRIx64
,
1435 brw_inst_dp_read_msg_control(devinfo
, inst
));
1437 format(file
, " Surface = %"PRIu64
, brw_inst_binding_table_index(devinfo
, inst
));
1441 case GEN6_SFID_DATAPORT_RENDER_CACHE
: {
1442 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1443 unsigned msg_type
= brw_inst_dp_write_msg_type(devinfo
, inst
);
1445 err
|= control(file
, "DP rc message type",
1446 dp_rc_msg_type(devinfo
), msg_type
, &space
);
1448 bool is_rt_write
= msg_type
==
1449 (devinfo
->gen
>= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1450 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
);
1453 err
|= control(file
, "RT message type", m_rt_write_subtype
,
1454 brw_inst_rt_message_type(devinfo
, inst
), &space
);
1455 if (devinfo
->gen
>= 6 && brw_inst_rt_slot_group(devinfo
, inst
))
1456 string(file
, " Hi");
1457 if (brw_inst_rt_last(devinfo
, inst
))
1458 string(file
, " LastRT");
1459 if (devinfo
->gen
< 7 && brw_inst_dp_write_commit(devinfo
, inst
))
1460 string(file
, " WriteCommit");
1462 format(file
, " MsgCtrl = 0x%"PRIx64
,
1463 brw_inst_dp_write_msg_control(devinfo
, inst
));
1466 format(file
, " Surface = %"PRIu64
, brw_inst_binding_table_index(devinfo
, inst
));
1470 case BRW_SFID_URB
: {
1471 unsigned opcode
= brw_inst_urb_opcode(devinfo
, inst
);
1473 format(file
, " %"PRIu64
, brw_inst_urb_global_offset(devinfo
, inst
));
1477 err
|= control(file
, "urb opcode",
1478 devinfo
->gen
>= 7 ? gen7_urb_opcode
1482 if (devinfo
->gen
>= 7 &&
1483 brw_inst_urb_per_slot_offset(devinfo
, inst
)) {
1484 string(file
, " per-slot");
1487 if (opcode
== GEN8_URB_OPCODE_SIMD8_WRITE
||
1488 opcode
== GEN8_URB_OPCODE_SIMD8_READ
) {
1489 if (brw_inst_urb_channel_mask_present(devinfo
, inst
))
1490 string(file
, " masked");
1492 err
|= control(file
, "urb swizzle", urb_swizzle
,
1493 brw_inst_urb_swizzle_control(devinfo
, inst
),
1497 if (devinfo
->gen
< 7) {
1498 err
|= control(file
, "urb allocate", urb_allocate
,
1499 brw_inst_urb_allocate(devinfo
, inst
), &space
);
1500 err
|= control(file
, "urb used", urb_used
,
1501 brw_inst_urb_used(devinfo
, inst
), &space
);
1503 if (devinfo
->gen
< 8) {
1504 err
|= control(file
, "urb complete", urb_complete
,
1505 brw_inst_urb_complete(devinfo
, inst
), &space
);
1509 case BRW_SFID_THREAD_SPAWNER
:
1512 case BRW_SFID_MESSAGE_GATEWAY
:
1513 format(file
, " (%s)",
1514 gen7_gateway_subfuncid
[brw_inst_gateway_subfuncid(devinfo
, inst
)]);
1517 case GEN7_SFID_DATAPORT_DATA_CACHE
:
1518 if (devinfo
->gen
>= 7) {
1521 err
|= control(file
, "DP DC0 message type",
1522 dp_dc0_msg_type_gen7
,
1523 brw_inst_dp_msg_type(devinfo
, inst
), &space
);
1525 format(file
, ", %"PRIu64
", ", brw_inst_binding_table_index(devinfo
, inst
));
1527 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1528 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
:
1529 control(file
, "atomic op", aop
,
1530 brw_inst_imm_ud(devinfo
, inst
) >> 8 & 0xf, &space
);
1533 format(file
, "%"PRIu64
, brw_inst_dp_msg_control(devinfo
, inst
));
1540 case HSW_SFID_DATAPORT_DATA_CACHE_1
: {
1541 if (devinfo
->gen
>= 7) {
1544 unsigned msg_ctrl
= brw_inst_dp_msg_control(devinfo
, inst
);
1546 err
|= control(file
, "DP DC1 message type",
1547 dp_dc1_msg_type_hsw
,
1548 brw_inst_dp_msg_type(devinfo
, inst
), &space
);
1550 format(file
, ", Surface = %"PRIu64
", ",
1551 brw_inst_binding_table_index(devinfo
, inst
));
1553 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1554 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
:
1555 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
:
1556 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
:
1557 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
1559 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
:
1560 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
:
1561 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
:
1562 control(file
, "atomic op", aop
, msg_ctrl
& 0xf, &space
);
1564 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
:
1565 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
:
1566 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
:
1567 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
: {
1568 static const char *simd_modes
[] = { "4x2", "16", "8" };
1569 format(file
, "SIMD%s, Mask = 0x%x",
1570 simd_modes
[msg_ctrl
>> 4], msg_ctrl
& 0xf);
1574 format(file
, "0x%x", msg_ctrl
);
1582 case GEN7_SFID_PIXEL_INTERPOLATOR
:
1583 if (devinfo
->gen
>= 7) {
1584 format(file
, " (%s, %s, 0x%02"PRIx64
")",
1585 brw_inst_pi_nopersp(devinfo
, inst
) ? "linear" : "persp",
1586 pixel_interpolator_msg_types
[brw_inst_pi_message_type(devinfo
, inst
)],
1587 brw_inst_pi_message_data(devinfo
, inst
));
1593 format(file
, "unsupported shared function ID %d", sfid
);
1599 format(file
, "mlen %"PRIu64
, brw_inst_mlen(devinfo
, inst
));
1600 format(file
, " rlen %"PRIu64
, brw_inst_rlen(devinfo
, inst
));
1604 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1607 err
|= control(file
, "access mode", access_mode
,
1608 brw_inst_access_mode(devinfo
, inst
), &space
);
1609 if (devinfo
->gen
>= 6) {
1610 err
|= control(file
, "write enable control", wectrl
,
1611 brw_inst_mask_control(devinfo
, inst
), &space
);
1613 err
|= control(file
, "mask control", mask_ctrl
,
1614 brw_inst_mask_control(devinfo
, inst
), &space
);
1616 err
|= control(file
, "dependency control", dep_ctrl
,
1617 ((brw_inst_no_dd_check(devinfo
, inst
) << 1) |
1618 brw_inst_no_dd_clear(devinfo
, inst
)), &space
);
1620 if (devinfo
->gen
>= 6)
1621 err
|= qtr_ctrl(file
, devinfo
, inst
);
1623 if (brw_inst_qtr_control(devinfo
, inst
) == BRW_COMPRESSION_COMPRESSED
&&
1624 desc
&& desc
->ndst
> 0 &&
1625 brw_inst_dst_reg_file(devinfo
, inst
) == BRW_MESSAGE_REGISTER_FILE
&&
1626 brw_inst_dst_da_reg_nr(devinfo
, inst
) & BRW_MRF_COMPR4
) {
1627 format(file
, " compr4");
1629 err
|= control(file
, "compression control", compr_ctrl
,
1630 brw_inst_qtr_control(devinfo
, inst
), &space
);
1634 err
|= control(file
, "compaction", cmpt_ctrl
, is_compacted
, &space
);
1635 err
|= control(file
, "thread control", thread_ctrl
,
1636 brw_inst_thread_control(devinfo
, inst
), &space
);
1637 if (has_branch_ctrl(devinfo
, opcode
)) {
1638 err
|= control(file
, "branch ctrl", branch_ctrl
,
1639 brw_inst_branch_control(devinfo
, inst
), &space
);
1640 } else if (devinfo
->gen
>= 6) {
1641 err
|= control(file
, "acc write control", accwr
,
1642 brw_inst_acc_wr_control(devinfo
, inst
), &space
);
1644 if (opcode
== BRW_OPCODE_SEND
|| opcode
== BRW_OPCODE_SENDC
)
1645 err
|= control(file
, "end of thread", end_of_thread
,
1646 brw_inst_eot(devinfo
, inst
), &space
);