2 * Copyright © 2008 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
27 #include "brw_eu_defines.h"
29 #include "brw_shader.h"
33 #include "util/half_float.h"
36 brw_has_jip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
41 return opcode
== BRW_OPCODE_IF
||
42 opcode
== BRW_OPCODE_ELSE
||
43 opcode
== BRW_OPCODE_ENDIF
||
44 opcode
== BRW_OPCODE_WHILE
||
45 opcode
== BRW_OPCODE_BREAK
||
46 opcode
== BRW_OPCODE_CONTINUE
||
47 opcode
== BRW_OPCODE_HALT
;
51 brw_has_uip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
56 return (devinfo
->gen
>= 7 && opcode
== BRW_OPCODE_IF
) ||
57 (devinfo
->gen
>= 8 && opcode
== BRW_OPCODE_ELSE
) ||
58 opcode
== BRW_OPCODE_BREAK
||
59 opcode
== BRW_OPCODE_CONTINUE
||
60 opcode
== BRW_OPCODE_HALT
;
64 has_branch_ctrl(const struct gen_device_info
*devinfo
, enum opcode opcode
)
69 return opcode
== BRW_OPCODE_IF
||
70 opcode
== BRW_OPCODE_ELSE
;
71 /* opcode == BRW_OPCODE_GOTO; */
75 is_logic_instruction(unsigned opcode
)
77 return opcode
== BRW_OPCODE_AND
||
78 opcode
== BRW_OPCODE_NOT
||
79 opcode
== BRW_OPCODE_OR
||
80 opcode
== BRW_OPCODE_XOR
;
84 is_send(unsigned opcode
)
86 return opcode
== BRW_OPCODE_SEND
||
87 opcode
== BRW_OPCODE_SENDC
||
88 opcode
== BRW_OPCODE_SENDS
||
89 opcode
== BRW_OPCODE_SENDSC
;
93 is_split_send(UNUSED
const struct gen_device_info
*devinfo
, unsigned opcode
)
95 if (devinfo
->gen
>= 12)
96 return is_send(opcode
);
98 return opcode
== BRW_OPCODE_SENDS
||
99 opcode
== BRW_OPCODE_SENDSC
;
102 const char *const conditional_modifier
[16] = {
103 [BRW_CONDITIONAL_NONE
] = "",
104 [BRW_CONDITIONAL_Z
] = ".z",
105 [BRW_CONDITIONAL_NZ
] = ".nz",
106 [BRW_CONDITIONAL_G
] = ".g",
107 [BRW_CONDITIONAL_GE
] = ".ge",
108 [BRW_CONDITIONAL_L
] = ".l",
109 [BRW_CONDITIONAL_LE
] = ".le",
110 [BRW_CONDITIONAL_R
] = ".r",
111 [BRW_CONDITIONAL_O
] = ".o",
112 [BRW_CONDITIONAL_U
] = ".u",
115 static const char *const m_negate
[2] = {
120 static const char *const _abs
[2] = {
125 static const char *const m_bitnot
[2] = { "", "~" };
127 static const char *const vert_stride
[16] = {
138 static const char *const width
[8] = {
146 static const char *const horiz_stride
[4] = {
153 static const char *const chan_sel
[4] = {
160 static const char *const debug_ctrl
[2] = {
165 static const char *const saturate
[2] = {
170 static const char *const cmpt_ctrl
[2] = {
175 static const char *const accwr
[2] = {
180 static const char *const branch_ctrl
[2] = {
185 static const char *const wectrl
[2] = {
190 static const char *const exec_size
[8] = {
199 static const char *const pred_inv
[2] = {
204 const char *const pred_ctrl_align16
[16] = {
214 static const char *const pred_ctrl_align1
[16] = {
215 [BRW_PREDICATE_NORMAL
] = "",
216 [BRW_PREDICATE_ALIGN1_ANYV
] = ".anyv",
217 [BRW_PREDICATE_ALIGN1_ALLV
] = ".allv",
218 [BRW_PREDICATE_ALIGN1_ANY2H
] = ".any2h",
219 [BRW_PREDICATE_ALIGN1_ALL2H
] = ".all2h",
220 [BRW_PREDICATE_ALIGN1_ANY4H
] = ".any4h",
221 [BRW_PREDICATE_ALIGN1_ALL4H
] = ".all4h",
222 [BRW_PREDICATE_ALIGN1_ANY8H
] = ".any8h",
223 [BRW_PREDICATE_ALIGN1_ALL8H
] = ".all8h",
224 [BRW_PREDICATE_ALIGN1_ANY16H
] = ".any16h",
225 [BRW_PREDICATE_ALIGN1_ALL16H
] = ".all16h",
226 [BRW_PREDICATE_ALIGN1_ANY32H
] = ".any32h",
227 [BRW_PREDICATE_ALIGN1_ALL32H
] = ".all32h",
230 static const char *const thread_ctrl
[4] = {
231 [BRW_THREAD_NORMAL
] = "",
232 [BRW_THREAD_ATOMIC
] = "atomic",
233 [BRW_THREAD_SWITCH
] = "switch",
236 static const char *const compr_ctrl
[4] = {
243 static const char *const dep_ctrl
[4] = {
247 [3] = "NoDDClr,NoDDChk",
250 static const char *const mask_ctrl
[4] = {
255 static const char *const access_mode
[2] = {
260 static const char *const reg_file
[4] = {
267 static const char *const writemask
[16] = {
286 static const char *const end_of_thread
[2] = {
291 /* SFIDs on Gen4-5 */
292 static const char *const gen4_sfid
[16] = {
293 [BRW_SFID_NULL
] = "null",
294 [BRW_SFID_MATH
] = "math",
295 [BRW_SFID_SAMPLER
] = "sampler",
296 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
297 [BRW_SFID_DATAPORT_READ
] = "read",
298 [BRW_SFID_DATAPORT_WRITE
] = "write",
299 [BRW_SFID_URB
] = "urb",
300 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
301 [BRW_SFID_VME
] = "vme",
304 static const char *const gen6_sfid
[16] = {
305 [BRW_SFID_NULL
] = "null",
306 [BRW_SFID_MATH
] = "math",
307 [BRW_SFID_SAMPLER
] = "sampler",
308 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
309 [BRW_SFID_URB
] = "urb",
310 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
311 [GEN6_SFID_DATAPORT_SAMPLER_CACHE
] = "dp_sampler",
312 [GEN6_SFID_DATAPORT_RENDER_CACHE
] = "render",
313 [GEN6_SFID_DATAPORT_CONSTANT_CACHE
] = "const",
314 [GEN7_SFID_DATAPORT_DATA_CACHE
] = "data",
315 [GEN7_SFID_PIXEL_INTERPOLATOR
] = "pixel interp",
316 [HSW_SFID_DATAPORT_DATA_CACHE_1
] = "dp data 1",
317 [HSW_SFID_CRE
] = "cre",
320 static const char *const gen7_gateway_subfuncid
[8] = {
321 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY
] = "open",
322 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY
] = "close",
323 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG
] = "forward msg",
324 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP
] = "get timestamp",
325 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG
] = "barrier msg",
326 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE
] = "update state",
327 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE
] = "mmio read/write",
330 static const char *const gen4_dp_read_port_msg_type
[4] = {
331 [0b00] = "OWord Block Read",
332 [0b01] = "OWord Dual Block Read",
333 [0b10] = "Media Block Read",
334 [0b11] = "DWord Scattered Read",
337 static const char *const g45_dp_read_port_msg_type
[8] = {
338 [0b000] = "OWord Block Read",
339 [0b010] = "OWord Dual Block Read",
340 [0b100] = "Media Block Read",
341 [0b110] = "DWord Scattered Read",
342 [0b001] = "Render Target UNORM Read",
343 [0b011] = "AVC Loop Filter Read",
346 static const char *const dp_write_port_msg_type
[8] = {
347 [0b000] = "OWord block write",
348 [0b001] = "OWord dual block write",
349 [0b010] = "media block write",
350 [0b011] = "DWord scattered write",
351 [0b100] = "RT write",
352 [0b101] = "streamed VB write",
353 [0b110] = "RT UNORM write", /* G45+ */
354 [0b111] = "flush render cache",
357 static const char *const dp_rc_msg_type_gen6
[16] = {
358 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ
] = "OWORD block read",
359 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ
] = "RT UNORM read",
360 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ
] = "OWORD dual block read",
361 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ
] = "media block read",
362 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ
] =
363 "OWORD unaligned block read",
364 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ
] = "DWORD scattered read",
365 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE
] = "DWORD atomic write",
366 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE
] = "OWORD block write",
367 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE
] =
368 "OWORD dual block write",
369 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE
] = "media block write",
370 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE
] =
371 "DWORD scattered write",
372 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
] = "RT write",
373 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE
] = "streamed VB write",
374 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE
] = "RT UNORM write",
377 static const char *const dp_rc_msg_type_gen7
[16] = {
378 [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ
] = "media block read",
379 [GEN7_DATAPORT_RC_TYPED_SURFACE_READ
] = "typed surface read",
380 [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP
] = "typed atomic op",
381 [GEN7_DATAPORT_RC_MEMORY_FENCE
] = "memory fence",
382 [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE
] = "media block write",
383 [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
384 [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE
] = "typed surface write"
387 static const char *const dp_rc_msg_type_gen9
[16] = {
388 [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
389 [GEN9_DATAPORT_RC_RENDER_TARGET_READ
] = "RT read"
392 static const char *const *
393 dp_rc_msg_type(const struct gen_device_info
*devinfo
)
395 return (devinfo
->gen
>= 9 ? dp_rc_msg_type_gen9
:
396 devinfo
->gen
>= 7 ? dp_rc_msg_type_gen7
:
397 devinfo
->gen
>= 6 ? dp_rc_msg_type_gen6
:
398 dp_write_port_msg_type
);
401 static const char *const m_rt_write_subtype
[] = {
403 [0b001] = "SIMD16/RepData",
404 [0b010] = "SIMD8/DualSrcLow",
405 [0b011] = "SIMD8/DualSrcHigh",
407 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
408 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
411 static const char *const dp_dc0_msg_type_gen7
[16] = {
412 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ
] = "DC OWORD block read",
413 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ
] =
414 "DC unaligned OWORD block read",
415 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ
] = "DC OWORD dual block read",
416 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ
] = "DC DWORD scattered read",
417 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ
] = "DC byte scattered read",
418 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ
] = "DC untyped surface read",
419 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
] = "DC untyped atomic",
420 [GEN7_DATAPORT_DC_MEMORY_FENCE
] = "DC mfence",
421 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE
] = "DC OWORD block write",
422 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE
] = "DC OWORD dual block write",
423 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE
] = "DC DWORD scatterd write",
424 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE
] = "DC byte scattered write",
425 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
428 static const char *const dp_dc1_msg_type_hsw
[32] = {
429 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
] = "untyped surface read",
430 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
] = "DC untyped atomic op",
431 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
] =
432 "DC untyped 4x2 atomic op",
433 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ
] = "DC media block read",
434 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
] = "DC typed surface read",
435 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
] = "DC typed atomic",
436 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
] = "DC typed 4x2 atomic op",
437 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
438 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE
] = "DC media block write",
439 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
] = "DC atomic counter op",
440 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
] =
441 "DC 4x2 atomic counter op",
442 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
] = "DC typed surface write",
443 [GEN9_DATAPORT_DC_PORT1_A64_SCATTERED_READ
] = "DC A64 scattered read",
444 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ
] = "DC A64 untyped surface read",
445 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP
] = "DC A64 untyped atomic op",
446 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE
] = "DC A64 untyped surface write",
447 [GEN8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE
] = "DC A64 scattered write",
448 [GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP
] =
449 "DC untyped atomic float op",
450 [GEN9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP
] =
451 "DC A64 untyped atomic float op",
454 static const char *const aop
[16] = {
455 [BRW_AOP_AND
] = "and",
457 [BRW_AOP_XOR
] = "xor",
458 [BRW_AOP_MOV
] = "mov",
459 [BRW_AOP_INC
] = "inc",
460 [BRW_AOP_DEC
] = "dec",
461 [BRW_AOP_ADD
] = "add",
462 [BRW_AOP_SUB
] = "sub",
463 [BRW_AOP_REVSUB
] = "revsub",
464 [BRW_AOP_IMAX
] = "imax",
465 [BRW_AOP_IMIN
] = "imin",
466 [BRW_AOP_UMAX
] = "umax",
467 [BRW_AOP_UMIN
] = "umin",
468 [BRW_AOP_CMPWR
] = "cmpwr",
469 [BRW_AOP_PREDEC
] = "predec",
472 static const char *const aop_float
[4] = {
473 [BRW_AOP_FMAX
] = "fmax",
474 [BRW_AOP_FMIN
] = "fmin",
475 [BRW_AOP_FCMPWR
] = "fcmpwr",
478 static const char * const pixel_interpolator_msg_types
[4] = {
479 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET
] = "per_message_offset",
480 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE
] = "sample_position",
481 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID
] = "centroid",
482 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET
] = "per_slot_offset",
485 static const char *const math_function
[16] = {
486 [BRW_MATH_FUNCTION_INV
] = "inv",
487 [BRW_MATH_FUNCTION_LOG
] = "log",
488 [BRW_MATH_FUNCTION_EXP
] = "exp",
489 [BRW_MATH_FUNCTION_SQRT
] = "sqrt",
490 [BRW_MATH_FUNCTION_RSQ
] = "rsq",
491 [BRW_MATH_FUNCTION_SIN
] = "sin",
492 [BRW_MATH_FUNCTION_COS
] = "cos",
493 [BRW_MATH_FUNCTION_SINCOS
] = "sincos",
494 [BRW_MATH_FUNCTION_FDIV
] = "fdiv",
495 [BRW_MATH_FUNCTION_POW
] = "pow",
496 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER
] = "intdivmod",
497 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
] = "intdiv",
498 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER
] = "intmod",
499 [GEN8_MATH_FUNCTION_INVM
] = "invm",
500 [GEN8_MATH_FUNCTION_RSQRTM
] = "rsqrtm",
503 static const char *const sync_function
[16] = {
504 [TGL_SYNC_NOP
] = "nop",
505 [TGL_SYNC_ALLRD
] = "allrd",
506 [TGL_SYNC_ALLWR
] = "allwr",
507 [TGL_SYNC_BAR
] = "bar",
508 [TGL_SYNC_HOST
] = "host",
511 static const char *const math_saturate
[2] = {
516 static const char *const math_signed
[2] = {
521 static const char *const math_scalar
[2] = {
526 static const char *const math_precision
[2] = {
528 [1] = "partial_precision"
531 static const char *const gen5_urb_opcode
[] = {
536 static const char *const gen7_urb_opcode
[] = {
537 [BRW_URB_OPCODE_WRITE_HWORD
] = "write HWord",
538 [BRW_URB_OPCODE_WRITE_OWORD
] = "write OWord",
539 [BRW_URB_OPCODE_READ_HWORD
] = "read HWord",
540 [BRW_URB_OPCODE_READ_OWORD
] = "read OWord",
541 [GEN7_URB_OPCODE_ATOMIC_MOV
] = "atomic mov", /* Gen7+ */
542 [GEN7_URB_OPCODE_ATOMIC_INC
] = "atomic inc", /* Gen7+ */
543 [GEN8_URB_OPCODE_ATOMIC_ADD
] = "atomic add", /* Gen8+ */
544 [GEN8_URB_OPCODE_SIMD8_WRITE
] = "SIMD8 write", /* Gen8+ */
545 [GEN8_URB_OPCODE_SIMD8_READ
] = "SIMD8 read", /* Gen8+ */
546 /* [9-15] - reserved */
549 static const char *const urb_swizzle
[4] = {
550 [BRW_URB_SWIZZLE_NONE
] = "",
551 [BRW_URB_SWIZZLE_INTERLEAVE
] = "interleave",
552 [BRW_URB_SWIZZLE_TRANSPOSE
] = "transpose",
555 static const char *const urb_allocate
[2] = {
560 static const char *const urb_used
[2] = {
565 static const char *const urb_complete
[2] = {
570 static const char *const gen5_sampler_msg_type
[] = {
571 [GEN5_SAMPLER_MESSAGE_SAMPLE
] = "sample",
572 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS
] = "sample_b",
573 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD
] = "sample_l",
574 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE
] = "sample_c",
575 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS
] = "sample_d",
576 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE
] = "sample_b_c",
577 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE
] = "sample_l_c",
578 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD
] = "ld",
579 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4
] = "gather4",
580 [GEN5_SAMPLER_MESSAGE_LOD
] = "lod",
581 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO
] = "resinfo",
582 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO
] = "sampleinfo",
583 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C
] = "gather4_c",
584 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO
] = "gather4_po",
585 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C
] = "gather4_po_c",
586 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE
] = "sample_d_c",
587 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ
] = "sample_lz",
588 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ
] = "sample_c_lz",
589 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ
] = "ld_lz",
590 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W
] = "ld2dms_w",
591 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS
] = "ld_mcs",
592 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS
] = "ld2dms",
593 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS
] = "ld2dss",
596 static const char *const gen5_sampler_simd_mode
[4] = {
597 [BRW_SAMPLER_SIMD_MODE_SIMD4X2
] = "SIMD4x2",
598 [BRW_SAMPLER_SIMD_MODE_SIMD8
] = "SIMD8",
599 [BRW_SAMPLER_SIMD_MODE_SIMD16
] = "SIMD16",
600 [BRW_SAMPLER_SIMD_MODE_SIMD32_64
] = "SIMD32/64",
603 static const char *const sampler_target_format
[4] = {
613 string(FILE *file
, const char *string
)
616 column
+= strlen(string
);
621 format(FILE *f
, const char *format
, ...) PRINTFLIKE(2, 3);
624 format(FILE *f
, const char *format
, ...)
628 va_start(args
, format
);
630 vsnprintf(buf
, sizeof(buf
) - 1, format
, args
);
654 control(FILE *file
, const char *name
, const char *const ctrl
[],
655 unsigned id
, int *space
)
658 fprintf(file
, "*** invalid %s value %d ", name
, id
);
664 string(file
, ctrl
[id
]);
672 print_opcode(FILE *file
, const struct gen_device_info
*devinfo
,
675 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, id
);
677 format(file
, "*** invalid opcode value %d ", id
);
680 string(file
, desc
->name
);
685 reg(FILE *file
, unsigned _reg_file
, unsigned _reg_nr
)
689 /* Clear the Compr4 instruction compression bit. */
690 if (_reg_file
== BRW_MESSAGE_REGISTER_FILE
)
691 _reg_nr
&= ~BRW_MRF_COMPR4
;
693 if (_reg_file
== BRW_ARCHITECTURE_REGISTER_FILE
) {
694 switch (_reg_nr
& 0xf0) {
696 string(file
, "null");
698 case BRW_ARF_ADDRESS
:
699 format(file
, "a%d", _reg_nr
& 0x0f);
701 case BRW_ARF_ACCUMULATOR
:
702 format(file
, "acc%d", _reg_nr
& 0x0f);
705 format(file
, "f%d", _reg_nr
& 0x0f);
708 format(file
, "mask%d", _reg_nr
& 0x0f);
710 case BRW_ARF_MASK_STACK
:
711 format(file
, "ms%d", _reg_nr
& 0x0f);
713 case BRW_ARF_MASK_STACK_DEPTH
:
714 format(file
, "msd%d", _reg_nr
& 0x0f);
717 format(file
, "sr%d", _reg_nr
& 0x0f);
719 case BRW_ARF_CONTROL
:
720 format(file
, "cr%d", _reg_nr
& 0x0f);
722 case BRW_ARF_NOTIFICATION_COUNT
:
723 format(file
, "n%d", _reg_nr
& 0x0f);
730 format(file
, "tdr0");
732 case BRW_ARF_TIMESTAMP
:
733 format(file
, "tm%d", _reg_nr
& 0x0f);
736 format(file
, "ARF%d", _reg_nr
);
740 err
|= control(file
, "src reg file", reg_file
, _reg_file
, NULL
);
741 format(file
, "%d", _reg_nr
);
747 dest(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
749 enum brw_reg_type type
= brw_inst_dst_type(devinfo
, inst
);
750 unsigned elem_size
= brw_reg_type_to_size(type
);
753 if (is_split_send(devinfo
, brw_inst_opcode(devinfo
, inst
))) {
754 /* These are fixed for split sends */
755 type
= BRW_REGISTER_TYPE_UD
;
757 if (devinfo
->gen
>= 12) {
758 err
|= reg(file
, brw_inst_send_dst_reg_file(devinfo
, inst
),
759 brw_inst_dst_da_reg_nr(devinfo
, inst
));
760 string(file
, brw_reg_type_to_letters(type
));
761 } else if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
762 err
|= reg(file
, brw_inst_send_dst_reg_file(devinfo
, inst
),
763 brw_inst_dst_da_reg_nr(devinfo
, inst
));
764 unsigned subreg_nr
= brw_inst_dst_da16_subreg_nr(devinfo
, inst
);
766 format(file
, ".%u", subreg_nr
);
767 string(file
, brw_reg_type_to_letters(type
));
769 string(file
, "g[a0");
770 if (brw_inst_dst_ia_subreg_nr(devinfo
, inst
))
771 format(file
, ".%"PRIu64
, brw_inst_dst_ia_subreg_nr(devinfo
, inst
) /
773 if (brw_inst_send_dst_ia16_addr_imm(devinfo
, inst
))
774 format(file
, " %d", brw_inst_send_dst_ia16_addr_imm(devinfo
, inst
));
776 string(file
, brw_reg_type_to_letters(type
));
778 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
779 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
780 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
781 brw_inst_dst_da_reg_nr(devinfo
, inst
));
784 if (brw_inst_dst_da1_subreg_nr(devinfo
, inst
))
785 format(file
, ".%"PRIu64
, brw_inst_dst_da1_subreg_nr(devinfo
, inst
) /
788 err
|= control(file
, "horiz stride", horiz_stride
,
789 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
791 string(file
, brw_reg_type_to_letters(type
));
793 string(file
, "g[a0");
794 if (brw_inst_dst_ia_subreg_nr(devinfo
, inst
))
795 format(file
, ".%"PRIu64
, brw_inst_dst_ia_subreg_nr(devinfo
, inst
) /
797 if (brw_inst_dst_ia1_addr_imm(devinfo
, inst
))
798 format(file
, " %d", brw_inst_dst_ia1_addr_imm(devinfo
, inst
));
800 err
|= control(file
, "horiz stride", horiz_stride
,
801 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
803 string(file
, brw_reg_type_to_letters(type
));
806 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
807 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
808 brw_inst_dst_da_reg_nr(devinfo
, inst
));
811 if (brw_inst_dst_da16_subreg_nr(devinfo
, inst
))
812 format(file
, ".%u", 16 / elem_size
);
814 err
|= control(file
, "writemask", writemask
,
815 brw_inst_da16_writemask(devinfo
, inst
), NULL
);
816 string(file
, brw_reg_type_to_letters(type
));
819 string(file
, "Indirect align16 address mode not supported");
827 dest_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
829 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
833 enum brw_reg_type type
;
835 if (devinfo
->gen
< 10 && is_align1
)
838 if (devinfo
->gen
== 6 && brw_inst_3src_a16_dst_reg_file(devinfo
, inst
))
839 reg_file
= BRW_MESSAGE_REGISTER_FILE
;
840 else if (devinfo
->gen
>= 12)
841 reg_file
= brw_inst_3src_a1_dst_reg_file(devinfo
, inst
);
842 else if (is_align1
&& brw_inst_3src_a1_dst_reg_file(devinfo
, inst
))
843 reg_file
= BRW_ARCHITECTURE_REGISTER_FILE
;
845 reg_file
= BRW_GENERAL_REGISTER_FILE
;
847 err
|= reg(file
, reg_file
, brw_inst_3src_dst_reg_nr(devinfo
, inst
));
852 type
= brw_inst_3src_a1_dst_type(devinfo
, inst
);
853 subreg_nr
= brw_inst_3src_a1_dst_subreg_nr(devinfo
, inst
);
855 type
= brw_inst_3src_a16_dst_type(devinfo
, inst
);
856 subreg_nr
= brw_inst_3src_a16_dst_subreg_nr(devinfo
, inst
) * 4;
858 subreg_nr
/= brw_reg_type_to_size(type
);
861 format(file
, ".%u", subreg_nr
);
865 err
|= control(file
, "writemask", writemask
,
866 brw_inst_3src_a16_dst_writemask(devinfo
, inst
), NULL
);
868 string(file
, brw_reg_type_to_letters(type
));
874 src_align1_region(FILE *file
,
875 unsigned _vert_stride
, unsigned _width
,
876 unsigned _horiz_stride
)
880 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
882 err
|= control(file
, "width", width
, _width
, NULL
);
884 err
|= control(file
, "horiz_stride", horiz_stride
, _horiz_stride
, NULL
);
891 const struct gen_device_info
*devinfo
,
893 enum brw_reg_type type
, unsigned _reg_file
,
894 unsigned _vert_stride
, unsigned _width
, unsigned _horiz_stride
,
895 unsigned reg_num
, unsigned sub_reg_num
, unsigned __abs
,
900 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
901 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
903 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
905 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
907 err
|= reg(file
, _reg_file
, reg_num
);
911 unsigned elem_size
= brw_reg_type_to_size(type
);
912 format(file
, ".%d", sub_reg_num
/ elem_size
); /* use formal style like spec */
914 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
915 string(file
, brw_reg_type_to_letters(type
));
921 const struct gen_device_info
*devinfo
,
923 enum brw_reg_type type
,
925 unsigned _addr_subreg_nr
,
928 unsigned _horiz_stride
, unsigned _width
, unsigned _vert_stride
)
932 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
933 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
935 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
937 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
939 string(file
, "g[a0");
941 format(file
, ".%d", _addr_subreg_nr
);
943 format(file
, " %d", _addr_imm
);
945 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
946 string(file
, brw_reg_type_to_letters(type
));
951 src_swizzle(FILE *file
, unsigned swiz
)
953 unsigned x
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_X
);
954 unsigned y
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Y
);
955 unsigned z
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Z
);
956 unsigned w
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_W
);
959 if (x
== y
&& x
== z
&& x
== w
) {
961 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
962 } else if (swiz
!= BRW_SWIZZLE_XYZW
) {
964 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
965 err
|= control(file
, "channel select", chan_sel
, y
, NULL
);
966 err
|= control(file
, "channel select", chan_sel
, z
, NULL
);
967 err
|= control(file
, "channel select", chan_sel
, w
, NULL
);
974 const struct gen_device_info
*devinfo
,
976 enum brw_reg_type type
,
978 unsigned _vert_stride
,
983 unsigned swz_x
, unsigned swz_y
, unsigned swz_z
, unsigned swz_w
)
987 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
988 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
990 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
992 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
994 err
|= reg(file
, _reg_file
, _reg_nr
);
998 unsigned elem_size
= brw_reg_type_to_size(type
);
1000 /* bit4 for subreg number byte addressing. Make this same meaning as
1001 in da1 case, so output looks consistent. */
1002 format(file
, ".%d", 16 / elem_size
);
1005 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
1007 err
|= src_swizzle(file
, BRW_SWIZZLE4(swz_x
, swz_y
, swz_z
, swz_w
));
1008 string(file
, brw_reg_type_to_letters(type
));
1012 static enum brw_vertical_stride
1013 vstride_from_align1_3src_vstride(const struct gen_device_info
*devinfo
,
1014 enum gen10_align1_3src_vertical_stride vstride
)
1017 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_0
: return BRW_VERTICAL_STRIDE_0
;
1018 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2
:
1019 if (devinfo
->gen
>= 12)
1020 return BRW_VERTICAL_STRIDE_1
;
1022 return BRW_VERTICAL_STRIDE_2
;
1023 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_4
: return BRW_VERTICAL_STRIDE_4
;
1024 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8
: return BRW_VERTICAL_STRIDE_8
;
1026 unreachable("not reached");
1030 static enum brw_horizontal_stride
1031 hstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride
)
1034 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0
: return BRW_HORIZONTAL_STRIDE_0
;
1035 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1
: return BRW_HORIZONTAL_STRIDE_1
;
1036 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2
: return BRW_HORIZONTAL_STRIDE_2
;
1037 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4
: return BRW_HORIZONTAL_STRIDE_4
;
1039 unreachable("not reached");
1043 static enum brw_vertical_stride
1044 vstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride
)
1047 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0
: return BRW_VERTICAL_STRIDE_0
;
1048 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1
: return BRW_VERTICAL_STRIDE_1
;
1049 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2
: return BRW_VERTICAL_STRIDE_2
;
1050 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4
: return BRW_VERTICAL_STRIDE_4
;
1052 unreachable("not reached");
1056 /* From "GEN10 Regioning Rules for Align1 Ternary Operations" in the
1057 * "Register Region Restrictions" documentation
1059 static enum brw_width
1060 implied_width(enum brw_vertical_stride _vert_stride
,
1061 enum brw_horizontal_stride _horiz_stride
)
1063 /* "1. Width is 1 when Vertical and Horizontal Strides are both zero." */
1064 if (_vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1065 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
) {
1068 /* "2. Width is equal to vertical stride when Horizontal Stride is zero." */
1069 } else if (_horiz_stride
== BRW_HORIZONTAL_STRIDE_0
) {
1070 switch (_vert_stride
) {
1071 case BRW_VERTICAL_STRIDE_2
: return BRW_WIDTH_2
;
1072 case BRW_VERTICAL_STRIDE_4
: return BRW_WIDTH_4
;
1073 case BRW_VERTICAL_STRIDE_8
: return BRW_WIDTH_8
;
1074 case BRW_VERTICAL_STRIDE_0
:
1076 unreachable("not reached");
1080 /* FINISHME: Implement these: */
1082 /* "3. Width is equal to Vertical Stride/Horizontal Stride when both
1083 * Strides are non-zero.
1085 * 4. Vertical Stride must not be zero if Horizontal Stride is non-zero.
1086 * This implies Vertical Stride is always greater than Horizontal
1089 * Given these statements and the knowledge that the stride and width
1090 * values are encoded in logarithmic form, we can perform the division
1091 * by just subtracting.
1093 return _vert_stride
- _horiz_stride
;
1098 src0_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1101 unsigned reg_nr
, subreg_nr
;
1102 enum brw_reg_file _file
;
1103 enum brw_reg_type type
;
1104 enum brw_vertical_stride _vert_stride
;
1105 enum brw_width _width
;
1106 enum brw_horizontal_stride _horiz_stride
;
1107 bool is_scalar_region
;
1108 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1110 if (devinfo
->gen
< 10 && is_align1
)
1114 if (devinfo
->gen
>= 12 && !brw_inst_3src_a1_src0_is_imm(devinfo
, inst
)) {
1115 _file
= brw_inst_3src_a1_src0_reg_file(devinfo
, inst
);
1116 } else if (brw_inst_3src_a1_src0_reg_file(devinfo
, inst
) ==
1117 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1118 _file
= BRW_GENERAL_REGISTER_FILE
;
1119 } else if (brw_inst_3src_a1_src0_type(devinfo
, inst
) ==
1120 BRW_REGISTER_TYPE_NF
) {
1121 _file
= BRW_ARCHITECTURE_REGISTER_FILE
;
1123 _file
= BRW_IMMEDIATE_VALUE
;
1124 uint16_t imm_val
= brw_inst_3src_a1_src0_imm(devinfo
, inst
);
1125 enum brw_reg_type type
= brw_inst_3src_a1_src0_type(devinfo
, inst
);
1127 if (type
== BRW_REGISTER_TYPE_W
) {
1128 format(file
, "%dW", imm_val
);
1129 } else if (type
== BRW_REGISTER_TYPE_UW
) {
1130 format(file
, "0x%04xUW", imm_val
);
1131 } else if (type
== BRW_REGISTER_TYPE_HF
) {
1132 format(file
, "0x%04xHF", imm_val
);
1137 reg_nr
= brw_inst_3src_src0_reg_nr(devinfo
, inst
);
1138 subreg_nr
= brw_inst_3src_a1_src0_subreg_nr(devinfo
, inst
);
1139 type
= brw_inst_3src_a1_src0_type(devinfo
, inst
);
1140 _vert_stride
= vstride_from_align1_3src_vstride(
1141 devinfo
, brw_inst_3src_a1_src0_vstride(devinfo
, inst
));
1142 _horiz_stride
= hstride_from_align1_3src_hstride(
1143 brw_inst_3src_a1_src0_hstride(devinfo
, inst
));
1144 _width
= implied_width(_vert_stride
, _horiz_stride
);
1146 _file
= BRW_GENERAL_REGISTER_FILE
;
1147 reg_nr
= brw_inst_3src_src0_reg_nr(devinfo
, inst
);
1148 subreg_nr
= brw_inst_3src_a16_src0_subreg_nr(devinfo
, inst
) * 4;
1149 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1151 if (brw_inst_3src_a16_src0_rep_ctrl(devinfo
, inst
)) {
1152 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1153 _width
= BRW_WIDTH_1
;
1154 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1156 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1157 _width
= BRW_WIDTH_4
;
1158 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1161 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1162 _width
== BRW_WIDTH_1
&&
1163 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1165 subreg_nr
/= brw_reg_type_to_size(type
);
1167 err
|= control(file
, "negate", m_negate
,
1168 brw_inst_3src_src0_negate(devinfo
, inst
), NULL
);
1169 err
|= control(file
, "abs", _abs
, brw_inst_3src_src0_abs(devinfo
, inst
), NULL
);
1171 err
|= reg(file
, _file
, reg_nr
);
1174 if (subreg_nr
|| is_scalar_region
)
1175 format(file
, ".%d", subreg_nr
);
1176 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1177 if (!is_scalar_region
&& !is_align1
)
1178 err
|= src_swizzle(file
, brw_inst_3src_a16_src0_swizzle(devinfo
, inst
));
1179 string(file
, brw_reg_type_to_letters(type
));
1184 src1_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1187 unsigned reg_nr
, subreg_nr
;
1188 enum brw_reg_file _file
;
1189 enum brw_reg_type type
;
1190 enum brw_vertical_stride _vert_stride
;
1191 enum brw_width _width
;
1192 enum brw_horizontal_stride _horiz_stride
;
1193 bool is_scalar_region
;
1194 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1196 if (devinfo
->gen
< 10 && is_align1
)
1200 if (devinfo
->gen
>= 12) {
1201 _file
= brw_inst_3src_a1_src1_reg_file(devinfo
, inst
);
1202 } else if (brw_inst_3src_a1_src1_reg_file(devinfo
, inst
) ==
1203 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1204 _file
= BRW_GENERAL_REGISTER_FILE
;
1206 _file
= BRW_ARCHITECTURE_REGISTER_FILE
;
1209 reg_nr
= brw_inst_3src_src1_reg_nr(devinfo
, inst
);
1210 subreg_nr
= brw_inst_3src_a1_src1_subreg_nr(devinfo
, inst
);
1211 type
= brw_inst_3src_a1_src1_type(devinfo
, inst
);
1213 _vert_stride
= vstride_from_align1_3src_vstride(
1214 devinfo
, brw_inst_3src_a1_src1_vstride(devinfo
, inst
));
1215 _horiz_stride
= hstride_from_align1_3src_hstride(
1216 brw_inst_3src_a1_src1_hstride(devinfo
, inst
));
1217 _width
= implied_width(_vert_stride
, _horiz_stride
);
1219 _file
= BRW_GENERAL_REGISTER_FILE
;
1220 reg_nr
= brw_inst_3src_src1_reg_nr(devinfo
, inst
);
1221 subreg_nr
= brw_inst_3src_a16_src1_subreg_nr(devinfo
, inst
) * 4;
1222 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1224 if (brw_inst_3src_a16_src1_rep_ctrl(devinfo
, inst
)) {
1225 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1226 _width
= BRW_WIDTH_1
;
1227 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1229 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1230 _width
= BRW_WIDTH_4
;
1231 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1234 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1235 _width
== BRW_WIDTH_1
&&
1236 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1238 subreg_nr
/= brw_reg_type_to_size(type
);
1240 err
|= control(file
, "negate", m_negate
,
1241 brw_inst_3src_src1_negate(devinfo
, inst
), NULL
);
1242 err
|= control(file
, "abs", _abs
, brw_inst_3src_src1_abs(devinfo
, inst
), NULL
);
1244 err
|= reg(file
, _file
, reg_nr
);
1247 if (subreg_nr
|| is_scalar_region
)
1248 format(file
, ".%d", subreg_nr
);
1249 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1250 if (!is_scalar_region
&& !is_align1
)
1251 err
|= src_swizzle(file
, brw_inst_3src_a16_src1_swizzle(devinfo
, inst
));
1252 string(file
, brw_reg_type_to_letters(type
));
1257 src2_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1260 unsigned reg_nr
, subreg_nr
;
1261 enum brw_reg_file _file
;
1262 enum brw_reg_type type
;
1263 enum brw_vertical_stride _vert_stride
;
1264 enum brw_width _width
;
1265 enum brw_horizontal_stride _horiz_stride
;
1266 bool is_scalar_region
;
1267 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1269 if (devinfo
->gen
< 10 && is_align1
)
1273 if (devinfo
->gen
>= 12 && !brw_inst_3src_a1_src2_is_imm(devinfo
, inst
)) {
1274 _file
= brw_inst_3src_a1_src2_reg_file(devinfo
, inst
);
1275 } else if (brw_inst_3src_a1_src2_reg_file(devinfo
, inst
) ==
1276 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1277 _file
= BRW_GENERAL_REGISTER_FILE
;
1279 _file
= BRW_IMMEDIATE_VALUE
;
1280 uint16_t imm_val
= brw_inst_3src_a1_src2_imm(devinfo
, inst
);
1281 enum brw_reg_type type
= brw_inst_3src_a1_src2_type(devinfo
, inst
);
1283 if (type
== BRW_REGISTER_TYPE_W
) {
1284 format(file
, "%dW", imm_val
);
1285 } else if (type
== BRW_REGISTER_TYPE_UW
) {
1286 format(file
, "0x%04xUW", imm_val
);
1287 } else if (type
== BRW_REGISTER_TYPE_HF
) {
1288 format(file
, "0x%04xHF", imm_val
);
1293 reg_nr
= brw_inst_3src_src2_reg_nr(devinfo
, inst
);
1294 subreg_nr
= brw_inst_3src_a1_src2_subreg_nr(devinfo
, inst
);
1295 type
= brw_inst_3src_a1_src2_type(devinfo
, inst
);
1296 /* FINISHME: No vertical stride on src2. Is using the hstride in place
1297 * correct? Doesn't seem like it, since there's hstride=1 but
1300 _vert_stride
= vstride_from_align1_3src_hstride(
1301 brw_inst_3src_a1_src2_hstride(devinfo
, inst
));
1302 _horiz_stride
= hstride_from_align1_3src_hstride(
1303 brw_inst_3src_a1_src2_hstride(devinfo
, inst
));
1304 _width
= implied_width(_vert_stride
, _horiz_stride
);
1306 _file
= BRW_GENERAL_REGISTER_FILE
;
1307 reg_nr
= brw_inst_3src_src2_reg_nr(devinfo
, inst
);
1308 subreg_nr
= brw_inst_3src_a16_src2_subreg_nr(devinfo
, inst
) * 4;
1309 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1311 if (brw_inst_3src_a16_src2_rep_ctrl(devinfo
, inst
)) {
1312 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1313 _width
= BRW_WIDTH_1
;
1314 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1316 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1317 _width
= BRW_WIDTH_4
;
1318 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1321 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1322 _width
== BRW_WIDTH_1
&&
1323 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1325 subreg_nr
/= brw_reg_type_to_size(type
);
1327 err
|= control(file
, "negate", m_negate
,
1328 brw_inst_3src_src2_negate(devinfo
, inst
), NULL
);
1329 err
|= control(file
, "abs", _abs
, brw_inst_3src_src2_abs(devinfo
, inst
), NULL
);
1331 err
|= reg(file
, _file
, reg_nr
);
1334 if (subreg_nr
|| is_scalar_region
)
1335 format(file
, ".%d", subreg_nr
);
1336 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1337 if (!is_scalar_region
&& !is_align1
)
1338 err
|= src_swizzle(file
, brw_inst_3src_a16_src2_swizzle(devinfo
, inst
));
1339 string(file
, brw_reg_type_to_letters(type
));
1344 imm(FILE *file
, const struct gen_device_info
*devinfo
, enum brw_reg_type type
,
1345 const brw_inst
*inst
)
1348 case BRW_REGISTER_TYPE_UQ
:
1349 format(file
, "0x%016"PRIx64
"UQ", brw_inst_imm_uq(devinfo
, inst
));
1351 case BRW_REGISTER_TYPE_Q
:
1352 format(file
, "0x%016"PRIx64
"Q", brw_inst_imm_uq(devinfo
, inst
));
1354 case BRW_REGISTER_TYPE_UD
:
1355 format(file
, "0x%08xUD", brw_inst_imm_ud(devinfo
, inst
));
1357 case BRW_REGISTER_TYPE_D
:
1358 format(file
, "%dD", brw_inst_imm_d(devinfo
, inst
));
1360 case BRW_REGISTER_TYPE_UW
:
1361 format(file
, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo
, inst
));
1363 case BRW_REGISTER_TYPE_W
:
1364 format(file
, "%dW", (int16_t) brw_inst_imm_d(devinfo
, inst
));
1366 case BRW_REGISTER_TYPE_UV
:
1367 format(file
, "0x%08xUV", brw_inst_imm_ud(devinfo
, inst
));
1369 case BRW_REGISTER_TYPE_VF
:
1370 format(file
, "0x%"PRIx64
"VF", brw_inst_bits(inst
, 127, 96));
1372 format(file
, "/* [%-gF, %-gF, %-gF, %-gF]VF */",
1373 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
)),
1374 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 8),
1375 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 16),
1376 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 24));
1378 case BRW_REGISTER_TYPE_V
:
1379 format(file
, "0x%08xV", brw_inst_imm_ud(devinfo
, inst
));
1381 case BRW_REGISTER_TYPE_F
:
1382 /* The DIM instruction's src0 uses an F type but contains a
1385 if (brw_inst_opcode(devinfo
, inst
) == BRW_OPCODE_DIM
) {
1386 format(file
, "0x%"PRIx64
"F", brw_inst_bits(inst
, 127, 64));
1388 format(file
, "/* %-gF */", brw_inst_imm_df(devinfo
, inst
));
1390 format(file
, "0x%"PRIx64
"F", brw_inst_bits(inst
, 127, 96));
1392 format(file
, " /* %-gF */", brw_inst_imm_f(devinfo
, inst
));
1395 case BRW_REGISTER_TYPE_DF
:
1396 format(file
, "0x%016"PRIx64
"DF", brw_inst_bits(inst
, 127, 64));
1398 format(file
, "/* %-gDF */", brw_inst_imm_df(devinfo
, inst
));
1400 case BRW_REGISTER_TYPE_HF
:
1401 string(file
, "Half Float IMM");
1403 case BRW_REGISTER_TYPE_NF
:
1404 case BRW_REGISTER_TYPE_UB
:
1405 case BRW_REGISTER_TYPE_B
:
1406 format(file
, "*** invalid immediate type %d ", type
);
1412 src_sends_da(FILE *file
,
1413 const struct gen_device_info
*devinfo
,
1414 enum brw_reg_type type
,
1415 enum brw_reg_file _reg_file
,
1417 unsigned _reg_subnr
)
1421 err
|= reg(file
, _reg_file
, _reg_nr
);
1426 string(file
, brw_reg_type_to_letters(type
));
1432 src_sends_ia(FILE *file
,
1433 const struct gen_device_info
*devinfo
,
1434 enum brw_reg_type type
,
1436 unsigned _addr_subreg_nr
)
1438 string(file
, "g[a0");
1439 if (_addr_subreg_nr
)
1442 format(file
, " %d", _addr_imm
);
1444 string(file
, brw_reg_type_to_letters(type
));
1450 src_send_desc_ia(FILE *file
,
1451 const struct gen_device_info
*devinfo
,
1452 unsigned _addr_subreg_nr
)
1455 if (_addr_subreg_nr
)
1456 format(file
, ".%d", _addr_subreg_nr
);
1457 format(file
, "<0>UD");
1463 src0(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1465 if (is_split_send(devinfo
, brw_inst_opcode(devinfo
, inst
))) {
1466 if (devinfo
->gen
>= 12) {
1467 return src_sends_da(file
,
1469 BRW_REGISTER_TYPE_UD
,
1470 brw_inst_send_src0_reg_file(devinfo
, inst
),
1471 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1473 } else if (brw_inst_send_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1474 return src_sends_da(file
,
1476 BRW_REGISTER_TYPE_UD
,
1477 BRW_GENERAL_REGISTER_FILE
,
1478 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1479 brw_inst_src0_da16_subreg_nr(devinfo
, inst
));
1481 return src_sends_ia(file
,
1483 BRW_REGISTER_TYPE_UD
,
1484 brw_inst_send_src0_ia16_addr_imm(devinfo
, inst
),
1485 brw_inst_src0_ia_subreg_nr(devinfo
, inst
));
1487 } else if (brw_inst_src0_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1488 return imm(file
, devinfo
, brw_inst_src0_type(devinfo
, inst
), inst
);
1489 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1490 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1491 return src_da1(file
,
1493 brw_inst_opcode(devinfo
, inst
),
1494 brw_inst_src0_type(devinfo
, inst
),
1495 brw_inst_src0_reg_file(devinfo
, inst
),
1496 brw_inst_src0_vstride(devinfo
, inst
),
1497 brw_inst_src0_width(devinfo
, inst
),
1498 brw_inst_src0_hstride(devinfo
, inst
),
1499 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1500 brw_inst_src0_da1_subreg_nr(devinfo
, inst
),
1501 brw_inst_src0_abs(devinfo
, inst
),
1502 brw_inst_src0_negate(devinfo
, inst
));
1504 return src_ia1(file
,
1506 brw_inst_opcode(devinfo
, inst
),
1507 brw_inst_src0_type(devinfo
, inst
),
1508 brw_inst_src0_ia1_addr_imm(devinfo
, inst
),
1509 brw_inst_src0_ia_subreg_nr(devinfo
, inst
),
1510 brw_inst_src0_negate(devinfo
, inst
),
1511 brw_inst_src0_abs(devinfo
, inst
),
1512 brw_inst_src0_hstride(devinfo
, inst
),
1513 brw_inst_src0_width(devinfo
, inst
),
1514 brw_inst_src0_vstride(devinfo
, inst
));
1517 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1518 return src_da16(file
,
1520 brw_inst_opcode(devinfo
, inst
),
1521 brw_inst_src0_type(devinfo
, inst
),
1522 brw_inst_src0_reg_file(devinfo
, inst
),
1523 brw_inst_src0_vstride(devinfo
, inst
),
1524 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1525 brw_inst_src0_da16_subreg_nr(devinfo
, inst
),
1526 brw_inst_src0_abs(devinfo
, inst
),
1527 brw_inst_src0_negate(devinfo
, inst
),
1528 brw_inst_src0_da16_swiz_x(devinfo
, inst
),
1529 brw_inst_src0_da16_swiz_y(devinfo
, inst
),
1530 brw_inst_src0_da16_swiz_z(devinfo
, inst
),
1531 brw_inst_src0_da16_swiz_w(devinfo
, inst
));
1533 string(file
, "Indirect align16 address mode not supported");
1540 src1(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1542 if (is_split_send(devinfo
, brw_inst_opcode(devinfo
, inst
))) {
1543 return src_sends_da(file
,
1545 BRW_REGISTER_TYPE_UD
,
1546 brw_inst_send_src1_reg_file(devinfo
, inst
),
1547 brw_inst_send_src1_reg_nr(devinfo
, inst
),
1549 } else if (brw_inst_src1_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1550 return imm(file
, devinfo
, brw_inst_src1_type(devinfo
, inst
), inst
);
1551 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1552 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1553 return src_da1(file
,
1555 brw_inst_opcode(devinfo
, inst
),
1556 brw_inst_src1_type(devinfo
, inst
),
1557 brw_inst_src1_reg_file(devinfo
, inst
),
1558 brw_inst_src1_vstride(devinfo
, inst
),
1559 brw_inst_src1_width(devinfo
, inst
),
1560 brw_inst_src1_hstride(devinfo
, inst
),
1561 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1562 brw_inst_src1_da1_subreg_nr(devinfo
, inst
),
1563 brw_inst_src1_abs(devinfo
, inst
),
1564 brw_inst_src1_negate(devinfo
, inst
));
1566 return src_ia1(file
,
1568 brw_inst_opcode(devinfo
, inst
),
1569 brw_inst_src1_type(devinfo
, inst
),
1570 brw_inst_src1_ia1_addr_imm(devinfo
, inst
),
1571 brw_inst_src1_ia_subreg_nr(devinfo
, inst
),
1572 brw_inst_src1_negate(devinfo
, inst
),
1573 brw_inst_src1_abs(devinfo
, inst
),
1574 brw_inst_src1_hstride(devinfo
, inst
),
1575 brw_inst_src1_width(devinfo
, inst
),
1576 brw_inst_src1_vstride(devinfo
, inst
));
1579 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1580 return src_da16(file
,
1582 brw_inst_opcode(devinfo
, inst
),
1583 brw_inst_src1_type(devinfo
, inst
),
1584 brw_inst_src1_reg_file(devinfo
, inst
),
1585 brw_inst_src1_vstride(devinfo
, inst
),
1586 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1587 brw_inst_src1_da16_subreg_nr(devinfo
, inst
),
1588 brw_inst_src1_abs(devinfo
, inst
),
1589 brw_inst_src1_negate(devinfo
, inst
),
1590 brw_inst_src1_da16_swiz_x(devinfo
, inst
),
1591 brw_inst_src1_da16_swiz_y(devinfo
, inst
),
1592 brw_inst_src1_da16_swiz_z(devinfo
, inst
),
1593 brw_inst_src1_da16_swiz_w(devinfo
, inst
));
1595 string(file
, "Indirect align16 address mode not supported");
1602 qtr_ctrl(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1604 int qtr_ctl
= brw_inst_qtr_control(devinfo
, inst
);
1605 int exec_size
= 1 << brw_inst_exec_size(devinfo
, inst
);
1606 const unsigned nib_ctl
= devinfo
->gen
< 7 ? 0 :
1607 brw_inst_nib_control(devinfo
, inst
);
1609 if (exec_size
< 8 || nib_ctl
) {
1610 format(file
, " %dN", qtr_ctl
* 2 + nib_ctl
+ 1);
1611 } else if (exec_size
== 8) {
1614 string(file
, " 1Q");
1617 string(file
, " 2Q");
1620 string(file
, " 3Q");
1623 string(file
, " 4Q");
1626 } else if (exec_size
== 16) {
1628 string(file
, " 1H");
1630 string(file
, " 2H");
1636 swsb(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1638 const struct tgl_swsb swsb
= tgl_swsb_decode(brw_inst_opcode(devinfo
, inst
),
1639 brw_inst_swsb(devinfo
, inst
));
1641 format(file
, " @%d", swsb
.regdist
);
1643 format(file
, " $%d%s", swsb
.sbid
,
1644 (swsb
.mode
& TGL_SBID_SET
? "" :
1645 swsb
.mode
& TGL_SBID_DST
? ".dst" : ".src"));
1650 static __attribute__((__unused__
)) int
1651 brw_disassemble_imm(const struct gen_device_info
*devinfo
,
1652 uint32_t dw3
, uint32_t dw2
, uint32_t dw1
, uint32_t dw0
)
1655 inst
.data
[0] = (((uint64_t) dw1
) << 32) | ((uint64_t) dw0
);
1656 inst
.data
[1] = (((uint64_t) dw3
) << 32) | ((uint64_t) dw2
);
1657 return brw_disassemble_inst(stderr
, devinfo
, &inst
, false, 0, NULL
);
1662 write_label(FILE *file
, const struct gen_device_info
*devinfo
,
1663 const struct brw_label
*root_label
,
1664 int offset
, int jump
)
1666 if (root_label
!= NULL
) {
1667 int to_bytes_scale
= sizeof(brw_inst
) / brw_jump_scale(devinfo
);
1668 const struct brw_label
*label
=
1669 brw_find_label(root_label
, offset
+ jump
* to_bytes_scale
);
1670 if (label
!= NULL
) {
1671 format(file
, " LABEL%d", label
->number
);
1677 brw_disassemble_inst(FILE *file
, const struct gen_device_info
*devinfo
,
1678 const brw_inst
*inst
, bool is_compacted
,
1679 int offset
, const struct brw_label
*root_label
)
1684 const enum opcode opcode
= brw_inst_opcode(devinfo
, inst
);
1685 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, opcode
);
1687 if (brw_inst_pred_control(devinfo
, inst
)) {
1689 err
|= control(file
, "predicate inverse", pred_inv
,
1690 brw_inst_pred_inv(devinfo
, inst
), NULL
);
1691 format(file
, "f%"PRIu64
".%"PRIu64
,
1692 devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0,
1693 brw_inst_flag_subreg_nr(devinfo
, inst
));
1694 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1695 err
|= control(file
, "predicate control align1", pred_ctrl_align1
,
1696 brw_inst_pred_control(devinfo
, inst
), NULL
);
1698 err
|= control(file
, "predicate control align16", pred_ctrl_align16
,
1699 brw_inst_pred_control(devinfo
, inst
), NULL
);
1704 err
|= print_opcode(file
, devinfo
, opcode
);
1706 if (!is_send(opcode
))
1707 err
|= control(file
, "saturate", saturate
, brw_inst_saturate(devinfo
, inst
),
1710 err
|= control(file
, "debug control", debug_ctrl
,
1711 brw_inst_debug_control(devinfo
, inst
), NULL
);
1713 if (opcode
== BRW_OPCODE_MATH
) {
1715 err
|= control(file
, "function", math_function
,
1716 brw_inst_math_function(devinfo
, inst
), NULL
);
1718 } else if (opcode
== BRW_OPCODE_SYNC
) {
1720 err
|= control(file
, "function", sync_function
,
1721 brw_inst_cond_modifier(devinfo
, inst
), NULL
);
1723 } else if (!is_send(opcode
)) {
1724 err
|= control(file
, "conditional modifier", conditional_modifier
,
1725 brw_inst_cond_modifier(devinfo
, inst
), NULL
);
1727 /* If we're using the conditional modifier, print which flags reg is
1728 * used for it. Note that on gen6+, the embedded-condition SEL and
1729 * control flow doesn't update flags.
1731 if (brw_inst_cond_modifier(devinfo
, inst
) &&
1732 (devinfo
->gen
< 6 || (opcode
!= BRW_OPCODE_SEL
&&
1733 opcode
!= BRW_OPCODE_CSEL
&&
1734 opcode
!= BRW_OPCODE_IF
&&
1735 opcode
!= BRW_OPCODE_WHILE
))) {
1736 format(file
, ".f%"PRIu64
".%"PRIu64
,
1737 devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0,
1738 brw_inst_flag_subreg_nr(devinfo
, inst
));
1742 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1744 err
|= control(file
, "execution size", exec_size
,
1745 brw_inst_exec_size(devinfo
, inst
), NULL
);
1749 if (opcode
== BRW_OPCODE_SEND
&& devinfo
->gen
< 6)
1750 format(file
, " %"PRIu64
, brw_inst_base_mrf(devinfo
, inst
));
1752 if (brw_has_uip(devinfo
, opcode
)) {
1753 /* Instructions that have UIP also have JIP. */
1755 string(file
, "JIP: ");
1756 write_label(file
, devinfo
, root_label
, offset
, brw_inst_jip(devinfo
, inst
));
1759 string(file
, "UIP: ");
1760 write_label(file
, devinfo
, root_label
, offset
, brw_inst_uip(devinfo
, inst
));
1761 } else if (brw_has_jip(devinfo
, opcode
)) {
1763 if (devinfo
->gen
>= 7) {
1764 jip
= brw_inst_jip(devinfo
, inst
);
1766 jip
= brw_inst_gen6_jump_count(devinfo
, inst
);
1770 string(file
, "JIP: ");
1771 write_label(file
, devinfo
, root_label
, offset
, jip
);
1772 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_BREAK
||
1773 opcode
== BRW_OPCODE_CONTINUE
||
1774 opcode
== BRW_OPCODE_ELSE
)) {
1776 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1778 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1779 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_IF
||
1780 opcode
== BRW_OPCODE_IFF
||
1781 opcode
== BRW_OPCODE_HALT
||
1782 opcode
== BRW_OPCODE_WHILE
)) {
1784 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1785 } else if (devinfo
->gen
< 6 && opcode
== BRW_OPCODE_ENDIF
) {
1787 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1788 } else if (opcode
== BRW_OPCODE_JMPI
) {
1790 err
|= src1(file
, devinfo
, inst
);
1791 } else if (desc
&& desc
->nsrc
== 3) {
1793 err
|= dest_3src(file
, devinfo
, inst
);
1796 err
|= src0_3src(file
, devinfo
, inst
);
1799 err
|= src1_3src(file
, devinfo
, inst
);
1802 err
|= src2_3src(file
, devinfo
, inst
);
1804 if (desc
->ndst
> 0) {
1806 err
|= dest(file
, devinfo
, inst
);
1809 if (desc
->nsrc
> 0) {
1811 err
|= src0(file
, devinfo
, inst
);
1814 if (desc
->nsrc
> 1) {
1816 err
|= src1(file
, devinfo
, inst
);
1820 if (is_send(opcode
)) {
1821 enum brw_message_target sfid
= brw_inst_sfid(devinfo
, inst
);
1823 bool has_imm_desc
= false, has_imm_ex_desc
= false;
1824 uint32_t imm_desc
= 0, imm_ex_desc
= 0;
1825 if (is_split_send(devinfo
, opcode
)) {
1827 if (brw_inst_send_sel_reg32_desc(devinfo
, inst
)) {
1828 /* show the indirect descriptor source */
1829 err
|= src_send_desc_ia(file
, devinfo
, 0);
1831 has_imm_desc
= true;
1832 imm_desc
= brw_inst_send_desc(devinfo
, inst
);
1833 fprintf(file
, "0x%08"PRIx32
, imm_desc
);
1837 if (brw_inst_send_sel_reg32_ex_desc(devinfo
, inst
)) {
1838 /* show the indirect descriptor source */
1839 err
|= src_send_desc_ia(file
, devinfo
,
1840 brw_inst_send_ex_desc_ia_subreg_nr(devinfo
, inst
));
1842 has_imm_ex_desc
= true;
1843 imm_ex_desc
= brw_inst_sends_ex_desc(devinfo
, inst
);
1844 fprintf(file
, "0x%08"PRIx32
, imm_ex_desc
);
1847 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1848 /* show the indirect descriptor source */
1850 err
|= src1(file
, devinfo
, inst
);
1853 has_imm_desc
= true;
1854 imm_desc
= brw_inst_send_desc(devinfo
, inst
);
1858 /* Print message descriptor as immediate source */
1859 fprintf(file
, "0x%08"PRIx64
, inst
->data
[1] >> 32);
1867 err
|= control(file
, "SFID", devinfo
->gen
>= 6 ? gen6_sfid
: gen4_sfid
,
1869 string(file
, " MsgDesc:");
1871 if (!has_imm_desc
) {
1872 format(file
, " indirect");
1876 err
|= control(file
, "math function", math_function
,
1877 brw_inst_math_msg_function(devinfo
, inst
), &space
);
1878 err
|= control(file
, "math saturate", math_saturate
,
1879 brw_inst_math_msg_saturate(devinfo
, inst
), &space
);
1880 err
|= control(file
, "math signed", math_signed
,
1881 brw_inst_math_msg_signed_int(devinfo
, inst
), &space
);
1882 err
|= control(file
, "math scalar", math_scalar
,
1883 brw_inst_math_msg_data_type(devinfo
, inst
), &space
);
1884 err
|= control(file
, "math precision", math_precision
,
1885 brw_inst_math_msg_precision(devinfo
, inst
), &space
);
1887 case BRW_SFID_SAMPLER
:
1888 if (devinfo
->gen
>= 5) {
1889 err
|= control(file
, "sampler message", gen5_sampler_msg_type
,
1890 brw_sampler_desc_msg_type(devinfo
, imm_desc
),
1892 err
|= control(file
, "sampler simd mode", gen5_sampler_simd_mode
,
1893 brw_sampler_desc_simd_mode(devinfo
, imm_desc
),
1895 format(file
, " Surface = %u Sampler = %u",
1896 brw_sampler_desc_binding_table_index(devinfo
, imm_desc
),
1897 brw_sampler_desc_sampler(devinfo
, imm_desc
));
1899 format(file
, " (%u, %u, %u, ",
1900 brw_sampler_desc_binding_table_index(devinfo
, imm_desc
),
1901 brw_sampler_desc_sampler(devinfo
, imm_desc
),
1902 brw_sampler_desc_msg_type(devinfo
, imm_desc
));
1903 if (!devinfo
->is_g4x
) {
1904 err
|= control(file
, "sampler target format",
1905 sampler_target_format
,
1906 brw_sampler_desc_return_format(devinfo
, imm_desc
),
1912 case GEN6_SFID_DATAPORT_SAMPLER_CACHE
:
1913 case GEN6_SFID_DATAPORT_CONSTANT_CACHE
:
1914 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1915 if (devinfo
->gen
>= 6) {
1916 format(file
, " (%u, %u, %u, %u)",
1917 brw_dp_desc_binding_table_index(devinfo
, imm_desc
),
1918 brw_dp_desc_msg_control(devinfo
, imm_desc
),
1919 brw_dp_desc_msg_type(devinfo
, imm_desc
),
1920 devinfo
->gen
>= 7 ? 0u :
1921 brw_dp_write_desc_write_commit(devinfo
, imm_desc
));
1923 bool is_965
= devinfo
->gen
== 4 && !devinfo
->is_g4x
;
1924 err
|= control(file
, "DP read message type",
1925 is_965
? gen4_dp_read_port_msg_type
:
1926 g45_dp_read_port_msg_type
,
1927 brw_dp_read_desc_msg_type(devinfo
, imm_desc
),
1930 format(file
, " MsgCtrl = 0x%u",
1931 brw_dp_read_desc_msg_control(devinfo
, imm_desc
));
1933 format(file
, " Surface = %u",
1934 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
1938 case GEN6_SFID_DATAPORT_RENDER_CACHE
: {
1939 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1940 unsigned msg_type
= brw_dp_write_desc_msg_type(devinfo
, imm_desc
);
1942 err
|= control(file
, "DP rc message type",
1943 dp_rc_msg_type(devinfo
), msg_type
, &space
);
1945 bool is_rt_write
= msg_type
==
1946 (devinfo
->gen
>= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1947 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
);
1950 err
|= control(file
, "RT message type", m_rt_write_subtype
,
1951 brw_inst_rt_message_type(devinfo
, inst
), &space
);
1952 if (devinfo
->gen
>= 6 && brw_inst_rt_slot_group(devinfo
, inst
))
1953 string(file
, " Hi");
1954 if (brw_dp_write_desc_last_render_target(devinfo
, imm_desc
))
1955 string(file
, " LastRT");
1956 if (devinfo
->gen
< 7 &&
1957 brw_dp_write_desc_write_commit(devinfo
, imm_desc
))
1958 string(file
, " WriteCommit");
1960 format(file
, " MsgCtrl = 0x%u",
1961 brw_dp_write_desc_msg_control(devinfo
, imm_desc
));
1964 format(file
, " Surface = %u",
1965 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
1969 case BRW_SFID_URB
: {
1970 unsigned opcode
= brw_inst_urb_opcode(devinfo
, inst
);
1972 format(file
, " %"PRIu64
, brw_inst_urb_global_offset(devinfo
, inst
));
1976 err
|= control(file
, "urb opcode",
1977 devinfo
->gen
>= 7 ? gen7_urb_opcode
1981 if (devinfo
->gen
>= 7 &&
1982 brw_inst_urb_per_slot_offset(devinfo
, inst
)) {
1983 string(file
, " per-slot");
1986 if (opcode
== GEN8_URB_OPCODE_SIMD8_WRITE
||
1987 opcode
== GEN8_URB_OPCODE_SIMD8_READ
) {
1988 if (brw_inst_urb_channel_mask_present(devinfo
, inst
))
1989 string(file
, " masked");
1991 err
|= control(file
, "urb swizzle", urb_swizzle
,
1992 brw_inst_urb_swizzle_control(devinfo
, inst
),
1996 if (devinfo
->gen
< 7) {
1997 err
|= control(file
, "urb allocate", urb_allocate
,
1998 brw_inst_urb_allocate(devinfo
, inst
), &space
);
1999 err
|= control(file
, "urb used", urb_used
,
2000 brw_inst_urb_used(devinfo
, inst
), &space
);
2002 if (devinfo
->gen
< 8) {
2003 err
|= control(file
, "urb complete", urb_complete
,
2004 brw_inst_urb_complete(devinfo
, inst
), &space
);
2008 case BRW_SFID_THREAD_SPAWNER
:
2011 case BRW_SFID_MESSAGE_GATEWAY
:
2012 format(file
, " (%s)",
2013 gen7_gateway_subfuncid
[brw_inst_gateway_subfuncid(devinfo
, inst
)]);
2016 case GEN7_SFID_DATAPORT_DATA_CACHE
:
2017 if (devinfo
->gen
>= 7) {
2020 err
|= control(file
, "DP DC0 message type",
2021 dp_dc0_msg_type_gen7
,
2022 brw_dp_desc_msg_type(devinfo
, imm_desc
), &space
);
2024 format(file
, ", %u, ",
2025 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
2027 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
2028 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
:
2029 control(file
, "atomic op", aop
,
2030 brw_dp_desc_msg_control(devinfo
, imm_desc
) & 0xf,
2035 brw_dp_desc_msg_control(devinfo
, imm_desc
));
2042 case HSW_SFID_DATAPORT_DATA_CACHE_1
: {
2043 if (devinfo
->gen
>= 7) {
2046 unsigned msg_ctrl
= brw_dp_desc_msg_control(devinfo
, imm_desc
);
2048 err
|= control(file
, "DP DC1 message type",
2049 dp_dc1_msg_type_hsw
,
2050 brw_dp_desc_msg_type(devinfo
, imm_desc
), &space
);
2052 format(file
, ", Surface = %u, ",
2053 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
2055 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
2056 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
:
2057 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
:
2058 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
:
2059 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
2061 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
:
2062 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
:
2063 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
:
2064 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP
:
2065 control(file
, "atomic op", aop
, msg_ctrl
& 0xf, &space
);
2067 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
:
2068 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
:
2069 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
:
2070 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
:
2071 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE
:
2072 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ
: {
2073 static const char *simd_modes
[] = { "4x2", "16", "8" };
2074 format(file
, "SIMD%s, Mask = 0x%x",
2075 simd_modes
[msg_ctrl
>> 4], msg_ctrl
& 0xf);
2078 case GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP
:
2079 case GEN9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP
:
2080 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
2081 control(file
, "atomic float op", aop_float
, msg_ctrl
& 0xf,
2085 format(file
, "0x%x", msg_ctrl
);
2093 case GEN7_SFID_PIXEL_INTERPOLATOR
:
2094 if (devinfo
->gen
>= 7) {
2095 format(file
, " (%s, %s, 0x%02"PRIx64
")",
2096 brw_inst_pi_nopersp(devinfo
, inst
) ? "linear" : "persp",
2097 pixel_interpolator_msg_types
[brw_inst_pi_message_type(devinfo
, inst
)],
2098 brw_inst_pi_message_data(devinfo
, inst
));
2104 format(file
, "unsupported shared function ID %d", sfid
);
2112 format(file
, "mlen %u", brw_message_desc_mlen(devinfo
, imm_desc
));
2113 if (has_imm_ex_desc
) {
2114 format(file
, " ex_mlen %u",
2115 brw_message_ex_desc_ex_mlen(devinfo
, imm_ex_desc
));
2118 format(file
, " rlen %u", brw_message_desc_rlen(devinfo
, imm_desc
));
2121 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
2124 err
|= control(file
, "access mode", access_mode
,
2125 brw_inst_access_mode(devinfo
, inst
), &space
);
2126 if (devinfo
->gen
>= 6) {
2127 err
|= control(file
, "write enable control", wectrl
,
2128 brw_inst_mask_control(devinfo
, inst
), &space
);
2130 err
|= control(file
, "mask control", mask_ctrl
,
2131 brw_inst_mask_control(devinfo
, inst
), &space
);
2134 if (devinfo
->gen
< 12) {
2135 err
|= control(file
, "dependency control", dep_ctrl
,
2136 ((brw_inst_no_dd_check(devinfo
, inst
) << 1) |
2137 brw_inst_no_dd_clear(devinfo
, inst
)), &space
);
2140 if (devinfo
->gen
>= 6)
2141 err
|= qtr_ctrl(file
, devinfo
, inst
);
2143 if (brw_inst_qtr_control(devinfo
, inst
) == BRW_COMPRESSION_COMPRESSED
&&
2144 desc
&& desc
->ndst
> 0 &&
2145 brw_inst_dst_reg_file(devinfo
, inst
) == BRW_MESSAGE_REGISTER_FILE
&&
2146 brw_inst_dst_da_reg_nr(devinfo
, inst
) & BRW_MRF_COMPR4
) {
2147 format(file
, " compr4");
2149 err
|= control(file
, "compression control", compr_ctrl
,
2150 brw_inst_qtr_control(devinfo
, inst
), &space
);
2154 if (devinfo
->gen
>= 12)
2155 err
|= swsb(file
, devinfo
, inst
);
2157 err
|= control(file
, "compaction", cmpt_ctrl
, is_compacted
, &space
);
2158 err
|= control(file
, "thread control", thread_ctrl
,
2159 (devinfo
->gen
>= 12 ? brw_inst_atomic_control(devinfo
, inst
) :
2160 brw_inst_thread_control(devinfo
, inst
)),
2162 if (has_branch_ctrl(devinfo
, opcode
)) {
2163 err
|= control(file
, "branch ctrl", branch_ctrl
,
2164 brw_inst_branch_control(devinfo
, inst
), &space
);
2165 } else if (devinfo
->gen
>= 6) {
2166 err
|= control(file
, "acc write control", accwr
,
2167 brw_inst_acc_wr_control(devinfo
, inst
), &space
);
2169 if (is_send(opcode
))
2170 err
|= control(file
, "end of thread", end_of_thread
,
2171 brw_inst_eot(devinfo
, inst
), &space
);