2 * Copyright © 2008 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
27 #include "brw_eu_defines.h"
29 #include "brw_shader.h"
33 #include "util/half_float.h"
36 has_jip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
41 return opcode
== BRW_OPCODE_IF
||
42 opcode
== BRW_OPCODE_ELSE
||
43 opcode
== BRW_OPCODE_ENDIF
||
44 opcode
== BRW_OPCODE_WHILE
||
45 opcode
== BRW_OPCODE_BREAK
||
46 opcode
== BRW_OPCODE_CONTINUE
||
47 opcode
== BRW_OPCODE_HALT
;
51 has_uip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
56 return (devinfo
->gen
>= 7 && opcode
== BRW_OPCODE_IF
) ||
57 (devinfo
->gen
>= 8 && opcode
== BRW_OPCODE_ELSE
) ||
58 opcode
== BRW_OPCODE_BREAK
||
59 opcode
== BRW_OPCODE_CONTINUE
||
60 opcode
== BRW_OPCODE_HALT
;
64 has_branch_ctrl(const struct gen_device_info
*devinfo
, enum opcode opcode
)
69 return opcode
== BRW_OPCODE_IF
||
70 opcode
== BRW_OPCODE_ELSE
;
71 /* opcode == BRW_OPCODE_GOTO; */
75 is_logic_instruction(unsigned opcode
)
77 return opcode
== BRW_OPCODE_AND
||
78 opcode
== BRW_OPCODE_NOT
||
79 opcode
== BRW_OPCODE_OR
||
80 opcode
== BRW_OPCODE_XOR
;
84 is_send(unsigned opcode
)
86 return opcode
== BRW_OPCODE_SEND
||
87 opcode
== BRW_OPCODE_SENDC
||
88 opcode
== BRW_OPCODE_SENDS
||
89 opcode
== BRW_OPCODE_SENDSC
;
93 is_split_send(UNUSED
const struct gen_device_info
*devinfo
, unsigned opcode
)
95 return opcode
== BRW_OPCODE_SENDS
||
96 opcode
== BRW_OPCODE_SENDSC
;
99 const char *const conditional_modifier
[16] = {
100 [BRW_CONDITIONAL_NONE
] = "",
101 [BRW_CONDITIONAL_Z
] = ".z",
102 [BRW_CONDITIONAL_NZ
] = ".nz",
103 [BRW_CONDITIONAL_G
] = ".g",
104 [BRW_CONDITIONAL_GE
] = ".ge",
105 [BRW_CONDITIONAL_L
] = ".l",
106 [BRW_CONDITIONAL_LE
] = ".le",
107 [BRW_CONDITIONAL_R
] = ".r",
108 [BRW_CONDITIONAL_O
] = ".o",
109 [BRW_CONDITIONAL_U
] = ".u",
112 static const char *const m_negate
[2] = {
117 static const char *const _abs
[2] = {
122 static const char *const m_bitnot
[2] = { "", "~" };
124 static const char *const vert_stride
[16] = {
135 static const char *const width
[8] = {
143 static const char *const horiz_stride
[4] = {
150 static const char *const chan_sel
[4] = {
157 static const char *const debug_ctrl
[2] = {
162 static const char *const saturate
[2] = {
167 static const char *const cmpt_ctrl
[2] = {
172 static const char *const accwr
[2] = {
177 static const char *const branch_ctrl
[2] = {
182 static const char *const wectrl
[2] = {
187 static const char *const exec_size
[8] = {
196 static const char *const pred_inv
[2] = {
201 const char *const pred_ctrl_align16
[16] = {
211 static const char *const pred_ctrl_align1
[16] = {
212 [BRW_PREDICATE_NORMAL
] = "",
213 [BRW_PREDICATE_ALIGN1_ANYV
] = ".anyv",
214 [BRW_PREDICATE_ALIGN1_ALLV
] = ".allv",
215 [BRW_PREDICATE_ALIGN1_ANY2H
] = ".any2h",
216 [BRW_PREDICATE_ALIGN1_ALL2H
] = ".all2h",
217 [BRW_PREDICATE_ALIGN1_ANY4H
] = ".any4h",
218 [BRW_PREDICATE_ALIGN1_ALL4H
] = ".all4h",
219 [BRW_PREDICATE_ALIGN1_ANY8H
] = ".any8h",
220 [BRW_PREDICATE_ALIGN1_ALL8H
] = ".all8h",
221 [BRW_PREDICATE_ALIGN1_ANY16H
] = ".any16h",
222 [BRW_PREDICATE_ALIGN1_ALL16H
] = ".all16h",
223 [BRW_PREDICATE_ALIGN1_ANY32H
] = ".any32h",
224 [BRW_PREDICATE_ALIGN1_ALL32H
] = ".all32h",
227 static const char *const thread_ctrl
[4] = {
228 [BRW_THREAD_NORMAL
] = "",
229 [BRW_THREAD_ATOMIC
] = "atomic",
230 [BRW_THREAD_SWITCH
] = "switch",
233 static const char *const compr_ctrl
[4] = {
240 static const char *const dep_ctrl
[4] = {
244 [3] = "NoDDClr,NoDDChk",
247 static const char *const mask_ctrl
[4] = {
252 static const char *const access_mode
[2] = {
257 static const char *const reg_file
[4] = {
264 static const char *const writemask
[16] = {
283 static const char *const end_of_thread
[2] = {
288 /* SFIDs on Gen4-5 */
289 static const char *const gen4_sfid
[16] = {
290 [BRW_SFID_NULL
] = "null",
291 [BRW_SFID_MATH
] = "math",
292 [BRW_SFID_SAMPLER
] = "sampler",
293 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
294 [BRW_SFID_DATAPORT_READ
] = "read",
295 [BRW_SFID_DATAPORT_WRITE
] = "write",
296 [BRW_SFID_URB
] = "urb",
297 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
298 [BRW_SFID_VME
] = "vme",
301 static const char *const gen6_sfid
[16] = {
302 [BRW_SFID_NULL
] = "null",
303 [BRW_SFID_MATH
] = "math",
304 [BRW_SFID_SAMPLER
] = "sampler",
305 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
306 [BRW_SFID_URB
] = "urb",
307 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
308 [GEN6_SFID_DATAPORT_SAMPLER_CACHE
] = "dp_sampler",
309 [GEN6_SFID_DATAPORT_RENDER_CACHE
] = "render",
310 [GEN6_SFID_DATAPORT_CONSTANT_CACHE
] = "const",
311 [GEN7_SFID_DATAPORT_DATA_CACHE
] = "data",
312 [GEN7_SFID_PIXEL_INTERPOLATOR
] = "pixel interp",
313 [HSW_SFID_DATAPORT_DATA_CACHE_1
] = "dp data 1",
314 [HSW_SFID_CRE
] = "cre",
317 static const char *const gen7_gateway_subfuncid
[8] = {
318 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY
] = "open",
319 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY
] = "close",
320 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG
] = "forward msg",
321 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP
] = "get timestamp",
322 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG
] = "barrier msg",
323 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE
] = "update state",
324 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE
] = "mmio read/write",
327 static const char *const gen4_dp_read_port_msg_type
[4] = {
328 [0b00] = "OWord Block Read",
329 [0b01] = "OWord Dual Block Read",
330 [0b10] = "Media Block Read",
331 [0b11] = "DWord Scattered Read",
334 static const char *const g45_dp_read_port_msg_type
[8] = {
335 [0b000] = "OWord Block Read",
336 [0b010] = "OWord Dual Block Read",
337 [0b100] = "Media Block Read",
338 [0b110] = "DWord Scattered Read",
339 [0b001] = "Render Target UNORM Read",
340 [0b011] = "AVC Loop Filter Read",
343 static const char *const dp_write_port_msg_type
[8] = {
344 [0b000] = "OWord block write",
345 [0b001] = "OWord dual block write",
346 [0b010] = "media block write",
347 [0b011] = "DWord scattered write",
348 [0b100] = "RT write",
349 [0b101] = "streamed VB write",
350 [0b110] = "RT UNORM write", /* G45+ */
351 [0b111] = "flush render cache",
354 static const char *const dp_rc_msg_type_gen6
[16] = {
355 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ
] = "OWORD block read",
356 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ
] = "RT UNORM read",
357 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ
] = "OWORD dual block read",
358 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ
] = "media block read",
359 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ
] =
360 "OWORD unaligned block read",
361 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ
] = "DWORD scattered read",
362 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE
] = "DWORD atomic write",
363 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE
] = "OWORD block write",
364 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE
] =
365 "OWORD dual block write",
366 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE
] = "media block write",
367 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE
] =
368 "DWORD scattered write",
369 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
] = "RT write",
370 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE
] = "streamed VB write",
371 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE
] = "RT UNORM write",
374 static const char *const dp_rc_msg_type_gen7
[16] = {
375 [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ
] = "media block read",
376 [GEN7_DATAPORT_RC_TYPED_SURFACE_READ
] = "typed surface read",
377 [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP
] = "typed atomic op",
378 [GEN7_DATAPORT_RC_MEMORY_FENCE
] = "memory fence",
379 [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE
] = "media block write",
380 [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
381 [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE
] = "typed surface write"
384 static const char *const dp_rc_msg_type_gen9
[16] = {
385 [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
386 [GEN9_DATAPORT_RC_RENDER_TARGET_READ
] = "RT read"
389 static const char *const *
390 dp_rc_msg_type(const struct gen_device_info
*devinfo
)
392 return (devinfo
->gen
>= 9 ? dp_rc_msg_type_gen9
:
393 devinfo
->gen
>= 7 ? dp_rc_msg_type_gen7
:
394 devinfo
->gen
>= 6 ? dp_rc_msg_type_gen6
:
395 dp_write_port_msg_type
);
398 static const char *const m_rt_write_subtype
[] = {
400 [0b001] = "SIMD16/RepData",
401 [0b010] = "SIMD8/DualSrcLow",
402 [0b011] = "SIMD8/DualSrcHigh",
404 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
405 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
408 static const char *const dp_dc0_msg_type_gen7
[16] = {
409 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ
] = "DC OWORD block read",
410 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ
] =
411 "DC unaligned OWORD block read",
412 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ
] = "DC OWORD dual block read",
413 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ
] = "DC DWORD scattered read",
414 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ
] = "DC byte scattered read",
415 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ
] = "DC untyped surface read",
416 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
] = "DC untyped atomic",
417 [GEN7_DATAPORT_DC_MEMORY_FENCE
] = "DC mfence",
418 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE
] = "DC OWORD block write",
419 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE
] = "DC OWORD dual block write",
420 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE
] = "DC DWORD scatterd write",
421 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE
] = "DC byte scattered write",
422 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
425 static const char *const dp_dc1_msg_type_hsw
[32] = {
426 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
] = "untyped surface read",
427 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
] = "DC untyped atomic op",
428 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
] =
429 "DC untyped 4x2 atomic op",
430 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ
] = "DC media block read",
431 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
] = "DC typed surface read",
432 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
] = "DC typed atomic",
433 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
] = "DC typed 4x2 atomic op",
434 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
435 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE
] = "DC media block write",
436 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
] = "DC atomic counter op",
437 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
] =
438 "DC 4x2 atomic counter op",
439 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
] = "DC typed surface write",
440 [GEN9_DATAPORT_DC_PORT1_A64_SCATTERED_READ
] = "DC A64 scattered read",
441 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ
] = "DC A64 untyped surface read",
442 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP
] = "DC A64 untyped atomic op",
443 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE
] = "DC A64 untyped surface write",
444 [GEN8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE
] = "DC A64 scattered write",
445 [GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP
] =
446 "DC untyped atomic float op",
447 [GEN9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP
] =
448 "DC A64 untyped atomic float op",
451 static const char *const aop
[16] = {
452 [BRW_AOP_AND
] = "and",
454 [BRW_AOP_XOR
] = "xor",
455 [BRW_AOP_MOV
] = "mov",
456 [BRW_AOP_INC
] = "inc",
457 [BRW_AOP_DEC
] = "dec",
458 [BRW_AOP_ADD
] = "add",
459 [BRW_AOP_SUB
] = "sub",
460 [BRW_AOP_REVSUB
] = "revsub",
461 [BRW_AOP_IMAX
] = "imax",
462 [BRW_AOP_IMIN
] = "imin",
463 [BRW_AOP_UMAX
] = "umax",
464 [BRW_AOP_UMIN
] = "umin",
465 [BRW_AOP_CMPWR
] = "cmpwr",
466 [BRW_AOP_PREDEC
] = "predec",
469 static const char *const aop_float
[4] = {
470 [BRW_AOP_FMAX
] = "fmax",
471 [BRW_AOP_FMIN
] = "fmin",
472 [BRW_AOP_FCMPWR
] = "fcmpwr",
475 static const char * const pixel_interpolator_msg_types
[4] = {
476 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET
] = "per_message_offset",
477 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE
] = "sample_position",
478 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID
] = "centroid",
479 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET
] = "per_slot_offset",
482 static const char *const math_function
[16] = {
483 [BRW_MATH_FUNCTION_INV
] = "inv",
484 [BRW_MATH_FUNCTION_LOG
] = "log",
485 [BRW_MATH_FUNCTION_EXP
] = "exp",
486 [BRW_MATH_FUNCTION_SQRT
] = "sqrt",
487 [BRW_MATH_FUNCTION_RSQ
] = "rsq",
488 [BRW_MATH_FUNCTION_SIN
] = "sin",
489 [BRW_MATH_FUNCTION_COS
] = "cos",
490 [BRW_MATH_FUNCTION_SINCOS
] = "sincos",
491 [BRW_MATH_FUNCTION_FDIV
] = "fdiv",
492 [BRW_MATH_FUNCTION_POW
] = "pow",
493 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER
] = "intdivmod",
494 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
] = "intdiv",
495 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER
] = "intmod",
496 [GEN8_MATH_FUNCTION_INVM
] = "invm",
497 [GEN8_MATH_FUNCTION_RSQRTM
] = "rsqrtm",
500 static const char *const math_saturate
[2] = {
505 static const char *const math_signed
[2] = {
510 static const char *const math_scalar
[2] = {
515 static const char *const math_precision
[2] = {
517 [1] = "partial_precision"
520 static const char *const gen5_urb_opcode
[] = {
525 static const char *const gen7_urb_opcode
[] = {
526 [BRW_URB_OPCODE_WRITE_HWORD
] = "write HWord",
527 [BRW_URB_OPCODE_WRITE_OWORD
] = "write OWord",
528 [BRW_URB_OPCODE_READ_HWORD
] = "read HWord",
529 [BRW_URB_OPCODE_READ_OWORD
] = "read OWord",
530 [GEN7_URB_OPCODE_ATOMIC_MOV
] = "atomic mov", /* Gen7+ */
531 [GEN7_URB_OPCODE_ATOMIC_INC
] = "atomic inc", /* Gen7+ */
532 [GEN8_URB_OPCODE_ATOMIC_ADD
] = "atomic add", /* Gen8+ */
533 [GEN8_URB_OPCODE_SIMD8_WRITE
] = "SIMD8 write", /* Gen8+ */
534 [GEN8_URB_OPCODE_SIMD8_READ
] = "SIMD8 read", /* Gen8+ */
535 /* [9-15] - reserved */
538 static const char *const urb_swizzle
[4] = {
539 [BRW_URB_SWIZZLE_NONE
] = "",
540 [BRW_URB_SWIZZLE_INTERLEAVE
] = "interleave",
541 [BRW_URB_SWIZZLE_TRANSPOSE
] = "transpose",
544 static const char *const urb_allocate
[2] = {
549 static const char *const urb_used
[2] = {
554 static const char *const urb_complete
[2] = {
559 static const char *const gen5_sampler_msg_type
[] = {
560 [GEN5_SAMPLER_MESSAGE_SAMPLE
] = "sample",
561 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS
] = "sample_b",
562 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD
] = "sample_l",
563 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE
] = "sample_c",
564 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS
] = "sample_d",
565 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE
] = "sample_b_c",
566 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE
] = "sample_l_c",
567 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD
] = "ld",
568 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4
] = "gather4",
569 [GEN5_SAMPLER_MESSAGE_LOD
] = "lod",
570 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO
] = "resinfo",
571 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO
] = "sampleinfo",
572 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C
] = "gather4_c",
573 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO
] = "gather4_po",
574 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C
] = "gather4_po_c",
575 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE
] = "sample_d_c",
576 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ
] = "sample_lz",
577 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ
] = "sample_c_lz",
578 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ
] = "ld_lz",
579 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W
] = "ld2dms_w",
580 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS
] = "ld_mcs",
581 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS
] = "ld2dms",
582 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS
] = "ld2dss",
585 static const char *const gen5_sampler_simd_mode
[4] = {
586 [BRW_SAMPLER_SIMD_MODE_SIMD4X2
] = "SIMD4x2",
587 [BRW_SAMPLER_SIMD_MODE_SIMD8
] = "SIMD8",
588 [BRW_SAMPLER_SIMD_MODE_SIMD16
] = "SIMD16",
589 [BRW_SAMPLER_SIMD_MODE_SIMD32_64
] = "SIMD32/64",
592 static const char *const sampler_target_format
[4] = {
602 string(FILE *file
, const char *string
)
605 column
+= strlen(string
);
610 format(FILE *f
, const char *format
, ...) PRINTFLIKE(2, 3);
613 format(FILE *f
, const char *format
, ...)
617 va_start(args
, format
);
619 vsnprintf(buf
, sizeof(buf
) - 1, format
, args
);
643 control(FILE *file
, const char *name
, const char *const ctrl
[],
644 unsigned id
, int *space
)
647 fprintf(file
, "*** invalid %s value %d ", name
, id
);
653 string(file
, ctrl
[id
]);
661 print_opcode(FILE *file
, const struct gen_device_info
*devinfo
,
664 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, id
);
666 format(file
, "*** invalid opcode value %d ", id
);
669 string(file
, desc
->name
);
674 reg(FILE *file
, unsigned _reg_file
, unsigned _reg_nr
)
678 /* Clear the Compr4 instruction compression bit. */
679 if (_reg_file
== BRW_MESSAGE_REGISTER_FILE
)
680 _reg_nr
&= ~BRW_MRF_COMPR4
;
682 if (_reg_file
== BRW_ARCHITECTURE_REGISTER_FILE
) {
683 switch (_reg_nr
& 0xf0) {
685 string(file
, "null");
687 case BRW_ARF_ADDRESS
:
688 format(file
, "a%d", _reg_nr
& 0x0f);
690 case BRW_ARF_ACCUMULATOR
:
691 format(file
, "acc%d", _reg_nr
& 0x0f);
694 format(file
, "f%d", _reg_nr
& 0x0f);
697 format(file
, "mask%d", _reg_nr
& 0x0f);
699 case BRW_ARF_MASK_STACK
:
700 format(file
, "msd%d", _reg_nr
& 0x0f);
703 format(file
, "sr%d", _reg_nr
& 0x0f);
705 case BRW_ARF_CONTROL
:
706 format(file
, "cr%d", _reg_nr
& 0x0f);
708 case BRW_ARF_NOTIFICATION_COUNT
:
709 format(file
, "n%d", _reg_nr
& 0x0f);
716 format(file
, "tdr0");
718 case BRW_ARF_TIMESTAMP
:
719 format(file
, "tm%d", _reg_nr
& 0x0f);
722 format(file
, "ARF%d", _reg_nr
);
726 err
|= control(file
, "src reg file", reg_file
, _reg_file
, NULL
);
727 format(file
, "%d", _reg_nr
);
733 dest(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
735 enum brw_reg_type type
= brw_inst_dst_type(devinfo
, inst
);
736 unsigned elem_size
= brw_reg_type_to_size(type
);
739 if (is_split_send(devinfo
, brw_inst_opcode(devinfo
, inst
))) {
740 /* These are fixed for split sends */
741 type
= BRW_REGISTER_TYPE_UD
;
743 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
744 err
|= reg(file
, brw_inst_send_dst_reg_file(devinfo
, inst
),
745 brw_inst_dst_da_reg_nr(devinfo
, inst
));
746 unsigned subreg_nr
= brw_inst_dst_da16_subreg_nr(devinfo
, inst
);
748 format(file
, ".%u", subreg_nr
);
749 string(file
, brw_reg_type_to_letters(type
));
751 string(file
, "g[a0");
752 if (brw_inst_dst_ia_subreg_nr(devinfo
, inst
))
753 format(file
, ".%"PRIu64
, brw_inst_dst_ia_subreg_nr(devinfo
, inst
) /
755 if (brw_inst_send_dst_ia16_addr_imm(devinfo
, inst
))
756 format(file
, " %d", brw_inst_send_dst_ia16_addr_imm(devinfo
, inst
));
758 string(file
, brw_reg_type_to_letters(type
));
760 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
761 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
762 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
763 brw_inst_dst_da_reg_nr(devinfo
, inst
));
766 if (brw_inst_dst_da1_subreg_nr(devinfo
, inst
))
767 format(file
, ".%"PRIu64
, brw_inst_dst_da1_subreg_nr(devinfo
, inst
) /
770 err
|= control(file
, "horiz stride", horiz_stride
,
771 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
773 string(file
, brw_reg_type_to_letters(type
));
775 string(file
, "g[a0");
776 if (brw_inst_dst_ia_subreg_nr(devinfo
, inst
))
777 format(file
, ".%"PRIu64
, brw_inst_dst_ia_subreg_nr(devinfo
, inst
) /
779 if (brw_inst_dst_ia1_addr_imm(devinfo
, inst
))
780 format(file
, " %d", brw_inst_dst_ia1_addr_imm(devinfo
, inst
));
782 err
|= control(file
, "horiz stride", horiz_stride
,
783 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
785 string(file
, brw_reg_type_to_letters(type
));
788 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
789 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
790 brw_inst_dst_da_reg_nr(devinfo
, inst
));
793 if (brw_inst_dst_da16_subreg_nr(devinfo
, inst
))
794 format(file
, ".%u", 16 / elem_size
);
796 err
|= control(file
, "writemask", writemask
,
797 brw_inst_da16_writemask(devinfo
, inst
), NULL
);
798 string(file
, brw_reg_type_to_letters(type
));
801 string(file
, "Indirect align16 address mode not supported");
809 dest_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
811 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
815 enum brw_reg_type type
;
817 if (is_align1
&& brw_inst_3src_a1_dst_reg_file(devinfo
, inst
))
818 reg_file
= BRW_ARCHITECTURE_REGISTER_FILE
;
819 else if (devinfo
->gen
== 6 && brw_inst_3src_a16_dst_reg_file(devinfo
, inst
))
820 reg_file
= BRW_MESSAGE_REGISTER_FILE
;
822 reg_file
= BRW_GENERAL_REGISTER_FILE
;
824 err
|= reg(file
, reg_file
, brw_inst_3src_dst_reg_nr(devinfo
, inst
));
829 type
= brw_inst_3src_a1_dst_type(devinfo
, inst
);
830 subreg_nr
= brw_inst_3src_a1_dst_subreg_nr(devinfo
, inst
);
832 type
= brw_inst_3src_a16_dst_type(devinfo
, inst
);
833 subreg_nr
= brw_inst_3src_a16_dst_subreg_nr(devinfo
, inst
) * 4;
835 subreg_nr
/= brw_reg_type_to_size(type
);
838 format(file
, ".%u", subreg_nr
);
842 err
|= control(file
, "writemask", writemask
,
843 brw_inst_3src_a16_dst_writemask(devinfo
, inst
), NULL
);
845 string(file
, brw_reg_type_to_letters(type
));
851 src_align1_region(FILE *file
,
852 unsigned _vert_stride
, unsigned _width
,
853 unsigned _horiz_stride
)
857 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
859 err
|= control(file
, "width", width
, _width
, NULL
);
861 err
|= control(file
, "horiz_stride", horiz_stride
, _horiz_stride
, NULL
);
868 const struct gen_device_info
*devinfo
,
870 enum brw_reg_type type
, unsigned _reg_file
,
871 unsigned _vert_stride
, unsigned _width
, unsigned _horiz_stride
,
872 unsigned reg_num
, unsigned sub_reg_num
, unsigned __abs
,
877 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
878 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
880 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
882 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
884 err
|= reg(file
, _reg_file
, reg_num
);
888 unsigned elem_size
= brw_reg_type_to_size(type
);
889 format(file
, ".%d", sub_reg_num
/ elem_size
); /* use formal style like spec */
891 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
892 string(file
, brw_reg_type_to_letters(type
));
898 const struct gen_device_info
*devinfo
,
900 enum brw_reg_type type
,
902 unsigned _addr_subreg_nr
,
905 unsigned _horiz_stride
, unsigned _width
, unsigned _vert_stride
)
909 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
910 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
912 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
914 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
916 string(file
, "g[a0");
918 format(file
, ".%d", _addr_subreg_nr
);
920 format(file
, " %d", _addr_imm
);
922 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
923 string(file
, brw_reg_type_to_letters(type
));
928 src_swizzle(FILE *file
, unsigned swiz
)
930 unsigned x
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_X
);
931 unsigned y
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Y
);
932 unsigned z
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Z
);
933 unsigned w
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_W
);
936 if (x
== y
&& x
== z
&& x
== w
) {
938 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
939 } else if (swiz
!= BRW_SWIZZLE_XYZW
) {
941 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
942 err
|= control(file
, "channel select", chan_sel
, y
, NULL
);
943 err
|= control(file
, "channel select", chan_sel
, z
, NULL
);
944 err
|= control(file
, "channel select", chan_sel
, w
, NULL
);
951 const struct gen_device_info
*devinfo
,
953 enum brw_reg_type type
,
955 unsigned _vert_stride
,
960 unsigned swz_x
, unsigned swz_y
, unsigned swz_z
, unsigned swz_w
)
964 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
965 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
967 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
969 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
971 err
|= reg(file
, _reg_file
, _reg_nr
);
975 unsigned elem_size
= brw_reg_type_to_size(type
);
977 /* bit4 for subreg number byte addressing. Make this same meaning as
978 in da1 case, so output looks consistent. */
979 format(file
, ".%d", 16 / elem_size
);
982 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
984 err
|= src_swizzle(file
, BRW_SWIZZLE4(swz_x
, swz_y
, swz_z
, swz_w
));
985 string(file
, brw_reg_type_to_letters(type
));
989 static enum brw_vertical_stride
990 vstride_from_align1_3src_vstride(enum gen10_align1_3src_vertical_stride vstride
)
993 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_0
: return BRW_VERTICAL_STRIDE_0
;
994 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2
: return BRW_VERTICAL_STRIDE_2
;
995 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_4
: return BRW_VERTICAL_STRIDE_4
;
996 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8
: return BRW_VERTICAL_STRIDE_8
;
998 unreachable("not reached");
1002 static enum brw_horizontal_stride
1003 hstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride
)
1006 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0
: return BRW_HORIZONTAL_STRIDE_0
;
1007 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1
: return BRW_HORIZONTAL_STRIDE_1
;
1008 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2
: return BRW_HORIZONTAL_STRIDE_2
;
1009 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4
: return BRW_HORIZONTAL_STRIDE_4
;
1011 unreachable("not reached");
1015 static enum brw_vertical_stride
1016 vstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride
)
1019 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0
: return BRW_VERTICAL_STRIDE_0
;
1020 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1
: return BRW_VERTICAL_STRIDE_1
;
1021 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2
: return BRW_VERTICAL_STRIDE_2
;
1022 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4
: return BRW_VERTICAL_STRIDE_4
;
1024 unreachable("not reached");
1028 /* From "GEN10 Regioning Rules for Align1 Ternary Operations" in the
1029 * "Register Region Restrictions" documentation
1031 static enum brw_width
1032 implied_width(enum brw_vertical_stride _vert_stride
,
1033 enum brw_horizontal_stride _horiz_stride
)
1035 /* "1. Width is 1 when Vertical and Horizontal Strides are both zero." */
1036 if (_vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1037 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
) {
1040 /* "2. Width is equal to vertical stride when Horizontal Stride is zero." */
1041 } else if (_horiz_stride
== BRW_HORIZONTAL_STRIDE_0
) {
1042 switch (_vert_stride
) {
1043 case BRW_VERTICAL_STRIDE_2
: return BRW_WIDTH_2
;
1044 case BRW_VERTICAL_STRIDE_4
: return BRW_WIDTH_4
;
1045 case BRW_VERTICAL_STRIDE_8
: return BRW_WIDTH_8
;
1046 case BRW_VERTICAL_STRIDE_0
:
1048 unreachable("not reached");
1052 /* FINISHME: Implement these: */
1054 /* "3. Width is equal to Vertical Stride/Horizontal Stride when both
1055 * Strides are non-zero.
1057 * 4. Vertical Stride must not be zero if Horizontal Stride is non-zero.
1058 * This implies Vertical Stride is always greater than Horizontal
1061 * Given these statements and the knowledge that the stride and width
1062 * values are encoded in logarithmic form, we can perform the division
1063 * by just subtracting.
1065 return _vert_stride
- _horiz_stride
;
1070 src0_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1073 unsigned reg_nr
, subreg_nr
;
1074 enum brw_reg_file _file
;
1075 enum brw_reg_type type
;
1076 enum brw_vertical_stride _vert_stride
;
1077 enum brw_width _width
;
1078 enum brw_horizontal_stride _horiz_stride
;
1079 bool is_scalar_region
;
1080 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1083 if (brw_inst_3src_a1_src0_reg_file(devinfo
, inst
) ==
1084 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1085 _file
= BRW_GENERAL_REGISTER_FILE
;
1086 reg_nr
= brw_inst_3src_src0_reg_nr(devinfo
, inst
);
1087 subreg_nr
= brw_inst_3src_a1_src0_subreg_nr(devinfo
, inst
);
1088 type
= brw_inst_3src_a1_src0_type(devinfo
, inst
);
1089 } else if (brw_inst_3src_a1_src0_type(devinfo
, inst
) ==
1090 BRW_REGISTER_TYPE_NF
) {
1091 _file
= BRW_ARCHITECTURE_REGISTER_FILE
;
1092 reg_nr
= brw_inst_3src_src0_reg_nr(devinfo
, inst
);
1093 subreg_nr
= brw_inst_3src_a1_src0_subreg_nr(devinfo
, inst
);
1094 type
= brw_inst_3src_a1_src0_type(devinfo
, inst
);
1096 _file
= BRW_IMMEDIATE_VALUE
;
1097 uint16_t imm_val
= brw_inst_3src_a1_src0_imm(devinfo
, inst
);
1098 enum brw_reg_type type
= brw_inst_3src_a1_src0_type(devinfo
, inst
);
1100 if (type
== BRW_REGISTER_TYPE_W
) {
1101 format(file
, "%dW", imm_val
);
1102 } else if (type
== BRW_REGISTER_TYPE_UW
) {
1103 format(file
, "0x%04xUW", imm_val
);
1104 } else if (type
== BRW_REGISTER_TYPE_HF
) {
1105 format(file
, "%-gF", _mesa_half_to_float(imm_val
));
1110 _vert_stride
= vstride_from_align1_3src_vstride(
1111 brw_inst_3src_a1_src0_vstride(devinfo
, inst
));
1112 _horiz_stride
= hstride_from_align1_3src_hstride(
1113 brw_inst_3src_a1_src0_hstride(devinfo
, inst
));
1114 _width
= implied_width(_vert_stride
, _horiz_stride
);
1116 _file
= BRW_GENERAL_REGISTER_FILE
;
1117 reg_nr
= brw_inst_3src_src0_reg_nr(devinfo
, inst
);
1118 subreg_nr
= brw_inst_3src_a16_src0_subreg_nr(devinfo
, inst
) * 4;
1119 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1121 if (brw_inst_3src_a16_src0_rep_ctrl(devinfo
, inst
)) {
1122 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1123 _width
= BRW_WIDTH_1
;
1124 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1126 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1127 _width
= BRW_WIDTH_4
;
1128 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1131 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1132 _width
== BRW_WIDTH_1
&&
1133 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1135 subreg_nr
/= brw_reg_type_to_size(type
);
1137 err
|= control(file
, "negate", m_negate
,
1138 brw_inst_3src_src0_negate(devinfo
, inst
), NULL
);
1139 err
|= control(file
, "abs", _abs
, brw_inst_3src_src0_abs(devinfo
, inst
), NULL
);
1141 err
|= reg(file
, _file
, reg_nr
);
1144 if (subreg_nr
|| is_scalar_region
)
1145 format(file
, ".%d", subreg_nr
);
1146 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1147 if (!is_scalar_region
&& !is_align1
)
1148 err
|= src_swizzle(file
, brw_inst_3src_a16_src0_swizzle(devinfo
, inst
));
1149 string(file
, brw_reg_type_to_letters(type
));
1154 src1_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1157 unsigned reg_nr
, subreg_nr
;
1158 enum brw_reg_file _file
;
1159 enum brw_reg_type type
;
1160 enum brw_vertical_stride _vert_stride
;
1161 enum brw_width _width
;
1162 enum brw_horizontal_stride _horiz_stride
;
1163 bool is_scalar_region
;
1164 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1167 if (brw_inst_3src_a1_src1_reg_file(devinfo
, inst
) ==
1168 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1169 _file
= BRW_GENERAL_REGISTER_FILE
;
1171 _file
= BRW_ARCHITECTURE_REGISTER_FILE
;
1174 reg_nr
= brw_inst_3src_src1_reg_nr(devinfo
, inst
);
1175 subreg_nr
= brw_inst_3src_a1_src1_subreg_nr(devinfo
, inst
);
1176 type
= brw_inst_3src_a1_src1_type(devinfo
, inst
);
1178 _vert_stride
= vstride_from_align1_3src_vstride(
1179 brw_inst_3src_a1_src1_vstride(devinfo
, inst
));
1180 _horiz_stride
= hstride_from_align1_3src_hstride(
1181 brw_inst_3src_a1_src1_hstride(devinfo
, inst
));
1182 _width
= implied_width(_vert_stride
, _horiz_stride
);
1184 _file
= BRW_GENERAL_REGISTER_FILE
;
1185 reg_nr
= brw_inst_3src_src1_reg_nr(devinfo
, inst
);
1186 subreg_nr
= brw_inst_3src_a16_src1_subreg_nr(devinfo
, inst
) * 4;
1187 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1189 if (brw_inst_3src_a16_src1_rep_ctrl(devinfo
, inst
)) {
1190 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1191 _width
= BRW_WIDTH_1
;
1192 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1194 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1195 _width
= BRW_WIDTH_4
;
1196 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1199 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1200 _width
== BRW_WIDTH_1
&&
1201 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1203 subreg_nr
/= brw_reg_type_to_size(type
);
1205 err
|= control(file
, "negate", m_negate
,
1206 brw_inst_3src_src1_negate(devinfo
, inst
), NULL
);
1207 err
|= control(file
, "abs", _abs
, brw_inst_3src_src1_abs(devinfo
, inst
), NULL
);
1209 err
|= reg(file
, _file
, reg_nr
);
1212 if (subreg_nr
|| is_scalar_region
)
1213 format(file
, ".%d", subreg_nr
);
1214 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1215 if (!is_scalar_region
&& !is_align1
)
1216 err
|= src_swizzle(file
, brw_inst_3src_a16_src1_swizzle(devinfo
, inst
));
1217 string(file
, brw_reg_type_to_letters(type
));
1222 src2_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1225 unsigned reg_nr
, subreg_nr
;
1226 enum brw_reg_file _file
;
1227 enum brw_reg_type type
;
1228 enum brw_vertical_stride _vert_stride
;
1229 enum brw_width _width
;
1230 enum brw_horizontal_stride _horiz_stride
;
1231 bool is_scalar_region
;
1232 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1235 if (brw_inst_3src_a1_src2_reg_file(devinfo
, inst
) ==
1236 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1237 _file
= BRW_GENERAL_REGISTER_FILE
;
1238 reg_nr
= brw_inst_3src_src2_reg_nr(devinfo
, inst
);
1239 subreg_nr
= brw_inst_3src_a1_src2_subreg_nr(devinfo
, inst
);
1240 type
= brw_inst_3src_a1_src2_type(devinfo
, inst
);
1242 _file
= BRW_IMMEDIATE_VALUE
;
1243 uint16_t imm_val
= brw_inst_3src_a1_src2_imm(devinfo
, inst
);
1244 enum brw_reg_type type
= brw_inst_3src_a1_src2_type(devinfo
, inst
);
1246 if (type
== BRW_REGISTER_TYPE_W
) {
1247 format(file
, "%dW", imm_val
);
1248 } else if (type
== BRW_REGISTER_TYPE_UW
) {
1249 format(file
, "0x%04xUW", imm_val
);
1250 } else if (type
== BRW_REGISTER_TYPE_HF
) {
1251 format(file
, "%-gF", _mesa_half_to_float(imm_val
));
1256 /* FINISHME: No vertical stride on src2. Is using the hstride in place
1257 * correct? Doesn't seem like it, since there's hstride=1 but
1260 _vert_stride
= vstride_from_align1_3src_hstride(
1261 brw_inst_3src_a1_src2_hstride(devinfo
, inst
));
1262 _horiz_stride
= hstride_from_align1_3src_hstride(
1263 brw_inst_3src_a1_src2_hstride(devinfo
, inst
));
1264 _width
= implied_width(_vert_stride
, _horiz_stride
);
1266 _file
= BRW_GENERAL_REGISTER_FILE
;
1267 reg_nr
= brw_inst_3src_src2_reg_nr(devinfo
, inst
);
1268 subreg_nr
= brw_inst_3src_a16_src2_subreg_nr(devinfo
, inst
) * 4;
1269 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1271 if (brw_inst_3src_a16_src2_rep_ctrl(devinfo
, inst
)) {
1272 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1273 _width
= BRW_WIDTH_1
;
1274 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1276 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1277 _width
= BRW_WIDTH_4
;
1278 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1281 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1282 _width
== BRW_WIDTH_1
&&
1283 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1285 subreg_nr
/= brw_reg_type_to_size(type
);
1287 err
|= control(file
, "negate", m_negate
,
1288 brw_inst_3src_src2_negate(devinfo
, inst
), NULL
);
1289 err
|= control(file
, "abs", _abs
, brw_inst_3src_src2_abs(devinfo
, inst
), NULL
);
1291 err
|= reg(file
, _file
, reg_nr
);
1294 if (subreg_nr
|| is_scalar_region
)
1295 format(file
, ".%d", subreg_nr
);
1296 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1297 if (!is_scalar_region
&& !is_align1
)
1298 err
|= src_swizzle(file
, brw_inst_3src_a16_src2_swizzle(devinfo
, inst
));
1299 string(file
, brw_reg_type_to_letters(type
));
1304 imm(FILE *file
, const struct gen_device_info
*devinfo
, enum brw_reg_type type
,
1305 const brw_inst
*inst
)
1308 case BRW_REGISTER_TYPE_UQ
:
1309 format(file
, "0x%016"PRIx64
"UQ", brw_inst_imm_uq(devinfo
, inst
));
1311 case BRW_REGISTER_TYPE_Q
:
1312 format(file
, "0x%016"PRIx64
"Q", brw_inst_imm_uq(devinfo
, inst
));
1314 case BRW_REGISTER_TYPE_UD
:
1315 format(file
, "0x%08xUD", brw_inst_imm_ud(devinfo
, inst
));
1317 case BRW_REGISTER_TYPE_D
:
1318 format(file
, "%dD", brw_inst_imm_d(devinfo
, inst
));
1320 case BRW_REGISTER_TYPE_UW
:
1321 format(file
, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo
, inst
));
1323 case BRW_REGISTER_TYPE_W
:
1324 format(file
, "%dW", (int16_t) brw_inst_imm_d(devinfo
, inst
));
1326 case BRW_REGISTER_TYPE_UV
:
1327 format(file
, "0x%08xUV", brw_inst_imm_ud(devinfo
, inst
));
1329 case BRW_REGISTER_TYPE_VF
:
1330 format(file
, "0x%"PRIx64
"VF", brw_inst_bits(inst
, 127, 96));
1332 format(file
, "/* [%-gF, %-gF, %-gF, %-gF]VF */",
1333 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
)),
1334 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 8),
1335 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 16),
1336 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 24));
1338 case BRW_REGISTER_TYPE_V
:
1339 format(file
, "0x%08xV", brw_inst_imm_ud(devinfo
, inst
));
1341 case BRW_REGISTER_TYPE_F
:
1342 /* The DIM instruction's src0 uses an F type but contains a
1345 if (brw_inst_opcode(devinfo
, inst
) == BRW_OPCODE_DIM
) {
1346 format(file
, "0x%"PRIx64
"F", brw_inst_bits(inst
, 127, 64));
1348 format(file
, "/* %-gF */", brw_inst_imm_df(devinfo
, inst
));
1350 format(file
, "0x%"PRIx64
"F", brw_inst_bits(inst
, 127, 96));
1352 format(file
, " /* %-gF */", brw_inst_imm_f(devinfo
, inst
));
1355 case BRW_REGISTER_TYPE_DF
:
1356 format(file
, "0x%016"PRIx64
"DF", brw_inst_bits(inst
, 127, 64));
1358 format(file
, "/* %-gDF */", brw_inst_imm_df(devinfo
, inst
));
1360 case BRW_REGISTER_TYPE_HF
:
1361 string(file
, "Half Float IMM");
1363 case BRW_REGISTER_TYPE_NF
:
1364 case BRW_REGISTER_TYPE_UB
:
1365 case BRW_REGISTER_TYPE_B
:
1366 format(file
, "*** invalid immediate type %d ", type
);
1372 src_sends_da(FILE *file
,
1373 const struct gen_device_info
*devinfo
,
1374 enum brw_reg_type type
,
1376 unsigned _reg_subnr
)
1380 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
, _reg_nr
);
1385 string(file
, brw_reg_type_to_letters(type
));
1391 src_sends_ia(FILE *file
,
1392 const struct gen_device_info
*devinfo
,
1393 enum brw_reg_type type
,
1395 unsigned _addr_subreg_nr
)
1397 string(file
, "g[a0");
1398 if (_addr_subreg_nr
)
1401 format(file
, " %d", _addr_imm
);
1403 string(file
, brw_reg_type_to_letters(type
));
1409 src0(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1411 if (is_split_send(devinfo
, brw_inst_opcode(devinfo
, inst
))) {
1412 if (brw_inst_send_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1413 return src_sends_da(file
,
1415 BRW_REGISTER_TYPE_UD
,
1416 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1417 brw_inst_src0_da16_subreg_nr(devinfo
, inst
));
1419 return src_sends_ia(file
,
1421 BRW_REGISTER_TYPE_UD
,
1422 brw_inst_send_src0_ia16_addr_imm(devinfo
, inst
),
1423 brw_inst_src0_ia_subreg_nr(devinfo
, inst
));
1425 } else if (brw_inst_src0_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1426 return imm(file
, devinfo
, brw_inst_src0_type(devinfo
, inst
), inst
);
1427 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1428 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1429 return src_da1(file
,
1431 brw_inst_opcode(devinfo
, inst
),
1432 brw_inst_src0_type(devinfo
, inst
),
1433 brw_inst_src0_reg_file(devinfo
, inst
),
1434 brw_inst_src0_vstride(devinfo
, inst
),
1435 brw_inst_src0_width(devinfo
, inst
),
1436 brw_inst_src0_hstride(devinfo
, inst
),
1437 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1438 brw_inst_src0_da1_subreg_nr(devinfo
, inst
),
1439 brw_inst_src0_abs(devinfo
, inst
),
1440 brw_inst_src0_negate(devinfo
, inst
));
1442 return src_ia1(file
,
1444 brw_inst_opcode(devinfo
, inst
),
1445 brw_inst_src0_type(devinfo
, inst
),
1446 brw_inst_src0_ia1_addr_imm(devinfo
, inst
),
1447 brw_inst_src0_ia_subreg_nr(devinfo
, inst
),
1448 brw_inst_src0_negate(devinfo
, inst
),
1449 brw_inst_src0_abs(devinfo
, inst
),
1450 brw_inst_src0_hstride(devinfo
, inst
),
1451 brw_inst_src0_width(devinfo
, inst
),
1452 brw_inst_src0_vstride(devinfo
, inst
));
1455 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1456 return src_da16(file
,
1458 brw_inst_opcode(devinfo
, inst
),
1459 brw_inst_src0_type(devinfo
, inst
),
1460 brw_inst_src0_reg_file(devinfo
, inst
),
1461 brw_inst_src0_vstride(devinfo
, inst
),
1462 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1463 brw_inst_src0_da16_subreg_nr(devinfo
, inst
),
1464 brw_inst_src0_abs(devinfo
, inst
),
1465 brw_inst_src0_negate(devinfo
, inst
),
1466 brw_inst_src0_da16_swiz_x(devinfo
, inst
),
1467 brw_inst_src0_da16_swiz_y(devinfo
, inst
),
1468 brw_inst_src0_da16_swiz_z(devinfo
, inst
),
1469 brw_inst_src0_da16_swiz_w(devinfo
, inst
));
1471 string(file
, "Indirect align16 address mode not supported");
1478 src1(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1480 if (is_split_send(devinfo
, brw_inst_opcode(devinfo
, inst
))) {
1481 return src_sends_da(file
,
1483 BRW_REGISTER_TYPE_UD
,
1484 brw_inst_send_src1_reg_nr(devinfo
, inst
),
1486 } else if (brw_inst_src1_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1487 return imm(file
, devinfo
, brw_inst_src1_type(devinfo
, inst
), inst
);
1488 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1489 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1490 return src_da1(file
,
1492 brw_inst_opcode(devinfo
, inst
),
1493 brw_inst_src1_type(devinfo
, inst
),
1494 brw_inst_src1_reg_file(devinfo
, inst
),
1495 brw_inst_src1_vstride(devinfo
, inst
),
1496 brw_inst_src1_width(devinfo
, inst
),
1497 brw_inst_src1_hstride(devinfo
, inst
),
1498 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1499 brw_inst_src1_da1_subreg_nr(devinfo
, inst
),
1500 brw_inst_src1_abs(devinfo
, inst
),
1501 brw_inst_src1_negate(devinfo
, inst
));
1503 return src_ia1(file
,
1505 brw_inst_opcode(devinfo
, inst
),
1506 brw_inst_src1_type(devinfo
, inst
),
1507 brw_inst_src1_ia1_addr_imm(devinfo
, inst
),
1508 brw_inst_src1_ia_subreg_nr(devinfo
, inst
),
1509 brw_inst_src1_negate(devinfo
, inst
),
1510 brw_inst_src1_abs(devinfo
, inst
),
1511 brw_inst_src1_hstride(devinfo
, inst
),
1512 brw_inst_src1_width(devinfo
, inst
),
1513 brw_inst_src1_vstride(devinfo
, inst
));
1516 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1517 return src_da16(file
,
1519 brw_inst_opcode(devinfo
, inst
),
1520 brw_inst_src1_type(devinfo
, inst
),
1521 brw_inst_src1_reg_file(devinfo
, inst
),
1522 brw_inst_src1_vstride(devinfo
, inst
),
1523 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1524 brw_inst_src1_da16_subreg_nr(devinfo
, inst
),
1525 brw_inst_src1_abs(devinfo
, inst
),
1526 brw_inst_src1_negate(devinfo
, inst
),
1527 brw_inst_src1_da16_swiz_x(devinfo
, inst
),
1528 brw_inst_src1_da16_swiz_y(devinfo
, inst
),
1529 brw_inst_src1_da16_swiz_z(devinfo
, inst
),
1530 brw_inst_src1_da16_swiz_w(devinfo
, inst
));
1532 string(file
, "Indirect align16 address mode not supported");
1539 qtr_ctrl(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1541 int qtr_ctl
= brw_inst_qtr_control(devinfo
, inst
);
1542 int exec_size
= 1 << brw_inst_exec_size(devinfo
, inst
);
1543 const unsigned nib_ctl
= devinfo
->gen
< 7 ? 0 :
1544 brw_inst_nib_control(devinfo
, inst
);
1546 if (exec_size
< 8 || nib_ctl
) {
1547 format(file
, " %dN", qtr_ctl
* 2 + nib_ctl
+ 1);
1548 } else if (exec_size
== 8) {
1551 string(file
, " 1Q");
1554 string(file
, " 2Q");
1557 string(file
, " 3Q");
1560 string(file
, " 4Q");
1563 } else if (exec_size
== 16) {
1565 string(file
, " 1H");
1567 string(file
, " 2H");
1573 static __attribute__((__unused__
)) int
1574 brw_disassemble_imm(const struct gen_device_info
*devinfo
,
1575 uint32_t dw3
, uint32_t dw2
, uint32_t dw1
, uint32_t dw0
)
1578 inst
.data
[0] = (((uint64_t) dw1
) << 32) | ((uint64_t) dw0
);
1579 inst
.data
[1] = (((uint64_t) dw3
) << 32) | ((uint64_t) dw2
);
1580 return brw_disassemble_inst(stderr
, devinfo
, &inst
, false);
1585 brw_disassemble_inst(FILE *file
, const struct gen_device_info
*devinfo
,
1586 const brw_inst
*inst
, bool is_compacted
)
1591 const enum opcode opcode
= brw_inst_opcode(devinfo
, inst
);
1592 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, opcode
);
1594 if (brw_inst_pred_control(devinfo
, inst
)) {
1596 err
|= control(file
, "predicate inverse", pred_inv
,
1597 brw_inst_pred_inv(devinfo
, inst
), NULL
);
1598 format(file
, "f%"PRIu64
".%"PRIu64
,
1599 devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0,
1600 brw_inst_flag_subreg_nr(devinfo
, inst
));
1601 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1602 err
|= control(file
, "predicate control align1", pred_ctrl_align1
,
1603 brw_inst_pred_control(devinfo
, inst
), NULL
);
1605 err
|= control(file
, "predicate control align16", pred_ctrl_align16
,
1606 brw_inst_pred_control(devinfo
, inst
), NULL
);
1611 err
|= print_opcode(file
, devinfo
, opcode
);
1612 err
|= control(file
, "saturate", saturate
, brw_inst_saturate(devinfo
, inst
),
1615 err
|= control(file
, "debug control", debug_ctrl
,
1616 brw_inst_debug_control(devinfo
, inst
), NULL
);
1618 if (opcode
== BRW_OPCODE_MATH
) {
1620 err
|= control(file
, "function", math_function
,
1621 brw_inst_math_function(devinfo
, inst
), NULL
);
1622 } else if (!is_send(opcode
)) {
1623 err
|= control(file
, "conditional modifier", conditional_modifier
,
1624 brw_inst_cond_modifier(devinfo
, inst
), NULL
);
1626 /* If we're using the conditional modifier, print which flags reg is
1627 * used for it. Note that on gen6+, the embedded-condition SEL and
1628 * control flow doesn't update flags.
1630 if (brw_inst_cond_modifier(devinfo
, inst
) &&
1631 (devinfo
->gen
< 6 || (opcode
!= BRW_OPCODE_SEL
&&
1632 opcode
!= BRW_OPCODE_CSEL
&&
1633 opcode
!= BRW_OPCODE_IF
&&
1634 opcode
!= BRW_OPCODE_WHILE
))) {
1635 format(file
, ".f%"PRIu64
".%"PRIu64
,
1636 devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0,
1637 brw_inst_flag_subreg_nr(devinfo
, inst
));
1641 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1643 err
|= control(file
, "execution size", exec_size
,
1644 brw_inst_exec_size(devinfo
, inst
), NULL
);
1648 if (opcode
== BRW_OPCODE_SEND
&& devinfo
->gen
< 6)
1649 format(file
, " %"PRIu64
, brw_inst_base_mrf(devinfo
, inst
));
1651 if (has_uip(devinfo
, opcode
)) {
1652 /* Instructions that have UIP also have JIP. */
1654 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1656 format(file
, "UIP: %d", brw_inst_uip(devinfo
, inst
));
1657 } else if (has_jip(devinfo
, opcode
)) {
1659 if (devinfo
->gen
>= 7) {
1660 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1662 format(file
, "JIP: %d", brw_inst_gen6_jump_count(devinfo
, inst
));
1664 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_BREAK
||
1665 opcode
== BRW_OPCODE_CONTINUE
||
1666 opcode
== BRW_OPCODE_ELSE
)) {
1668 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1670 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1671 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_IF
||
1672 opcode
== BRW_OPCODE_IFF
||
1673 opcode
== BRW_OPCODE_HALT
||
1674 opcode
== BRW_OPCODE_WHILE
)) {
1676 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1677 } else if (devinfo
->gen
< 6 && opcode
== BRW_OPCODE_ENDIF
) {
1679 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1680 } else if (opcode
== BRW_OPCODE_JMPI
) {
1682 err
|= src1(file
, devinfo
, inst
);
1683 } else if (desc
&& desc
->nsrc
== 3) {
1685 err
|= dest_3src(file
, devinfo
, inst
);
1688 err
|= src0_3src(file
, devinfo
, inst
);
1691 err
|= src1_3src(file
, devinfo
, inst
);
1694 err
|= src2_3src(file
, devinfo
, inst
);
1696 if (desc
->ndst
> 0) {
1698 err
|= dest(file
, devinfo
, inst
);
1701 if (desc
->nsrc
> 0) {
1703 err
|= src0(file
, devinfo
, inst
);
1706 if (desc
->nsrc
> 1) {
1708 err
|= src1(file
, devinfo
, inst
);
1712 if (is_send(opcode
)) {
1713 enum brw_message_target sfid
= brw_inst_sfid(devinfo
, inst
);
1715 bool has_imm_desc
= false, has_imm_ex_desc
= false;
1716 uint32_t imm_desc
= 0, imm_ex_desc
= 0;
1717 if (is_split_send(devinfo
, opcode
)) {
1719 if (brw_inst_send_sel_reg32_desc(devinfo
, inst
)) {
1720 /* show the indirect descriptor source */
1721 err
|= src_sends_ia(file
, devinfo
, BRW_REGISTER_TYPE_UD
, 0, 0);
1723 has_imm_desc
= true;
1724 imm_desc
= brw_inst_send_desc(devinfo
, inst
);
1725 fprintf(file
, "0x%08"PRIx32
, imm_desc
);
1729 if (brw_inst_send_sel_reg32_ex_desc(devinfo
, inst
)) {
1730 /* show the indirect descriptor source */
1731 err
|= src_sends_ia(file
, devinfo
, BRW_REGISTER_TYPE_UD
, 0,
1732 brw_inst_send_ex_desc_ia_subreg_nr(devinfo
, inst
));
1734 has_imm_ex_desc
= true;
1735 imm_ex_desc
= brw_inst_send_ex_desc(devinfo
, inst
);
1736 fprintf(file
, "0x%08"PRIx32
, imm_ex_desc
);
1739 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1740 /* show the indirect descriptor source */
1742 err
|= src1(file
, devinfo
, inst
);
1745 has_imm_desc
= true;
1746 imm_desc
= brw_inst_send_desc(devinfo
, inst
);
1750 /* Print message descriptor as immediate source */
1751 fprintf(file
, "0x%08"PRIx64
, inst
->data
[1] >> 32);
1759 err
|= control(file
, "SFID", devinfo
->gen
>= 6 ? gen6_sfid
: gen4_sfid
,
1761 string(file
, " MsgDesc:");
1763 if (!has_imm_desc
) {
1764 format(file
, " indirect");
1768 err
|= control(file
, "math function", math_function
,
1769 brw_inst_math_msg_function(devinfo
, inst
), &space
);
1770 err
|= control(file
, "math saturate", math_saturate
,
1771 brw_inst_math_msg_saturate(devinfo
, inst
), &space
);
1772 err
|= control(file
, "math signed", math_signed
,
1773 brw_inst_math_msg_signed_int(devinfo
, inst
), &space
);
1774 err
|= control(file
, "math scalar", math_scalar
,
1775 brw_inst_math_msg_data_type(devinfo
, inst
), &space
);
1776 err
|= control(file
, "math precision", math_precision
,
1777 brw_inst_math_msg_precision(devinfo
, inst
), &space
);
1779 case BRW_SFID_SAMPLER
:
1780 if (devinfo
->gen
>= 5) {
1781 err
|= control(file
, "sampler message", gen5_sampler_msg_type
,
1782 brw_sampler_desc_msg_type(devinfo
, imm_desc
),
1784 err
|= control(file
, "sampler simd mode", gen5_sampler_simd_mode
,
1785 brw_sampler_desc_simd_mode(devinfo
, imm_desc
),
1787 format(file
, " Surface = %u Sampler = %u",
1788 brw_sampler_desc_binding_table_index(devinfo
, imm_desc
),
1789 brw_sampler_desc_sampler(devinfo
, imm_desc
));
1791 format(file
, " (%u, %u, %u, ",
1792 brw_sampler_desc_binding_table_index(devinfo
, imm_desc
),
1793 brw_sampler_desc_sampler(devinfo
, imm_desc
),
1794 brw_sampler_desc_msg_type(devinfo
, imm_desc
));
1795 if (!devinfo
->is_g4x
) {
1796 err
|= control(file
, "sampler target format",
1797 sampler_target_format
,
1798 brw_sampler_desc_return_format(devinfo
, imm_desc
),
1804 case GEN6_SFID_DATAPORT_SAMPLER_CACHE
:
1805 case GEN6_SFID_DATAPORT_CONSTANT_CACHE
:
1806 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1807 if (devinfo
->gen
>= 6) {
1808 format(file
, " (%u, %u, %u, %u)",
1809 brw_dp_desc_binding_table_index(devinfo
, imm_desc
),
1810 brw_dp_desc_msg_control(devinfo
, imm_desc
),
1811 brw_dp_desc_msg_type(devinfo
, imm_desc
),
1812 devinfo
->gen
>= 7 ? 0u :
1813 brw_dp_write_desc_write_commit(devinfo
, imm_desc
));
1815 bool is_965
= devinfo
->gen
== 4 && !devinfo
->is_g4x
;
1816 err
|= control(file
, "DP read message type",
1817 is_965
? gen4_dp_read_port_msg_type
:
1818 g45_dp_read_port_msg_type
,
1819 brw_dp_read_desc_msg_type(devinfo
, imm_desc
),
1822 format(file
, " MsgCtrl = 0x%u",
1823 brw_dp_read_desc_msg_control(devinfo
, imm_desc
));
1825 format(file
, " Surface = %u",
1826 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
1830 case GEN6_SFID_DATAPORT_RENDER_CACHE
: {
1831 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1832 unsigned msg_type
= brw_dp_write_desc_msg_type(devinfo
, imm_desc
);
1834 err
|= control(file
, "DP rc message type",
1835 dp_rc_msg_type(devinfo
), msg_type
, &space
);
1837 bool is_rt_write
= msg_type
==
1838 (devinfo
->gen
>= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1839 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
);
1842 err
|= control(file
, "RT message type", m_rt_write_subtype
,
1843 brw_inst_rt_message_type(devinfo
, inst
), &space
);
1844 if (devinfo
->gen
>= 6 && brw_inst_rt_slot_group(devinfo
, inst
))
1845 string(file
, " Hi");
1846 if (brw_dp_write_desc_last_render_target(devinfo
, imm_desc
))
1847 string(file
, " LastRT");
1848 if (devinfo
->gen
< 7 &&
1849 brw_dp_write_desc_write_commit(devinfo
, imm_desc
))
1850 string(file
, " WriteCommit");
1852 format(file
, " MsgCtrl = 0x%u",
1853 brw_dp_write_desc_msg_control(devinfo
, imm_desc
));
1856 format(file
, " Surface = %u",
1857 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
1861 case BRW_SFID_URB
: {
1862 unsigned opcode
= brw_inst_urb_opcode(devinfo
, inst
);
1864 format(file
, " %"PRIu64
, brw_inst_urb_global_offset(devinfo
, inst
));
1868 err
|= control(file
, "urb opcode",
1869 devinfo
->gen
>= 7 ? gen7_urb_opcode
1873 if (devinfo
->gen
>= 7 &&
1874 brw_inst_urb_per_slot_offset(devinfo
, inst
)) {
1875 string(file
, " per-slot");
1878 if (opcode
== GEN8_URB_OPCODE_SIMD8_WRITE
||
1879 opcode
== GEN8_URB_OPCODE_SIMD8_READ
) {
1880 if (brw_inst_urb_channel_mask_present(devinfo
, inst
))
1881 string(file
, " masked");
1883 err
|= control(file
, "urb swizzle", urb_swizzle
,
1884 brw_inst_urb_swizzle_control(devinfo
, inst
),
1888 if (devinfo
->gen
< 7) {
1889 err
|= control(file
, "urb allocate", urb_allocate
,
1890 brw_inst_urb_allocate(devinfo
, inst
), &space
);
1891 err
|= control(file
, "urb used", urb_used
,
1892 brw_inst_urb_used(devinfo
, inst
), &space
);
1894 if (devinfo
->gen
< 8) {
1895 err
|= control(file
, "urb complete", urb_complete
,
1896 brw_inst_urb_complete(devinfo
, inst
), &space
);
1900 case BRW_SFID_THREAD_SPAWNER
:
1903 case BRW_SFID_MESSAGE_GATEWAY
:
1904 format(file
, " (%s)",
1905 gen7_gateway_subfuncid
[brw_inst_gateway_subfuncid(devinfo
, inst
)]);
1908 case GEN7_SFID_DATAPORT_DATA_CACHE
:
1909 if (devinfo
->gen
>= 7) {
1912 err
|= control(file
, "DP DC0 message type",
1913 dp_dc0_msg_type_gen7
,
1914 brw_dp_desc_msg_type(devinfo
, imm_desc
), &space
);
1916 format(file
, ", %u, ",
1917 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
1919 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1920 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
:
1921 control(file
, "atomic op", aop
,
1922 brw_dp_desc_msg_control(devinfo
, imm_desc
) & 0xf,
1927 brw_dp_desc_msg_control(devinfo
, imm_desc
));
1934 case HSW_SFID_DATAPORT_DATA_CACHE_1
: {
1935 if (devinfo
->gen
>= 7) {
1938 unsigned msg_ctrl
= brw_dp_desc_msg_control(devinfo
, imm_desc
);
1940 err
|= control(file
, "DP DC1 message type",
1941 dp_dc1_msg_type_hsw
,
1942 brw_dp_desc_msg_type(devinfo
, imm_desc
), &space
);
1944 format(file
, ", Surface = %u, ",
1945 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
1947 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1948 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
:
1949 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
:
1950 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
:
1951 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
1953 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
:
1954 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
:
1955 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
:
1956 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP
:
1957 control(file
, "atomic op", aop
, msg_ctrl
& 0xf, &space
);
1959 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
:
1960 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
:
1961 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
:
1962 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
:
1963 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE
:
1964 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ
: {
1965 static const char *simd_modes
[] = { "4x2", "16", "8" };
1966 format(file
, "SIMD%s, Mask = 0x%x",
1967 simd_modes
[msg_ctrl
>> 4], msg_ctrl
& 0xf);
1970 case GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP
:
1971 case GEN9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP
:
1972 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
1973 control(file
, "atomic float op", aop_float
, msg_ctrl
& 0xf,
1977 format(file
, "0x%x", msg_ctrl
);
1985 case GEN7_SFID_PIXEL_INTERPOLATOR
:
1986 if (devinfo
->gen
>= 7) {
1987 format(file
, " (%s, %s, 0x%02"PRIx64
")",
1988 brw_inst_pi_nopersp(devinfo
, inst
) ? "linear" : "persp",
1989 pixel_interpolator_msg_types
[brw_inst_pi_message_type(devinfo
, inst
)],
1990 brw_inst_pi_message_data(devinfo
, inst
));
1996 format(file
, "unsupported shared function ID %d", sfid
);
2004 format(file
, "mlen %u", brw_message_desc_mlen(devinfo
, imm_desc
));
2005 if (has_imm_ex_desc
) {
2006 format(file
, " ex_mlen %u",
2007 brw_message_ex_desc_ex_mlen(devinfo
, imm_ex_desc
));
2010 format(file
, " rlen %u", brw_message_desc_rlen(devinfo
, imm_desc
));
2013 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
2016 err
|= control(file
, "access mode", access_mode
,
2017 brw_inst_access_mode(devinfo
, inst
), &space
);
2018 if (devinfo
->gen
>= 6) {
2019 err
|= control(file
, "write enable control", wectrl
,
2020 brw_inst_mask_control(devinfo
, inst
), &space
);
2022 err
|= control(file
, "mask control", mask_ctrl
,
2023 brw_inst_mask_control(devinfo
, inst
), &space
);
2025 err
|= control(file
, "dependency control", dep_ctrl
,
2026 ((brw_inst_no_dd_check(devinfo
, inst
) << 1) |
2027 brw_inst_no_dd_clear(devinfo
, inst
)), &space
);
2029 if (devinfo
->gen
>= 6)
2030 err
|= qtr_ctrl(file
, devinfo
, inst
);
2032 if (brw_inst_qtr_control(devinfo
, inst
) == BRW_COMPRESSION_COMPRESSED
&&
2033 desc
&& desc
->ndst
> 0 &&
2034 brw_inst_dst_reg_file(devinfo
, inst
) == BRW_MESSAGE_REGISTER_FILE
&&
2035 brw_inst_dst_da_reg_nr(devinfo
, inst
) & BRW_MRF_COMPR4
) {
2036 format(file
, " compr4");
2038 err
|= control(file
, "compression control", compr_ctrl
,
2039 brw_inst_qtr_control(devinfo
, inst
), &space
);
2043 err
|= control(file
, "compaction", cmpt_ctrl
, is_compacted
, &space
);
2044 err
|= control(file
, "thread control", thread_ctrl
,
2045 brw_inst_thread_control(devinfo
, inst
), &space
);
2046 if (has_branch_ctrl(devinfo
, opcode
)) {
2047 err
|= control(file
, "branch ctrl", branch_ctrl
,
2048 brw_inst_branch_control(devinfo
, inst
), &space
);
2049 } else if (devinfo
->gen
>= 6) {
2050 err
|= control(file
, "acc write control", accwr
,
2051 brw_inst_acc_wr_control(devinfo
, inst
), &space
);
2053 if (is_send(opcode
))
2054 err
|= control(file
, "end of thread", end_of_thread
,
2055 brw_inst_eot(devinfo
, inst
), &space
);