projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
i965: Add align1 ternary instruction support to conversion functions
[mesa.git] / src / intel / compiler / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <string.h>
25 #include <stdarg.h>
26
27 #include "brw_eu_defines.h"
28 #include "brw_inst.h"
29 #include "brw_shader.h"
30 #include "brw_reg.h"
31 #include "brw_inst.h"
32 #include "brw_eu.h"
33
34 static bool
35 has_jip(const struct gen_device_info *devinfo, enum opcode opcode)
36 {
37 if (devinfo->gen < 6)
38 return false;
39
40 return opcode == BRW_OPCODE_IF ||
41 opcode == BRW_OPCODE_ELSE ||
42 opcode == BRW_OPCODE_ENDIF ||
43 opcode == BRW_OPCODE_WHILE ||
44 opcode == BRW_OPCODE_BREAK ||
45 opcode == BRW_OPCODE_CONTINUE ||
46 opcode == BRW_OPCODE_HALT;
47 }
48
49 static bool
50 has_uip(const struct gen_device_info *devinfo, enum opcode opcode)
51 {
52 if (devinfo->gen < 6)
53 return false;
54
55 return (devinfo->gen >= 7 && opcode == BRW_OPCODE_IF) ||
56 (devinfo->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
57 opcode == BRW_OPCODE_BREAK ||
58 opcode == BRW_OPCODE_CONTINUE ||
59 opcode == BRW_OPCODE_HALT;
60 }
61
62 static bool
63 has_branch_ctrl(const struct gen_device_info *devinfo, enum opcode opcode)
64 {
65 if (devinfo->gen < 8)
66 return false;
67
68 return opcode == BRW_OPCODE_IF ||
69 opcode == BRW_OPCODE_ELSE;
70 /* opcode == BRW_OPCODE_GOTO; */
71 }
72
73 static bool
74 is_logic_instruction(unsigned opcode)
75 {
76 return opcode == BRW_OPCODE_AND ||
77 opcode == BRW_OPCODE_NOT ||
78 opcode == BRW_OPCODE_OR ||
79 opcode == BRW_OPCODE_XOR;
80 }
81
82 const char *const conditional_modifier[16] = {
83 [BRW_CONDITIONAL_NONE] = "",
84 [BRW_CONDITIONAL_Z] = ".z",
85 [BRW_CONDITIONAL_NZ] = ".nz",
86 [BRW_CONDITIONAL_G] = ".g",
87 [BRW_CONDITIONAL_GE] = ".ge",
88 [BRW_CONDITIONAL_L] = ".l",
89 [BRW_CONDITIONAL_LE] = ".le",
90 [BRW_CONDITIONAL_R] = ".r",
91 [BRW_CONDITIONAL_O] = ".o",
92 [BRW_CONDITIONAL_U] = ".u",
93 };
94
95 static const char *const m_negate[2] = {
96 [0] = "",
97 [1] = "-",
98 };
99
100 static const char *const _abs[2] = {
101 [0] = "",
102 [1] = "(abs)",
103 };
104
105 static const char *const m_bitnot[2] = { "", "~" };
106
107 static const char *const vert_stride[16] = {
108 [0] = "0",
109 [1] = "1",
110 [2] = "2",
111 [3] = "4",
112 [4] = "8",
113 [5] = "16",
114 [6] = "32",
115 [15] = "VxH",
116 };
117
118 static const char *const width[8] = {
119 [0] = "1",
120 [1] = "2",
121 [2] = "4",
122 [3] = "8",
123 [4] = "16",
124 };
125
126 static const char *const horiz_stride[4] = {
127 [0] = "0",
128 [1] = "1",
129 [2] = "2",
130 [3] = "4"
131 };
132
133 static const char *const chan_sel[4] = {
134 [0] = "x",
135 [1] = "y",
136 [2] = "z",
137 [3] = "w",
138 };
139
140 static const char *const debug_ctrl[2] = {
141 [0] = "",
142 [1] = ".breakpoint"
143 };
144
145 static const char *const saturate[2] = {
146 [0] = "",
147 [1] = ".sat"
148 };
149
150 static const char *const cmpt_ctrl[2] = {
151 [0] = "",
152 [1] = "compacted"
153 };
154
155 static const char *const accwr[2] = {
156 [0] = "",
157 [1] = "AccWrEnable"
158 };
159
160 static const char *const branch_ctrl[2] = {
161 [0] = "",
162 [1] = "BranchCtrl"
163 };
164
165 static const char *const wectrl[2] = {
166 [0] = "",
167 [1] = "WE_all"
168 };
169
170 static const char *const exec_size[8] = {
171 [0] = "1",
172 [1] = "2",
173 [2] = "4",
174 [3] = "8",
175 [4] = "16",
176 [5] = "32"
177 };
178
179 static const char *const pred_inv[2] = {
180 [0] = "+",
181 [1] = "-"
182 };
183
184 const char *const pred_ctrl_align16[16] = {
185 [1] = "",
186 [2] = ".x",
187 [3] = ".y",
188 [4] = ".z",
189 [5] = ".w",
190 [6] = ".any4h",
191 [7] = ".all4h",
192 };
193
194 static const char *const pred_ctrl_align1[16] = {
195 [BRW_PREDICATE_NORMAL] = "",
196 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
197 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
198 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
199 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
200 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
201 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
202 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
203 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
204 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
205 [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",
206 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
207 [BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h",
208 };
209
210 static const char *const thread_ctrl[4] = {
211 [BRW_THREAD_NORMAL] = "",
212 [BRW_THREAD_ATOMIC] = "atomic",
213 [BRW_THREAD_SWITCH] = "switch",
214 };
215
216 static const char *const compr_ctrl[4] = {
217 [0] = "",
218 [1] = "sechalf",
219 [2] = "compr",
220 [3] = "compr4",
221 };
222
223 static const char *const dep_ctrl[4] = {
224 [0] = "",
225 [1] = "NoDDClr",
226 [2] = "NoDDChk",
227 [3] = "NoDDClr,NoDDChk",
228 };
229
230 static const char *const mask_ctrl[4] = {
231 [0] = "",
232 [1] = "nomask",
233 };
234
235 static const char *const access_mode[2] = {
236 [0] = "align1",
237 [1] = "align16",
238 };
239
240 static const char *const three_source_reg_encoding[] = {
241 [BRW_3SRC_TYPE_F] = "F",
242 [BRW_3SRC_TYPE_D] = "D",
243 [BRW_3SRC_TYPE_UD] = "UD",
244 [BRW_3SRC_TYPE_DF] = "DF",
245 };
246
247 static const char *const reg_file[4] = {
248 [0] = "A",
249 [1] = "g",
250 [2] = "m",
251 [3] = "imm",
252 };
253
254 static const char *const writemask[16] = {
255 [0x0] = ".",
256 [0x1] = ".x",
257 [0x2] = ".y",
258 [0x3] = ".xy",
259 [0x4] = ".z",
260 [0x5] = ".xz",
261 [0x6] = ".yz",
262 [0x7] = ".xyz",
263 [0x8] = ".w",
264 [0x9] = ".xw",
265 [0xa] = ".yw",
266 [0xb] = ".xyw",
267 [0xc] = ".zw",
268 [0xd] = ".xzw",
269 [0xe] = ".yzw",
270 [0xf] = "",
271 };
272
273 static const char *const end_of_thread[2] = {
274 [0] = "",
275 [1] = "EOT"
276 };
277
278 /* SFIDs on Gen4-5 */
279 static const char *const gen4_sfid[16] = {
280 [BRW_SFID_NULL] = "null",
281 [BRW_SFID_MATH] = "math",
282 [BRW_SFID_SAMPLER] = "sampler",
283 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
284 [BRW_SFID_DATAPORT_READ] = "read",
285 [BRW_SFID_DATAPORT_WRITE] = "write",
286 [BRW_SFID_URB] = "urb",
287 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
288 [BRW_SFID_VME] = "vme",
289 };
290
291 static const char *const gen6_sfid[16] = {
292 [BRW_SFID_NULL] = "null",
293 [BRW_SFID_MATH] = "math",
294 [BRW_SFID_SAMPLER] = "sampler",
295 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
296 [BRW_SFID_URB] = "urb",
297 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
298 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
299 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
300 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
301 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
302 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
303 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
304 [HSW_SFID_CRE] = "cre",
305 };
306
307 static const char *const gen7_gateway_subfuncid[8] = {
308 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY] = "open",
309 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY] = "close",
310 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG] = "forward msg",
311 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP] = "get timestamp",
312 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG] = "barrier msg",
313 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE] = "update state",
314 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE] = "mmio read/write",
315 };
316
317 static const char *const gen4_dp_read_port_msg_type[4] = {
318 [0b00] = "OWord Block Read",
319 [0b01] = "OWord Dual Block Read",
320 [0b10] = "Media Block Read",
321 [0b11] = "DWord Scattered Read",
322 };
323
324 static const char *const g45_dp_read_port_msg_type[8] = {
325 [0b000] = "OWord Block Read",
326 [0b010] = "OWord Dual Block Read",
327 [0b100] = "Media Block Read",
328 [0b110] = "DWord Scattered Read",
329 [0b001] = "Render Target UNORM Read",
330 [0b011] = "AVC Loop Filter Read",
331 };
332
333 static const char *const dp_write_port_msg_type[8] = {
334 [0b000] = "OWord block write",
335 [0b001] = "OWord dual block write",
336 [0b010] = "media block write",
337 [0b011] = "DWord scattered write",
338 [0b100] = "RT write",
339 [0b101] = "streamed VB write",
340 [0b110] = "RT UNORM write", /* G45+ */
341 [0b111] = "flush render cache",
342 };
343
344 static const char *const dp_rc_msg_type_gen6[16] = {
345 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
346 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
347 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
348 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
349 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
350 "OWORD unaligned block read",
351 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
352 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
353 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
354 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
355 "OWORD dual block write",
356 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
357 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
358 "DWORD scattered write",
359 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
360 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
361 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
362 };
363
364 static const char *const dp_rc_msg_type_gen7[16] = {
365 [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ] = "media block read",
366 [GEN7_DATAPORT_RC_TYPED_SURFACE_READ] = "typed surface read",
367 [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP] = "typed atomic op",
368 [GEN7_DATAPORT_RC_MEMORY_FENCE] = "memory fence",
369 [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE] = "media block write",
370 [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write",
371 [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE] = "typed surface write"
372 };
373
374 static const char *const dp_rc_msg_type_gen9[16] = {
375 [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write",
376 [GEN9_DATAPORT_RC_RENDER_TARGET_READ] = "RT read"
377 };
378
379 static const char *const *
380 dp_rc_msg_type(const struct gen_device_info *devinfo)
381 {
382 return (devinfo->gen >= 9 ? dp_rc_msg_type_gen9 :
383 devinfo->gen >= 7 ? dp_rc_msg_type_gen7 :
384 devinfo->gen >= 6 ? dp_rc_msg_type_gen6 :
385 dp_write_port_msg_type);
386 }
387
388 static const char *const m_rt_write_subtype[] = {
389 [0b000] = "SIMD16",
390 [0b001] = "SIMD16/RepData",
391 [0b010] = "SIMD8/DualSrcLow",
392 [0b011] = "SIMD8/DualSrcHigh",
393 [0b100] = "SIMD8",
394 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
395 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
396 };
397
398 static const char *const dp_dc0_msg_type_gen7[16] = {
399 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
400 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
401 "DC unaligned OWORD block read",
402 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
403 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
404 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
405 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read",
406 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
407 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
408 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
409 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
410 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
411 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
412 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
413 };
414
415 static const char *const dp_dc1_msg_type_hsw[16] = {
416 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
417 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
418 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
419 "DC untyped 4x2 atomic op",
420 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
421 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
422 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
423 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
424 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
425 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
426 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
427 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
428 "DC 4x2 atomic counter op",
429 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
430 };
431
432 static const char *const aop[16] = {
433 [BRW_AOP_AND] = "and",
434 [BRW_AOP_OR] = "or",
435 [BRW_AOP_XOR] = "xor",
436 [BRW_AOP_MOV] = "mov",
437 [BRW_AOP_INC] = "inc",
438 [BRW_AOP_DEC] = "dec",
439 [BRW_AOP_ADD] = "add",
440 [BRW_AOP_SUB] = "sub",
441 [BRW_AOP_REVSUB] = "revsub",
442 [BRW_AOP_IMAX] = "imax",
443 [BRW_AOP_IMIN] = "imin",
444 [BRW_AOP_UMAX] = "umax",
445 [BRW_AOP_UMIN] = "umin",
446 [BRW_AOP_CMPWR] = "cmpwr",
447 [BRW_AOP_PREDEC] = "predec",
448 };
449
450 static const char * const pixel_interpolator_msg_types[4] = {
451 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",
452 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",
453 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",
454 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",
455 };
456
457 static const char *const math_function[16] = {
458 [BRW_MATH_FUNCTION_INV] = "inv",
459 [BRW_MATH_FUNCTION_LOG] = "log",
460 [BRW_MATH_FUNCTION_EXP] = "exp",
461 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
462 [BRW_MATH_FUNCTION_RSQ] = "rsq",
463 [BRW_MATH_FUNCTION_SIN] = "sin",
464 [BRW_MATH_FUNCTION_COS] = "cos",
465 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
466 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
467 [BRW_MATH_FUNCTION_POW] = "pow",
468 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
469 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
470 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
471 [GEN8_MATH_FUNCTION_INVM] = "invm",
472 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
473 };
474
475 static const char *const math_saturate[2] = {
476 [0] = "",
477 [1] = "sat"
478 };
479
480 static const char *const math_signed[2] = {
481 [0] = "",
482 [1] = "signed"
483 };
484
485 static const char *const math_scalar[2] = {
486 [0] = "",
487 [1] = "scalar"
488 };
489
490 static const char *const math_precision[2] = {
491 [0] = "",
492 [1] = "partial_precision"
493 };
494
495 static const char *const gen5_urb_opcode[] = {
496 [0] = "urb_write",
497 [1] = "ff_sync",
498 };
499
500 static const char *const gen7_urb_opcode[] = {
501 [BRW_URB_OPCODE_WRITE_HWORD] = "write HWord",
502 [BRW_URB_OPCODE_WRITE_OWORD] = "write OWord",
503 [BRW_URB_OPCODE_READ_HWORD] = "read HWord",
504 [BRW_URB_OPCODE_READ_OWORD] = "read OWord",
505 [GEN7_URB_OPCODE_ATOMIC_MOV] = "atomic mov", /* Gen7+ */
506 [GEN7_URB_OPCODE_ATOMIC_INC] = "atomic inc", /* Gen7+ */
507 [GEN8_URB_OPCODE_ATOMIC_ADD] = "atomic add", /* Gen8+ */
508 [GEN8_URB_OPCODE_SIMD8_WRITE] = "SIMD8 write", /* Gen8+ */
509 [GEN8_URB_OPCODE_SIMD8_READ] = "SIMD8 read", /* Gen8+ */
510 /* [9-15] - reserved */
511 };
512
513 static const char *const urb_swizzle[4] = {
514 [BRW_URB_SWIZZLE_NONE] = "",
515 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
516 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
517 };
518
519 static const char *const urb_allocate[2] = {
520 [0] = "",
521 [1] = "allocate"
522 };
523
524 static const char *const urb_used[2] = {
525 [0] = "",
526 [1] = "used"
527 };
528
529 static const char *const urb_complete[2] = {
530 [0] = "",
531 [1] = "complete"
532 };
533
534 static const char *const gen5_sampler_msg_type[] = {
535 [GEN5_SAMPLER_MESSAGE_SAMPLE] = "sample",
536 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS] = "sample_b",
537 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD] = "sample_l",
538 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE] = "sample_c",
539 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS] = "sample_d",
540 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c",
541 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE] = "sample_l_c",
542 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD] = "ld",
543 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4] = "gather4",
544 [GEN5_SAMPLER_MESSAGE_LOD] = "lod",
545 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO] = "resinfo",
546 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO] = "sampleinfo",
547 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C] = "gather4_c",
548 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po",
549 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c",
550 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c",
551 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ] = "sample_lz",
552 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ] = "sample_c_lz",
553 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ] = "ld_lz",
554 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W] = "ld2dms_w",
555 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs",
556 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS] = "ld2dms",
557 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss",
558 };
559
560 static const char *const gen5_sampler_simd_mode[4] = {
561 [BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2",
562 [BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8",
563 [BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16",
564 [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64",
565 };
566
567 static const char *const sampler_target_format[4] = {
568 [0] = "F",
569 [2] = "UD",
570 [3] = "D"
571 };
572
573
574 static int column;
575
576 static int
577 string(FILE *file, const char *string)
578 {
579 fputs(string, file);
580 column += strlen(string);
581 return 0;
582 }
583
584 static int
585 format(FILE *f, const char *format, ...) PRINTFLIKE(2, 3);
586
587 static int
588 format(FILE *f, const char *format, ...)
589 {
590 char buf[1024];
591 va_list args;
592 va_start(args, format);
593
594 vsnprintf(buf, sizeof(buf) - 1, format, args);
595 va_end(args);
596 string(f, buf);
597 return 0;
598 }
599
600 static int
601 newline(FILE *f)
602 {
603 putc('\n', f);
604 column = 0;
605 return 0;
606 }
607
608 static int
609 pad(FILE *f, int c)
610 {
611 do
612 string(f, " ");
613 while (column < c);
614 return 0;
615 }
616
617 static int
618 control(FILE *file, const char *name, const char *const ctrl[],
619 unsigned id, int *space)
620 {
621 if (!ctrl[id]) {
622 fprintf(file, "*** invalid %s value %d ", name, id);
623 return 1;
624 }
625 if (ctrl[id][0]) {
626 if (space && *space)
627 string(file, " ");
628 string(file, ctrl[id]);
629 if (space)
630 *space = 1;
631 }
632 return 0;
633 }
634
635 static int
636 print_opcode(FILE *file, const struct gen_device_info *devinfo,
637 enum opcode id)
638 {
639 const struct opcode_desc *desc = brw_opcode_desc(devinfo, id);
640 if (!desc) {
641 format(file, "*** invalid opcode value %d ", id);
642 return 1;
643 }
644 string(file, desc->name);
645 return 0;
646 }
647
648 static int
649 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
650 {
651 int err = 0;
652
653 /* Clear the Compr4 instruction compression bit. */
654 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
655 _reg_nr &= ~BRW_MRF_COMPR4;
656
657 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
658 switch (_reg_nr & 0xf0) {
659 case BRW_ARF_NULL:
660 string(file, "null");
661 break;
662 case BRW_ARF_ADDRESS:
663 format(file, "a%d", _reg_nr & 0x0f);
664 break;
665 case BRW_ARF_ACCUMULATOR:
666 format(file, "acc%d", _reg_nr & 0x0f);
667 break;
668 case BRW_ARF_FLAG:
669 format(file, "f%d", _reg_nr & 0x0f);
670 break;
671 case BRW_ARF_MASK:
672 format(file, "mask%d", _reg_nr & 0x0f);
673 break;
674 case BRW_ARF_MASK_STACK:
675 format(file, "msd%d", _reg_nr & 0x0f);
676 break;
677 case BRW_ARF_STATE:
678 format(file, "sr%d", _reg_nr & 0x0f);
679 break;
680 case BRW_ARF_CONTROL:
681 format(file, "cr%d", _reg_nr & 0x0f);
682 break;
683 case BRW_ARF_NOTIFICATION_COUNT:
684 format(file, "n%d", _reg_nr & 0x0f);
685 break;
686 case BRW_ARF_IP:
687 string(file, "ip");
688 return -1;
689 break;
690 case BRW_ARF_TDR:
691 format(file, "tdr0");
692 return -1;
693 case BRW_ARF_TIMESTAMP:
694 format(file, "tm%d", _reg_nr & 0x0f);
695 break;
696 default:
697 format(file, "ARF%d", _reg_nr);
698 break;
699 }
700 } else {
701 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
702 format(file, "%d", _reg_nr);
703 }
704 return err;
705 }
706
707 static int
708 dest(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
709 {
710 enum brw_reg_type type = brw_inst_dst_type(devinfo, inst);
711 unsigned elem_size = brw_reg_type_to_size(type);
712 int err = 0;
713
714 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
715 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
716 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
717 brw_inst_dst_da_reg_nr(devinfo, inst));
718 if (err == -1)
719 return 0;
720 if (brw_inst_dst_da1_subreg_nr(devinfo, inst))
721 format(file, ".%"PRIu64, brw_inst_dst_da1_subreg_nr(devinfo, inst) /
722 elem_size);
723 string(file, "<");
724 err |= control(file, "horiz stride", horiz_stride,
725 brw_inst_dst_hstride(devinfo, inst), NULL);
726 string(file, ">");
727 string(file, brw_reg_type_to_letters(type));
728 } else {
729 string(file, "g[a0");
730 if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
731 format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) /
732 elem_size);
733 if (brw_inst_dst_ia1_addr_imm(devinfo, inst))
734 format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst));
735 string(file, "]<");
736 err |= control(file, "horiz stride", horiz_stride,
737 brw_inst_dst_hstride(devinfo, inst), NULL);
738 string(file, ">");
739 string(file, brw_reg_type_to_letters(type));
740 }
741 } else {
742 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
743 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
744 brw_inst_dst_da_reg_nr(devinfo, inst));
745 if (err == -1)
746 return 0;
747 if (brw_inst_dst_da16_subreg_nr(devinfo, inst))
748 format(file, ".%u", 16 / elem_size);
749 string(file, "<1>");
750 err |= control(file, "writemask", writemask,
751 brw_inst_da16_writemask(devinfo, inst), NULL);
752 string(file, brw_reg_type_to_letters(type));
753 } else {
754 err = 1;
755 string(file, "Indirect align16 address mode not supported");
756 }
757 }
758
759 return 0;
760 }
761
762 static int
763 dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
764 {
765 int err = 0;
766 uint32_t reg_file;
767 enum brw_reg_type type = brw_inst_3src_a16_dst_type(devinfo, inst);
768 unsigned dst_subreg_nr =
769 brw_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4 /
770 brw_reg_type_to_size(type);
771
772 if (devinfo->gen == 6 && brw_inst_3src_a16_dst_reg_file(devinfo, inst))
773 reg_file = BRW_MESSAGE_REGISTER_FILE;
774 else
775 reg_file = BRW_GENERAL_REGISTER_FILE;
776
777 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst));
778 if (err == -1)
779 return 0;
780 if (dst_subreg_nr)
781 format(file, ".%u", dst_subreg_nr);
782 string(file, "<1>");
783 err |= control(file, "writemask", writemask,
784 brw_inst_3src_a16_dst_writemask(devinfo, inst), NULL);
785 err |= control(file, "dest reg encoding", three_source_reg_encoding,
786 brw_inst_3src_a16_dst_hw_type(devinfo, inst), NULL);
787
788 return 0;
789 }
790
791 static int
792 src_align1_region(FILE *file,
793 unsigned _vert_stride, unsigned _width,
794 unsigned _horiz_stride)
795 {
796 int err = 0;
797 string(file, "<");
798 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
799 string(file, ",");
800 err |= control(file, "width", width, _width, NULL);
801 string(file, ",");
802 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
803 string(file, ">");
804 return err;
805 }
806
807 static int
808 src_da1(FILE *file,
809 const struct gen_device_info *devinfo,
810 unsigned opcode,
811 enum brw_reg_type type, unsigned _reg_file,
812 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
813 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
814 unsigned _negate)
815 {
816 int err = 0;
817
818 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
819 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
820 else
821 err |= control(file, "negate", m_negate, _negate, NULL);
822
823 err |= control(file, "abs", _abs, __abs, NULL);
824
825 err |= reg(file, _reg_file, reg_num);
826 if (err == -1)
827 return 0;
828 if (sub_reg_num) {
829 unsigned elem_size = brw_reg_type_to_size(type);
830 format(file, ".%d", sub_reg_num / elem_size); /* use formal style like spec */
831 }
832 src_align1_region(file, _vert_stride, _width, _horiz_stride);
833 string(file, brw_reg_type_to_letters(type));
834 return err;
835 }
836
837 static int
838 src_ia1(FILE *file,
839 const struct gen_device_info *devinfo,
840 unsigned opcode,
841 enum brw_reg_type type,
842 unsigned _reg_file,
843 int _addr_imm,
844 unsigned _addr_subreg_nr,
845 unsigned _negate,
846 unsigned __abs,
847 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
848 {
849 int err = 0;
850
851 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
852 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
853 else
854 err |= control(file, "negate", m_negate, _negate, NULL);
855
856 err |= control(file, "abs", _abs, __abs, NULL);
857
858 string(file, "g[a0");
859 if (_addr_subreg_nr)
860 format(file, ".%d", _addr_subreg_nr);
861 if (_addr_imm)
862 format(file, " %d", _addr_imm);
863 string(file, "]");
864 src_align1_region(file, _vert_stride, _width, _horiz_stride);
865 string(file, brw_reg_type_to_letters(type));
866 return err;
867 }
868
869 static int
870 src_swizzle(FILE *file, unsigned swiz)
871 {
872 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
873 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
874 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
875 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
876 int err = 0;
877
878 if (x == y && x == z && x == w) {
879 string(file, ".");
880 err |= control(file, "channel select", chan_sel, x, NULL);
881 } else if (swiz != BRW_SWIZZLE_XYZW) {
882 string(file, ".");
883 err |= control(file, "channel select", chan_sel, x, NULL);
884 err |= control(file, "channel select", chan_sel, y, NULL);
885 err |= control(file, "channel select", chan_sel, z, NULL);
886 err |= control(file, "channel select", chan_sel, w, NULL);
887 }
888 return err;
889 }
890
891 static int
892 src_da16(FILE *file,
893 const struct gen_device_info *devinfo,
894 unsigned opcode,
895 enum brw_reg_type type,
896 unsigned _reg_file,
897 unsigned _vert_stride,
898 unsigned _reg_nr,
899 unsigned _subreg_nr,
900 unsigned __abs,
901 unsigned _negate,
902 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
903 {
904 int err = 0;
905
906 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
907 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
908 else
909 err |= control(file, "negate", m_negate, _negate, NULL);
910
911 err |= control(file, "abs", _abs, __abs, NULL);
912
913 err |= reg(file, _reg_file, _reg_nr);
914 if (err == -1)
915 return 0;
916 if (_subreg_nr) {
917 unsigned elem_size = brw_reg_type_to_size(type);
918
919 /* bit4 for subreg number byte addressing. Make this same meaning as
920 in da1 case, so output looks consistent. */
921 format(file, ".%d", 16 / elem_size);
922 }
923 string(file, "<");
924 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
925 string(file, ">");
926 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
927 string(file, brw_reg_type_to_letters(type));
928 return err;
929 }
930
931 static int
932 src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
933 {
934 int err = 0;
935 enum brw_reg_type type = brw_inst_3src_a16_src_type(devinfo, inst);
936 unsigned src0_subreg_nr =
937 brw_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4 /
938 brw_reg_type_to_size(type);
939
940 err |= control(file, "negate", m_negate,
941 brw_inst_3src_src0_negate(devinfo, inst), NULL);
942 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL);
943
944 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
945 brw_inst_3src_src0_reg_nr(devinfo, inst));
946 if (err == -1)
947 return 0;
948 if (src0_subreg_nr || brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst))
949 format(file, ".%d", src0_subreg_nr);
950 if (brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst))
951 string(file, "<0,1,0>");
952 else {
953 string(file, "<4,4,1>");
954 err |= src_swizzle(file, brw_inst_3src_a16_src0_swizzle(devinfo, inst));
955 }
956 err |= control(file, "src da16 reg type", three_source_reg_encoding,
957 brw_inst_3src_a16_src_hw_type(devinfo, inst), NULL);
958 return err;
959 }
960
961 static int
962 src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
963 {
964 int err = 0;
965 enum brw_reg_type type = brw_inst_3src_a16_src_type(devinfo, inst);
966 unsigned src1_subreg_nr =
967 brw_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4 /
968 brw_reg_type_to_size(type);
969
970 err |= control(file, "negate", m_negate,
971 brw_inst_3src_src1_negate(devinfo, inst), NULL);
972 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL);
973
974 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
975 brw_inst_3src_src1_reg_nr(devinfo, inst));
976 if (err == -1)
977 return 0;
978 if (src1_subreg_nr || brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst))
979 format(file, ".%d", src1_subreg_nr);
980 if (brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst))
981 string(file, "<0,1,0>");
982 else {
983 string(file, "<4,4,1>");
984 err |= src_swizzle(file, brw_inst_3src_a16_src1_swizzle(devinfo, inst));
985 }
986 err |= control(file, "src da16 reg type", three_source_reg_encoding,
987 brw_inst_3src_a16_src_hw_type(devinfo, inst), NULL);
988 return err;
989 }
990
991
992 static int
993 src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
994 {
995 int err = 0;
996 enum brw_reg_type type = brw_inst_3src_a16_src_type(devinfo, inst);
997 unsigned src2_subreg_nr =
998 brw_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4 /
999 brw_reg_type_to_size(type);
1000
1001 err |= control(file, "negate", m_negate,
1002 brw_inst_3src_src2_negate(devinfo, inst), NULL);
1003 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL);
1004
1005 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
1006 brw_inst_3src_src2_reg_nr(devinfo, inst));
1007 if (err == -1)
1008 return 0;
1009 if (src2_subreg_nr || brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst))
1010 format(file, ".%d", src2_subreg_nr);
1011 if (brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst))
1012 string(file, "<0,1,0>");
1013 else {
1014 string(file, "<4,4,1>");
1015 err |= src_swizzle(file, brw_inst_3src_a16_src2_swizzle(devinfo, inst));
1016 }
1017 err |= control(file, "src da16 reg type", three_source_reg_encoding,
1018 brw_inst_3src_a16_src_hw_type(devinfo, inst), NULL);
1019 return err;
1020 }
1021
1022 static int
1023 imm(FILE *file, const struct gen_device_info *devinfo, enum brw_reg_type type,
1024 const brw_inst *inst)
1025 {
1026 switch (type) {
1027 case BRW_REGISTER_TYPE_UQ:
1028 format(file, "0x%016lxUQ", brw_inst_imm_uq(devinfo, inst));
1029 break;
1030 case BRW_REGISTER_TYPE_Q:
1031 format(file, "%ldQ", brw_inst_imm_uq(devinfo, inst));
1032 break;
1033 case BRW_REGISTER_TYPE_UD:
1034 format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst));
1035 break;
1036 case BRW_REGISTER_TYPE_D:
1037 format(file, "%dD", brw_inst_imm_d(devinfo, inst));
1038 break;
1039 case BRW_REGISTER_TYPE_UW:
1040 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst));
1041 break;
1042 case BRW_REGISTER_TYPE_W:
1043 format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst));
1044 break;
1045 case BRW_REGISTER_TYPE_UV:
1046 format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
1047 break;
1048 case BRW_REGISTER_TYPE_VF:
1049 format(file, "[%-gF, %-gF, %-gF, %-gF]VF",
1050 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
1051 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),
1052 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),
1053 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24));
1054 break;
1055 case BRW_REGISTER_TYPE_V:
1056 format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));
1057 break;
1058 case BRW_REGISTER_TYPE_F:
1059 format(file, "%-gF", brw_inst_imm_f(devinfo, inst));
1060 break;
1061 case BRW_REGISTER_TYPE_DF:
1062 format(file, "%-gDF", brw_inst_imm_df(devinfo, inst));
1063 break;
1064 case BRW_REGISTER_TYPE_HF:
1065 string(file, "Half Float IMM");
1066 break;
1067 case BRW_REGISTER_TYPE_UB:
1068 case BRW_REGISTER_TYPE_B:
1069 format(file, "*** invalid immediate type %d ", type);
1070 }
1071 return 0;
1072 }
1073
1074 static int
1075 src0(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1076 {
1077 if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1078 return imm(file, devinfo, brw_inst_src0_type(devinfo, inst), inst);
1079 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1080 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1081 return src_da1(file,
1082 devinfo,
1083 brw_inst_opcode(devinfo, inst),
1084 brw_inst_src0_type(devinfo, inst),
1085 brw_inst_src0_reg_file(devinfo, inst),
1086 brw_inst_src0_vstride(devinfo, inst),
1087 brw_inst_src0_width(devinfo, inst),
1088 brw_inst_src0_hstride(devinfo, inst),
1089 brw_inst_src0_da_reg_nr(devinfo, inst),
1090 brw_inst_src0_da1_subreg_nr(devinfo, inst),
1091 brw_inst_src0_abs(devinfo, inst),
1092 brw_inst_src0_negate(devinfo, inst));
1093 } else {
1094 return src_ia1(file,
1095 devinfo,
1096 brw_inst_opcode(devinfo, inst),
1097 brw_inst_src0_type(devinfo, inst),
1098 brw_inst_src0_reg_file(devinfo, inst),
1099 brw_inst_src0_ia1_addr_imm(devinfo, inst),
1100 brw_inst_src0_ia_subreg_nr(devinfo, inst),
1101 brw_inst_src0_negate(devinfo, inst),
1102 brw_inst_src0_abs(devinfo, inst),
1103 brw_inst_src0_hstride(devinfo, inst),
1104 brw_inst_src0_width(devinfo, inst),
1105 brw_inst_src0_vstride(devinfo, inst));
1106 }
1107 } else {
1108 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1109 return src_da16(file,
1110 devinfo,
1111 brw_inst_opcode(devinfo, inst),
1112 brw_inst_src0_type(devinfo, inst),
1113 brw_inst_src0_reg_file(devinfo, inst),
1114 brw_inst_src0_vstride(devinfo, inst),
1115 brw_inst_src0_da_reg_nr(devinfo, inst),
1116 brw_inst_src0_da16_subreg_nr(devinfo, inst),
1117 brw_inst_src0_abs(devinfo, inst),
1118 brw_inst_src0_negate(devinfo, inst),
1119 brw_inst_src0_da16_swiz_x(devinfo, inst),
1120 brw_inst_src0_da16_swiz_y(devinfo, inst),
1121 brw_inst_src0_da16_swiz_z(devinfo, inst),
1122 brw_inst_src0_da16_swiz_w(devinfo, inst));
1123 } else {
1124 string(file, "Indirect align16 address mode not supported");
1125 return 1;
1126 }
1127 }
1128 }
1129
1130 static int
1131 src1(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1132 {
1133 if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1134 return imm(file, devinfo, brw_inst_src1_type(devinfo, inst), inst);
1135 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1136 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1137 return src_da1(file,
1138 devinfo,
1139 brw_inst_opcode(devinfo, inst),
1140 brw_inst_src1_type(devinfo, inst),
1141 brw_inst_src1_reg_file(devinfo, inst),
1142 brw_inst_src1_vstride(devinfo, inst),
1143 brw_inst_src1_width(devinfo, inst),
1144 brw_inst_src1_hstride(devinfo, inst),
1145 brw_inst_src1_da_reg_nr(devinfo, inst),
1146 brw_inst_src1_da1_subreg_nr(devinfo, inst),
1147 brw_inst_src1_abs(devinfo, inst),
1148 brw_inst_src1_negate(devinfo, inst));
1149 } else {
1150 return src_ia1(file,
1151 devinfo,
1152 brw_inst_opcode(devinfo, inst),
1153 brw_inst_src1_type(devinfo, inst),
1154 brw_inst_src1_reg_file(devinfo, inst),
1155 brw_inst_src1_ia1_addr_imm(devinfo, inst),
1156 brw_inst_src1_ia_subreg_nr(devinfo, inst),
1157 brw_inst_src1_negate(devinfo, inst),
1158 brw_inst_src1_abs(devinfo, inst),
1159 brw_inst_src1_hstride(devinfo, inst),
1160 brw_inst_src1_width(devinfo, inst),
1161 brw_inst_src1_vstride(devinfo, inst));
1162 }
1163 } else {
1164 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1165 return src_da16(file,
1166 devinfo,
1167 brw_inst_opcode(devinfo, inst),
1168 brw_inst_src1_type(devinfo, inst),
1169 brw_inst_src1_reg_file(devinfo, inst),
1170 brw_inst_src1_vstride(devinfo, inst),
1171 brw_inst_src1_da_reg_nr(devinfo, inst),
1172 brw_inst_src1_da16_subreg_nr(devinfo, inst),
1173 brw_inst_src1_abs(devinfo, inst),
1174 brw_inst_src1_negate(devinfo, inst),
1175 brw_inst_src1_da16_swiz_x(devinfo, inst),
1176 brw_inst_src1_da16_swiz_y(devinfo, inst),
1177 brw_inst_src1_da16_swiz_z(devinfo, inst),
1178 brw_inst_src1_da16_swiz_w(devinfo, inst));
1179 } else {
1180 string(file, "Indirect align16 address mode not supported");
1181 return 1;
1182 }
1183 }
1184 }
1185
1186 static int
1187 qtr_ctrl(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1188 {
1189 int qtr_ctl = brw_inst_qtr_control(devinfo, inst);
1190 int exec_size = 1 << brw_inst_exec_size(devinfo, inst);
1191 const unsigned nib_ctl = devinfo->gen < 7 ? 0 :
1192 brw_inst_nib_control(devinfo, inst);
1193
1194 if (exec_size < 8 || nib_ctl) {
1195 format(file, " %dN", qtr_ctl * 2 + nib_ctl + 1);
1196 } else if (exec_size == 8) {
1197 switch (qtr_ctl) {
1198 case 0:
1199 string(file, " 1Q");
1200 break;
1201 case 1:
1202 string(file, " 2Q");
1203 break;
1204 case 2:
1205 string(file, " 3Q");
1206 break;
1207 case 3:
1208 string(file, " 4Q");
1209 break;
1210 }
1211 } else if (exec_size == 16) {
1212 if (qtr_ctl < 2)
1213 string(file, " 1H");
1214 else
1215 string(file, " 2H");
1216 }
1217 return 0;
1218 }
1219
1220 #ifdef DEBUG
1221 static __attribute__((__unused__)) int
1222 brw_disassemble_imm(const struct gen_device_info *devinfo,
1223 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0)
1224 {
1225 brw_inst inst;
1226 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0);
1227 inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2);
1228 return brw_disassemble_inst(stderr, devinfo, &inst, false);
1229 }
1230 #endif
1231
1232 int
1233 brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
1234 const brw_inst *inst, bool is_compacted)
1235 {
1236 int err = 0;
1237 int space = 0;
1238
1239 const enum opcode opcode = brw_inst_opcode(devinfo, inst);
1240 const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
1241
1242 if (brw_inst_pred_control(devinfo, inst)) {
1243 string(file, "(");
1244 err |= control(file, "predicate inverse", pred_inv,
1245 brw_inst_pred_inv(devinfo, inst), NULL);
1246 format(file, "f%"PRIu64, devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
1247 if (brw_inst_flag_subreg_nr(devinfo, inst))
1248 format(file, ".%"PRIu64, brw_inst_flag_subreg_nr(devinfo, inst));
1249 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1250 err |= control(file, "predicate control align1", pred_ctrl_align1,
1251 brw_inst_pred_control(devinfo, inst), NULL);
1252 } else {
1253 err |= control(file, "predicate control align16", pred_ctrl_align16,
1254 brw_inst_pred_control(devinfo, inst), NULL);
1255 }
1256 string(file, ") ");
1257 }
1258
1259 err |= print_opcode(file, devinfo, opcode);
1260 err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst),
1261 NULL);
1262
1263 err |= control(file, "debug control", debug_ctrl,
1264 brw_inst_debug_control(devinfo, inst), NULL);
1265
1266 if (opcode == BRW_OPCODE_MATH) {
1267 string(file, " ");
1268 err |= control(file, "function", math_function,
1269 brw_inst_math_function(devinfo, inst), NULL);
1270 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
1271 err |= control(file, "conditional modifier", conditional_modifier,
1272 brw_inst_cond_modifier(devinfo, inst), NULL);
1273
1274 /* If we're using the conditional modifier, print which flags reg is
1275 * used for it. Note that on gen6+, the embedded-condition SEL and
1276 * control flow doesn't update flags.
1277 */
1278 if (brw_inst_cond_modifier(devinfo, inst) &&
1279 (devinfo->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1280 opcode != BRW_OPCODE_IF &&
1281 opcode != BRW_OPCODE_WHILE))) {
1282 format(file, ".f%"PRIu64,
1283 devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
1284 if (brw_inst_flag_subreg_nr(devinfo, inst))
1285 format(file, ".%"PRIu64, brw_inst_flag_subreg_nr(devinfo, inst));
1286 }
1287 }
1288
1289 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1290 string(file, "(");
1291 err |= control(file, "execution size", exec_size,
1292 brw_inst_exec_size(devinfo, inst), NULL);
1293 string(file, ")");
1294 }
1295
1296 if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6)
1297 format(file, " %"PRIu64, brw_inst_base_mrf(devinfo, inst));
1298
1299 if (has_uip(devinfo, opcode)) {
1300 /* Instructions that have UIP also have JIP. */
1301 pad(file, 16);
1302 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1303 pad(file, 32);
1304 format(file, "UIP: %d", brw_inst_uip(devinfo, inst));
1305 } else if (has_jip(devinfo, opcode)) {
1306 pad(file, 16);
1307 if (devinfo->gen >= 7) {
1308 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1309 } else {
1310 format(file, "JIP: %d", brw_inst_gen6_jump_count(devinfo, inst));
1311 }
1312 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1313 opcode == BRW_OPCODE_CONTINUE ||
1314 opcode == BRW_OPCODE_ELSE)) {
1315 pad(file, 16);
1316 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1317 pad(file, 32);
1318 format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
1319 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF ||
1320 opcode == BRW_OPCODE_IFF ||
1321 opcode == BRW_OPCODE_HALT)) {
1322 pad(file, 16);
1323 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1324 } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1325 pad(file, 16);
1326 format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
1327 } else if (opcode == BRW_OPCODE_JMPI) {
1328 pad(file, 16);
1329 err |= src1(file, devinfo, inst);
1330 } else if (desc && desc->nsrc == 3) {
1331 pad(file, 16);
1332 err |= dest_3src(file, devinfo, inst);
1333
1334 pad(file, 32);
1335 err |= src0_3src(file, devinfo, inst);
1336
1337 pad(file, 48);
1338 err |= src1_3src(file, devinfo, inst);
1339
1340 pad(file, 64);
1341 err |= src2_3src(file, devinfo, inst);
1342 } else if (desc) {
1343 if (desc->ndst > 0) {
1344 pad(file, 16);
1345 err |= dest(file, devinfo, inst);
1346 }
1347
1348 if (desc->nsrc > 0) {
1349 pad(file, 32);
1350 err |= src0(file, devinfo, inst);
1351 }
1352
1353 if (desc->nsrc > 1) {
1354 pad(file, 48);
1355 err |= src1(file, devinfo, inst);
1356 }
1357 }
1358
1359 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
1360 enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);
1361
1362 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1363 /* show the indirect descriptor source */
1364 pad(file, 48);
1365 err |= src1(file, devinfo, inst);
1366 }
1367
1368 newline(file);
1369 pad(file, 16);
1370 space = 0;
1371
1372 fprintf(file, " ");
1373 err |= control(file, "SFID", devinfo->gen >= 6 ? gen6_sfid : gen4_sfid,
1374 sfid, &space);
1375
1376
1377 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1378 format(file, " indirect");
1379 } else {
1380 switch (sfid) {
1381 case BRW_SFID_MATH:
1382 err |= control(file, "math function", math_function,
1383 brw_inst_math_msg_function(devinfo, inst), &space);
1384 err |= control(file, "math saturate", math_saturate,
1385 brw_inst_math_msg_saturate(devinfo, inst), &space);
1386 err |= control(file, "math signed", math_signed,
1387 brw_inst_math_msg_signed_int(devinfo, inst), &space);
1388 err |= control(file, "math scalar", math_scalar,
1389 brw_inst_math_msg_data_type(devinfo, inst), &space);
1390 err |= control(file, "math precision", math_precision,
1391 brw_inst_math_msg_precision(devinfo, inst), &space);
1392 break;
1393 case BRW_SFID_SAMPLER:
1394 if (devinfo->gen >= 5) {
1395 err |= control(file, "sampler message", gen5_sampler_msg_type,
1396 brw_inst_sampler_msg_type(devinfo, inst), &space);
1397 err |= control(file, "sampler simd mode", gen5_sampler_simd_mode,
1398 brw_inst_sampler_simd_mode(devinfo, inst), &space);
1399 format(file, " Surface = %"PRIu64" Sampler = %"PRIu64,
1400 brw_inst_binding_table_index(devinfo, inst),
1401 brw_inst_sampler(devinfo, inst));
1402 } else {
1403 format(file, " (%"PRIu64", %"PRIu64", %"PRIu64", ",
1404 brw_inst_binding_table_index(devinfo, inst),
1405 brw_inst_sampler(devinfo, inst),
1406 brw_inst_sampler_msg_type(devinfo, inst));
1407 if (!devinfo->is_g4x) {
1408 err |= control(file, "sampler target format",
1409 sampler_target_format,
1410 brw_inst_sampler_return_format(devinfo, inst), NULL);
1411 }
1412 string(file, ")");
1413 }
1414 break;
1415 case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1416 case GEN6_SFID_DATAPORT_CONSTANT_CACHE:
1417 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1418 if (devinfo->gen >= 6) {
1419 format(file, " (%"PRIu64", %"PRIu64", %"PRIu64", %"PRIu64")",
1420 brw_inst_binding_table_index(devinfo, inst),
1421 brw_inst_dp_msg_control(devinfo, inst),
1422 brw_inst_dp_msg_type(devinfo, inst),
1423 devinfo->gen >= 7 ? 0 : brw_inst_dp_write_commit(devinfo, inst));
1424 } else {
1425 bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x;
1426 err |= control(file, "DP read message type",
1427 is_965 ? gen4_dp_read_port_msg_type :
1428 g45_dp_read_port_msg_type,
1429 brw_inst_dp_read_msg_type(devinfo, inst),
1430 &space);
1431
1432 format(file, " MsgCtrl = 0x%"PRIx64,
1433 brw_inst_dp_read_msg_control(devinfo, inst));
1434
1435 format(file, " Surface = %"PRIu64, brw_inst_binding_table_index(devinfo, inst));
1436 }
1437 break;
1438
1439 case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1440 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1441 unsigned msg_type = brw_inst_dp_write_msg_type(devinfo, inst);
1442
1443 err |= control(file, "DP rc message type",
1444 dp_rc_msg_type(devinfo), msg_type, &space);
1445
1446 bool is_rt_write = msg_type ==
1447 (devinfo->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1448 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1449
1450 if (is_rt_write) {
1451 err |= control(file, "RT message type", m_rt_write_subtype,
1452 brw_inst_rt_message_type(devinfo, inst), &space);
1453 if (devinfo->gen >= 6 && brw_inst_rt_slot_group(devinfo, inst))
1454 string(file, " Hi");
1455 if (brw_inst_rt_last(devinfo, inst))
1456 string(file, " LastRT");
1457 if (devinfo->gen < 7 && brw_inst_dp_write_commit(devinfo, inst))
1458 string(file, " WriteCommit");
1459 } else {
1460 format(file, " MsgCtrl = 0x%"PRIx64,
1461 brw_inst_dp_write_msg_control(devinfo, inst));
1462 }
1463
1464 format(file, " Surface = %"PRIu64, brw_inst_binding_table_index(devinfo, inst));
1465 break;
1466 }
1467
1468 case BRW_SFID_URB: {
1469 unsigned opcode = brw_inst_urb_opcode(devinfo, inst);
1470
1471 format(file, " %"PRIu64, brw_inst_urb_global_offset(devinfo, inst));
1472
1473 space = 1;
1474
1475 err |= control(file, "urb opcode",
1476 devinfo->gen >= 7 ? gen7_urb_opcode
1477 : gen5_urb_opcode,
1478 opcode, &space);
1479
1480 if (devinfo->gen >= 7 &&
1481 brw_inst_urb_per_slot_offset(devinfo, inst)) {
1482 string(file, " per-slot");
1483 }
1484
1485 if (opcode == GEN8_URB_OPCODE_SIMD8_WRITE ||
1486 opcode == GEN8_URB_OPCODE_SIMD8_READ) {
1487 if (brw_inst_urb_channel_mask_present(devinfo, inst))
1488 string(file, " masked");
1489 } else {
1490 err |= control(file, "urb swizzle", urb_swizzle,
1491 brw_inst_urb_swizzle_control(devinfo, inst),
1492 &space);
1493 }
1494
1495 if (devinfo->gen < 7) {
1496 err |= control(file, "urb allocate", urb_allocate,
1497 brw_inst_urb_allocate(devinfo, inst), &space);
1498 err |= control(file, "urb used", urb_used,
1499 brw_inst_urb_used(devinfo, inst), &space);
1500 }
1501 if (devinfo->gen < 8) {
1502 err |= control(file, "urb complete", urb_complete,
1503 brw_inst_urb_complete(devinfo, inst), &space);
1504 }
1505 break;
1506 }
1507 case BRW_SFID_THREAD_SPAWNER:
1508 break;
1509
1510 case BRW_SFID_MESSAGE_GATEWAY:
1511 format(file, " (%s)",
1512 gen7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]);
1513 break;
1514
1515 case GEN7_SFID_DATAPORT_DATA_CACHE:
1516 if (devinfo->gen >= 7) {
1517 format(file, " (");
1518
1519 err |= control(file, "DP DC0 message type",
1520 dp_dc0_msg_type_gen7,
1521 brw_inst_dp_msg_type(devinfo, inst), &space);
1522
1523 format(file, ", %"PRIu64", ", brw_inst_binding_table_index(devinfo, inst));
1524
1525 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1526 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1527 control(file, "atomic op", aop,
1528 brw_inst_imm_ud(devinfo, inst) >> 8 & 0xf, &space);
1529 break;
1530 default:
1531 format(file, "%"PRIu64, brw_inst_dp_msg_control(devinfo, inst));
1532 }
1533 format(file, ")");
1534 break;
1535 }
1536 /* FALLTHROUGH */
1537
1538 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1539 if (devinfo->gen >= 7) {
1540 format(file, " (");
1541
1542 unsigned msg_ctrl = brw_inst_dp_msg_control(devinfo, inst);
1543
1544 err |= control(file, "DP DC1 message type",
1545 dp_dc1_msg_type_hsw,
1546 brw_inst_dp_msg_type(devinfo, inst), &space);
1547
1548 format(file, ", Surface = %"PRIu64", ",
1549 brw_inst_binding_table_index(devinfo, inst));
1550
1551 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1552 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1553 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1554 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1555 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1556 /* fallthrough */
1557 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1558 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1559 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1560 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1561 break;
1562 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1563 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1564 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1565 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: {
1566 static const char *simd_modes[] = { "4x2", "16", "8" };
1567 format(file, "SIMD%s, Mask = 0x%x",
1568 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
1569 break;
1570 }
1571 default:
1572 format(file, "0x%x", msg_ctrl);
1573 }
1574 format(file, ")");
1575 break;
1576 }
1577 /* FALLTHROUGH */
1578 }
1579
1580 case GEN7_SFID_PIXEL_INTERPOLATOR:
1581 if (devinfo->gen >= 7) {
1582 format(file, " (%s, %s, 0x%02"PRIx64")",
1583 brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp",
1584 pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)],
1585 brw_inst_pi_message_data(devinfo, inst));
1586 break;
1587 }
1588 /* FALLTHROUGH */
1589
1590 default:
1591 format(file, "unsupported shared function ID %d", sfid);
1592 break;
1593 }
1594
1595 if (space)
1596 string(file, " ");
1597 format(file, "mlen %"PRIu64, brw_inst_mlen(devinfo, inst));
1598 format(file, " rlen %"PRIu64, brw_inst_rlen(devinfo, inst));
1599 }
1600 }
1601 pad(file, 64);
1602 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1603 string(file, "{");
1604 space = 1;
1605 err |= control(file, "access mode", access_mode,
1606 brw_inst_access_mode(devinfo, inst), &space);
1607 if (devinfo->gen >= 6) {
1608 err |= control(file, "write enable control", wectrl,
1609 brw_inst_mask_control(devinfo, inst), &space);
1610 } else {
1611 err |= control(file, "mask control", mask_ctrl,
1612 brw_inst_mask_control(devinfo, inst), &space);
1613 }
1614 err |= control(file, "dependency control", dep_ctrl,
1615 ((brw_inst_no_dd_check(devinfo, inst) << 1) |
1616 brw_inst_no_dd_clear(devinfo, inst)), &space);
1617
1618 if (devinfo->gen >= 6)
1619 err |= qtr_ctrl(file, devinfo, inst);
1620 else {
1621 if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED &&
1622 desc && desc->ndst > 0 &&
1623 brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE &&
1624 brw_inst_dst_da_reg_nr(devinfo, inst) & BRW_MRF_COMPR4) {
1625 format(file, " compr4");
1626 } else {
1627 err |= control(file, "compression control", compr_ctrl,
1628 brw_inst_qtr_control(devinfo, inst), &space);
1629 }
1630 }
1631
1632 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
1633 err |= control(file, "thread control", thread_ctrl,
1634 brw_inst_thread_control(devinfo, inst), &space);
1635 if (has_branch_ctrl(devinfo, opcode)) {
1636 err |= control(file, "branch ctrl", branch_ctrl,
1637 brw_inst_branch_control(devinfo, inst), &space);
1638 } else if (devinfo->gen >= 6) {
1639 err |= control(file, "acc write control", accwr,
1640 brw_inst_acc_wr_control(devinfo, inst), &space);
1641 }
1642 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
1643 err |= control(file, "end of thread", end_of_thread,
1644 brw_inst_eot(devinfo, inst), &space);
1645 if (space)
1646 string(file, " ");
1647 string(file, "}");
1648 }
1649 string(file, ";");
1650 newline(file);
1651 return err;
1652 }