2 * Copyright © 2008 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
27 #include "brw_eu_defines.h"
29 #include "brw_shader.h"
33 #include "util/half_float.h"
36 has_jip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
41 return opcode
== BRW_OPCODE_IF
||
42 opcode
== BRW_OPCODE_ELSE
||
43 opcode
== BRW_OPCODE_ENDIF
||
44 opcode
== BRW_OPCODE_WHILE
||
45 opcode
== BRW_OPCODE_BREAK
||
46 opcode
== BRW_OPCODE_CONTINUE
||
47 opcode
== BRW_OPCODE_HALT
;
51 has_uip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
56 return (devinfo
->gen
>= 7 && opcode
== BRW_OPCODE_IF
) ||
57 (devinfo
->gen
>= 8 && opcode
== BRW_OPCODE_ELSE
) ||
58 opcode
== BRW_OPCODE_BREAK
||
59 opcode
== BRW_OPCODE_CONTINUE
||
60 opcode
== BRW_OPCODE_HALT
;
64 has_branch_ctrl(const struct gen_device_info
*devinfo
, enum opcode opcode
)
69 return opcode
== BRW_OPCODE_IF
||
70 opcode
== BRW_OPCODE_ELSE
;
71 /* opcode == BRW_OPCODE_GOTO; */
75 is_logic_instruction(unsigned opcode
)
77 return opcode
== BRW_OPCODE_AND
||
78 opcode
== BRW_OPCODE_NOT
||
79 opcode
== BRW_OPCODE_OR
||
80 opcode
== BRW_OPCODE_XOR
;
84 is_send(unsigned opcode
)
86 return opcode
== BRW_OPCODE_SEND
||
87 opcode
== BRW_OPCODE_SENDC
||
88 opcode
== BRW_OPCODE_SENDS
||
89 opcode
== BRW_OPCODE_SENDSC
;
93 is_split_send(UNUSED
const struct gen_device_info
*devinfo
, unsigned opcode
)
95 if (devinfo
->gen
>= 12)
96 return is_send(opcode
);
98 return opcode
== BRW_OPCODE_SENDS
||
99 opcode
== BRW_OPCODE_SENDSC
;
102 const char *const conditional_modifier
[16] = {
103 [BRW_CONDITIONAL_NONE
] = "",
104 [BRW_CONDITIONAL_Z
] = ".z",
105 [BRW_CONDITIONAL_NZ
] = ".nz",
106 [BRW_CONDITIONAL_G
] = ".g",
107 [BRW_CONDITIONAL_GE
] = ".ge",
108 [BRW_CONDITIONAL_L
] = ".l",
109 [BRW_CONDITIONAL_LE
] = ".le",
110 [BRW_CONDITIONAL_R
] = ".r",
111 [BRW_CONDITIONAL_O
] = ".o",
112 [BRW_CONDITIONAL_U
] = ".u",
115 static const char *const m_negate
[2] = {
120 static const char *const _abs
[2] = {
125 static const char *const m_bitnot
[2] = { "", "~" };
127 static const char *const vert_stride
[16] = {
138 static const char *const width
[8] = {
146 static const char *const horiz_stride
[4] = {
153 static const char *const chan_sel
[4] = {
160 static const char *const debug_ctrl
[2] = {
165 static const char *const saturate
[2] = {
170 static const char *const cmpt_ctrl
[2] = {
175 static const char *const accwr
[2] = {
180 static const char *const branch_ctrl
[2] = {
185 static const char *const wectrl
[2] = {
190 static const char *const exec_size
[8] = {
199 static const char *const pred_inv
[2] = {
204 const char *const pred_ctrl_align16
[16] = {
214 static const char *const pred_ctrl_align1
[16] = {
215 [BRW_PREDICATE_NORMAL
] = "",
216 [BRW_PREDICATE_ALIGN1_ANYV
] = ".anyv",
217 [BRW_PREDICATE_ALIGN1_ALLV
] = ".allv",
218 [BRW_PREDICATE_ALIGN1_ANY2H
] = ".any2h",
219 [BRW_PREDICATE_ALIGN1_ALL2H
] = ".all2h",
220 [BRW_PREDICATE_ALIGN1_ANY4H
] = ".any4h",
221 [BRW_PREDICATE_ALIGN1_ALL4H
] = ".all4h",
222 [BRW_PREDICATE_ALIGN1_ANY8H
] = ".any8h",
223 [BRW_PREDICATE_ALIGN1_ALL8H
] = ".all8h",
224 [BRW_PREDICATE_ALIGN1_ANY16H
] = ".any16h",
225 [BRW_PREDICATE_ALIGN1_ALL16H
] = ".all16h",
226 [BRW_PREDICATE_ALIGN1_ANY32H
] = ".any32h",
227 [BRW_PREDICATE_ALIGN1_ALL32H
] = ".all32h",
230 static const char *const thread_ctrl
[4] = {
231 [BRW_THREAD_NORMAL
] = "",
232 [BRW_THREAD_ATOMIC
] = "atomic",
233 [BRW_THREAD_SWITCH
] = "switch",
236 static const char *const compr_ctrl
[4] = {
243 static const char *const dep_ctrl
[4] = {
247 [3] = "NoDDClr,NoDDChk",
250 static const char *const mask_ctrl
[4] = {
255 static const char *const access_mode
[2] = {
260 static const char *const reg_file
[4] = {
267 static const char *const writemask
[16] = {
286 static const char *const end_of_thread
[2] = {
291 /* SFIDs on Gen4-5 */
292 static const char *const gen4_sfid
[16] = {
293 [BRW_SFID_NULL
] = "null",
294 [BRW_SFID_MATH
] = "math",
295 [BRW_SFID_SAMPLER
] = "sampler",
296 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
297 [BRW_SFID_DATAPORT_READ
] = "read",
298 [BRW_SFID_DATAPORT_WRITE
] = "write",
299 [BRW_SFID_URB
] = "urb",
300 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
301 [BRW_SFID_VME
] = "vme",
304 static const char *const gen6_sfid
[16] = {
305 [BRW_SFID_NULL
] = "null",
306 [BRW_SFID_MATH
] = "math",
307 [BRW_SFID_SAMPLER
] = "sampler",
308 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
309 [BRW_SFID_URB
] = "urb",
310 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
311 [GEN6_SFID_DATAPORT_SAMPLER_CACHE
] = "dp_sampler",
312 [GEN6_SFID_DATAPORT_RENDER_CACHE
] = "render",
313 [GEN6_SFID_DATAPORT_CONSTANT_CACHE
] = "const",
314 [GEN7_SFID_DATAPORT_DATA_CACHE
] = "data",
315 [GEN7_SFID_PIXEL_INTERPOLATOR
] = "pixel interp",
316 [HSW_SFID_DATAPORT_DATA_CACHE_1
] = "dp data 1",
317 [HSW_SFID_CRE
] = "cre",
320 static const char *const gen7_gateway_subfuncid
[8] = {
321 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY
] = "open",
322 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY
] = "close",
323 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG
] = "forward msg",
324 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP
] = "get timestamp",
325 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG
] = "barrier msg",
326 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE
] = "update state",
327 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE
] = "mmio read/write",
330 static const char *const gen4_dp_read_port_msg_type
[4] = {
331 [0b00] = "OWord Block Read",
332 [0b01] = "OWord Dual Block Read",
333 [0b10] = "Media Block Read",
334 [0b11] = "DWord Scattered Read",
337 static const char *const g45_dp_read_port_msg_type
[8] = {
338 [0b000] = "OWord Block Read",
339 [0b010] = "OWord Dual Block Read",
340 [0b100] = "Media Block Read",
341 [0b110] = "DWord Scattered Read",
342 [0b001] = "Render Target UNORM Read",
343 [0b011] = "AVC Loop Filter Read",
346 static const char *const dp_write_port_msg_type
[8] = {
347 [0b000] = "OWord block write",
348 [0b001] = "OWord dual block write",
349 [0b010] = "media block write",
350 [0b011] = "DWord scattered write",
351 [0b100] = "RT write",
352 [0b101] = "streamed VB write",
353 [0b110] = "RT UNORM write", /* G45+ */
354 [0b111] = "flush render cache",
357 static const char *const dp_rc_msg_type_gen6
[16] = {
358 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ
] = "OWORD block read",
359 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ
] = "RT UNORM read",
360 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ
] = "OWORD dual block read",
361 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ
] = "media block read",
362 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ
] =
363 "OWORD unaligned block read",
364 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ
] = "DWORD scattered read",
365 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE
] = "DWORD atomic write",
366 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE
] = "OWORD block write",
367 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE
] =
368 "OWORD dual block write",
369 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE
] = "media block write",
370 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE
] =
371 "DWORD scattered write",
372 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
] = "RT write",
373 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE
] = "streamed VB write",
374 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE
] = "RT UNORM write",
377 static const char *const dp_rc_msg_type_gen7
[16] = {
378 [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ
] = "media block read",
379 [GEN7_DATAPORT_RC_TYPED_SURFACE_READ
] = "typed surface read",
380 [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP
] = "typed atomic op",
381 [GEN7_DATAPORT_RC_MEMORY_FENCE
] = "memory fence",
382 [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE
] = "media block write",
383 [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
384 [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE
] = "typed surface write"
387 static const char *const dp_rc_msg_type_gen9
[16] = {
388 [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
389 [GEN9_DATAPORT_RC_RENDER_TARGET_READ
] = "RT read"
392 static const char *const *
393 dp_rc_msg_type(const struct gen_device_info
*devinfo
)
395 return (devinfo
->gen
>= 9 ? dp_rc_msg_type_gen9
:
396 devinfo
->gen
>= 7 ? dp_rc_msg_type_gen7
:
397 devinfo
->gen
>= 6 ? dp_rc_msg_type_gen6
:
398 dp_write_port_msg_type
);
401 static const char *const m_rt_write_subtype
[] = {
403 [0b001] = "SIMD16/RepData",
404 [0b010] = "SIMD8/DualSrcLow",
405 [0b011] = "SIMD8/DualSrcHigh",
407 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
408 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
411 static const char *const dp_dc0_msg_type_gen7
[16] = {
412 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ
] = "DC OWORD block read",
413 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ
] =
414 "DC unaligned OWORD block read",
415 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ
] = "DC OWORD dual block read",
416 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ
] = "DC DWORD scattered read",
417 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ
] = "DC byte scattered read",
418 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ
] = "DC untyped surface read",
419 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
] = "DC untyped atomic",
420 [GEN7_DATAPORT_DC_MEMORY_FENCE
] = "DC mfence",
421 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE
] = "DC OWORD block write",
422 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE
] = "DC OWORD dual block write",
423 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE
] = "DC DWORD scatterd write",
424 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE
] = "DC byte scattered write",
425 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
428 static const char *const dp_dc1_msg_type_hsw
[32] = {
429 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
] = "untyped surface read",
430 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
] = "DC untyped atomic op",
431 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
] =
432 "DC untyped 4x2 atomic op",
433 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ
] = "DC media block read",
434 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
] = "DC typed surface read",
435 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
] = "DC typed atomic",
436 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
] = "DC typed 4x2 atomic op",
437 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
438 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE
] = "DC media block write",
439 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
] = "DC atomic counter op",
440 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
] =
441 "DC 4x2 atomic counter op",
442 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
] = "DC typed surface write",
443 [GEN9_DATAPORT_DC_PORT1_A64_SCATTERED_READ
] = "DC A64 scattered read",
444 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ
] = "DC A64 untyped surface read",
445 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP
] = "DC A64 untyped atomic op",
446 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE
] = "DC A64 untyped surface write",
447 [GEN8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE
] = "DC A64 scattered write",
448 [GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP
] =
449 "DC untyped atomic float op",
450 [GEN9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP
] =
451 "DC A64 untyped atomic float op",
454 static const char *const aop
[16] = {
455 [BRW_AOP_AND
] = "and",
457 [BRW_AOP_XOR
] = "xor",
458 [BRW_AOP_MOV
] = "mov",
459 [BRW_AOP_INC
] = "inc",
460 [BRW_AOP_DEC
] = "dec",
461 [BRW_AOP_ADD
] = "add",
462 [BRW_AOP_SUB
] = "sub",
463 [BRW_AOP_REVSUB
] = "revsub",
464 [BRW_AOP_IMAX
] = "imax",
465 [BRW_AOP_IMIN
] = "imin",
466 [BRW_AOP_UMAX
] = "umax",
467 [BRW_AOP_UMIN
] = "umin",
468 [BRW_AOP_CMPWR
] = "cmpwr",
469 [BRW_AOP_PREDEC
] = "predec",
472 static const char *const aop_float
[4] = {
473 [BRW_AOP_FMAX
] = "fmax",
474 [BRW_AOP_FMIN
] = "fmin",
475 [BRW_AOP_FCMPWR
] = "fcmpwr",
478 static const char * const pixel_interpolator_msg_types
[4] = {
479 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET
] = "per_message_offset",
480 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE
] = "sample_position",
481 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID
] = "centroid",
482 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET
] = "per_slot_offset",
485 static const char *const math_function
[16] = {
486 [BRW_MATH_FUNCTION_INV
] = "inv",
487 [BRW_MATH_FUNCTION_LOG
] = "log",
488 [BRW_MATH_FUNCTION_EXP
] = "exp",
489 [BRW_MATH_FUNCTION_SQRT
] = "sqrt",
490 [BRW_MATH_FUNCTION_RSQ
] = "rsq",
491 [BRW_MATH_FUNCTION_SIN
] = "sin",
492 [BRW_MATH_FUNCTION_COS
] = "cos",
493 [BRW_MATH_FUNCTION_SINCOS
] = "sincos",
494 [BRW_MATH_FUNCTION_FDIV
] = "fdiv",
495 [BRW_MATH_FUNCTION_POW
] = "pow",
496 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER
] = "intdivmod",
497 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
] = "intdiv",
498 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER
] = "intmod",
499 [GEN8_MATH_FUNCTION_INVM
] = "invm",
500 [GEN8_MATH_FUNCTION_RSQRTM
] = "rsqrtm",
503 static const char *const sync_function
[16] = {
504 [TGL_SYNC_NOP
] = "nop",
505 [TGL_SYNC_ALLRD
] = "allrd",
506 [TGL_SYNC_ALLWR
] = "allwr",
507 [TGL_SYNC_BAR
] = "bar",
508 [TGL_SYNC_HOST
] = "host",
511 static const char *const math_saturate
[2] = {
516 static const char *const math_signed
[2] = {
521 static const char *const math_scalar
[2] = {
526 static const char *const math_precision
[2] = {
528 [1] = "partial_precision"
531 static const char *const gen5_urb_opcode
[] = {
536 static const char *const gen7_urb_opcode
[] = {
537 [BRW_URB_OPCODE_WRITE_HWORD
] = "write HWord",
538 [BRW_URB_OPCODE_WRITE_OWORD
] = "write OWord",
539 [BRW_URB_OPCODE_READ_HWORD
] = "read HWord",
540 [BRW_URB_OPCODE_READ_OWORD
] = "read OWord",
541 [GEN7_URB_OPCODE_ATOMIC_MOV
] = "atomic mov", /* Gen7+ */
542 [GEN7_URB_OPCODE_ATOMIC_INC
] = "atomic inc", /* Gen7+ */
543 [GEN8_URB_OPCODE_ATOMIC_ADD
] = "atomic add", /* Gen8+ */
544 [GEN8_URB_OPCODE_SIMD8_WRITE
] = "SIMD8 write", /* Gen8+ */
545 [GEN8_URB_OPCODE_SIMD8_READ
] = "SIMD8 read", /* Gen8+ */
546 /* [9-15] - reserved */
549 static const char *const urb_swizzle
[4] = {
550 [BRW_URB_SWIZZLE_NONE
] = "",
551 [BRW_URB_SWIZZLE_INTERLEAVE
] = "interleave",
552 [BRW_URB_SWIZZLE_TRANSPOSE
] = "transpose",
555 static const char *const urb_allocate
[2] = {
560 static const char *const urb_used
[2] = {
565 static const char *const urb_complete
[2] = {
570 static const char *const gen5_sampler_msg_type
[] = {
571 [GEN5_SAMPLER_MESSAGE_SAMPLE
] = "sample",
572 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS
] = "sample_b",
573 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD
] = "sample_l",
574 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE
] = "sample_c",
575 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS
] = "sample_d",
576 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE
] = "sample_b_c",
577 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE
] = "sample_l_c",
578 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD
] = "ld",
579 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4
] = "gather4",
580 [GEN5_SAMPLER_MESSAGE_LOD
] = "lod",
581 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO
] = "resinfo",
582 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO
] = "sampleinfo",
583 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C
] = "gather4_c",
584 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO
] = "gather4_po",
585 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C
] = "gather4_po_c",
586 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE
] = "sample_d_c",
587 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ
] = "sample_lz",
588 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ
] = "sample_c_lz",
589 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ
] = "ld_lz",
590 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W
] = "ld2dms_w",
591 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS
] = "ld_mcs",
592 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS
] = "ld2dms",
593 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS
] = "ld2dss",
596 static const char *const gen5_sampler_simd_mode
[4] = {
597 [BRW_SAMPLER_SIMD_MODE_SIMD4X2
] = "SIMD4x2",
598 [BRW_SAMPLER_SIMD_MODE_SIMD8
] = "SIMD8",
599 [BRW_SAMPLER_SIMD_MODE_SIMD16
] = "SIMD16",
600 [BRW_SAMPLER_SIMD_MODE_SIMD32_64
] = "SIMD32/64",
603 static const char *const sampler_target_format
[4] = {
613 string(FILE *file
, const char *string
)
616 column
+= strlen(string
);
621 format(FILE *f
, const char *format
, ...) PRINTFLIKE(2, 3);
624 format(FILE *f
, const char *format
, ...)
628 va_start(args
, format
);
630 vsnprintf(buf
, sizeof(buf
) - 1, format
, args
);
654 control(FILE *file
, const char *name
, const char *const ctrl
[],
655 unsigned id
, int *space
)
658 fprintf(file
, "*** invalid %s value %d ", name
, id
);
664 string(file
, ctrl
[id
]);
672 print_opcode(FILE *file
, const struct gen_device_info
*devinfo
,
675 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, id
);
677 format(file
, "*** invalid opcode value %d ", id
);
680 string(file
, desc
->name
);
685 reg(FILE *file
, unsigned _reg_file
, unsigned _reg_nr
)
689 /* Clear the Compr4 instruction compression bit. */
690 if (_reg_file
== BRW_MESSAGE_REGISTER_FILE
)
691 _reg_nr
&= ~BRW_MRF_COMPR4
;
693 if (_reg_file
== BRW_ARCHITECTURE_REGISTER_FILE
) {
694 switch (_reg_nr
& 0xf0) {
696 string(file
, "null");
698 case BRW_ARF_ADDRESS
:
699 format(file
, "a%d", _reg_nr
& 0x0f);
701 case BRW_ARF_ACCUMULATOR
:
702 format(file
, "acc%d", _reg_nr
& 0x0f);
705 format(file
, "f%d", _reg_nr
& 0x0f);
708 format(file
, "mask%d", _reg_nr
& 0x0f);
710 case BRW_ARF_MASK_STACK
:
711 format(file
, "msd%d", _reg_nr
& 0x0f);
714 format(file
, "sr%d", _reg_nr
& 0x0f);
716 case BRW_ARF_CONTROL
:
717 format(file
, "cr%d", _reg_nr
& 0x0f);
719 case BRW_ARF_NOTIFICATION_COUNT
:
720 format(file
, "n%d", _reg_nr
& 0x0f);
727 format(file
, "tdr0");
729 case BRW_ARF_TIMESTAMP
:
730 format(file
, "tm%d", _reg_nr
& 0x0f);
733 format(file
, "ARF%d", _reg_nr
);
737 err
|= control(file
, "src reg file", reg_file
, _reg_file
, NULL
);
738 format(file
, "%d", _reg_nr
);
744 dest(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
746 enum brw_reg_type type
= brw_inst_dst_type(devinfo
, inst
);
747 unsigned elem_size
= brw_reg_type_to_size(type
);
750 if (is_split_send(devinfo
, brw_inst_opcode(devinfo
, inst
))) {
751 /* These are fixed for split sends */
752 type
= BRW_REGISTER_TYPE_UD
;
754 if (devinfo
->gen
>= 12) {
755 err
|= reg(file
, brw_inst_send_dst_reg_file(devinfo
, inst
),
756 brw_inst_dst_da_reg_nr(devinfo
, inst
));
757 string(file
, brw_reg_type_to_letters(type
));
758 } else if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
759 err
|= reg(file
, brw_inst_send_dst_reg_file(devinfo
, inst
),
760 brw_inst_dst_da_reg_nr(devinfo
, inst
));
761 unsigned subreg_nr
= brw_inst_dst_da16_subreg_nr(devinfo
, inst
);
763 format(file
, ".%u", subreg_nr
);
764 string(file
, brw_reg_type_to_letters(type
));
766 string(file
, "g[a0");
767 if (brw_inst_dst_ia_subreg_nr(devinfo
, inst
))
768 format(file
, ".%"PRIu64
, brw_inst_dst_ia_subreg_nr(devinfo
, inst
) /
770 if (brw_inst_send_dst_ia16_addr_imm(devinfo
, inst
))
771 format(file
, " %d", brw_inst_send_dst_ia16_addr_imm(devinfo
, inst
));
773 string(file
, brw_reg_type_to_letters(type
));
775 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
776 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
777 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
778 brw_inst_dst_da_reg_nr(devinfo
, inst
));
781 if (brw_inst_dst_da1_subreg_nr(devinfo
, inst
))
782 format(file
, ".%"PRIu64
, brw_inst_dst_da1_subreg_nr(devinfo
, inst
) /
785 err
|= control(file
, "horiz stride", horiz_stride
,
786 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
788 string(file
, brw_reg_type_to_letters(type
));
790 string(file
, "g[a0");
791 if (brw_inst_dst_ia_subreg_nr(devinfo
, inst
))
792 format(file
, ".%"PRIu64
, brw_inst_dst_ia_subreg_nr(devinfo
, inst
) /
794 if (brw_inst_dst_ia1_addr_imm(devinfo
, inst
))
795 format(file
, " %d", brw_inst_dst_ia1_addr_imm(devinfo
, inst
));
797 err
|= control(file
, "horiz stride", horiz_stride
,
798 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
800 string(file
, brw_reg_type_to_letters(type
));
803 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
804 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
805 brw_inst_dst_da_reg_nr(devinfo
, inst
));
808 if (brw_inst_dst_da16_subreg_nr(devinfo
, inst
))
809 format(file
, ".%u", 16 / elem_size
);
811 err
|= control(file
, "writemask", writemask
,
812 brw_inst_da16_writemask(devinfo
, inst
), NULL
);
813 string(file
, brw_reg_type_to_letters(type
));
816 string(file
, "Indirect align16 address mode not supported");
824 dest_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
826 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
830 enum brw_reg_type type
;
832 if (devinfo
->gen
== 6 && brw_inst_3src_a16_dst_reg_file(devinfo
, inst
))
833 reg_file
= BRW_MESSAGE_REGISTER_FILE
;
834 else if (devinfo
->gen
>= 12)
835 reg_file
= brw_inst_3src_a1_dst_reg_file(devinfo
, inst
);
836 else if (is_align1
&& brw_inst_3src_a1_dst_reg_file(devinfo
, inst
))
837 reg_file
= BRW_ARCHITECTURE_REGISTER_FILE
;
839 reg_file
= BRW_GENERAL_REGISTER_FILE
;
841 err
|= reg(file
, reg_file
, brw_inst_3src_dst_reg_nr(devinfo
, inst
));
846 type
= brw_inst_3src_a1_dst_type(devinfo
, inst
);
847 subreg_nr
= brw_inst_3src_a1_dst_subreg_nr(devinfo
, inst
);
849 type
= brw_inst_3src_a16_dst_type(devinfo
, inst
);
850 subreg_nr
= brw_inst_3src_a16_dst_subreg_nr(devinfo
, inst
) * 4;
852 subreg_nr
/= brw_reg_type_to_size(type
);
855 format(file
, ".%u", subreg_nr
);
859 err
|= control(file
, "writemask", writemask
,
860 brw_inst_3src_a16_dst_writemask(devinfo
, inst
), NULL
);
862 string(file
, brw_reg_type_to_letters(type
));
868 src_align1_region(FILE *file
,
869 unsigned _vert_stride
, unsigned _width
,
870 unsigned _horiz_stride
)
874 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
876 err
|= control(file
, "width", width
, _width
, NULL
);
878 err
|= control(file
, "horiz_stride", horiz_stride
, _horiz_stride
, NULL
);
885 const struct gen_device_info
*devinfo
,
887 enum brw_reg_type type
, unsigned _reg_file
,
888 unsigned _vert_stride
, unsigned _width
, unsigned _horiz_stride
,
889 unsigned reg_num
, unsigned sub_reg_num
, unsigned __abs
,
894 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
895 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
897 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
899 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
901 err
|= reg(file
, _reg_file
, reg_num
);
905 unsigned elem_size
= brw_reg_type_to_size(type
);
906 format(file
, ".%d", sub_reg_num
/ elem_size
); /* use formal style like spec */
908 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
909 string(file
, brw_reg_type_to_letters(type
));
915 const struct gen_device_info
*devinfo
,
917 enum brw_reg_type type
,
919 unsigned _addr_subreg_nr
,
922 unsigned _horiz_stride
, unsigned _width
, unsigned _vert_stride
)
926 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
927 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
929 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
931 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
933 string(file
, "g[a0");
935 format(file
, ".%d", _addr_subreg_nr
);
937 format(file
, " %d", _addr_imm
);
939 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
940 string(file
, brw_reg_type_to_letters(type
));
945 src_swizzle(FILE *file
, unsigned swiz
)
947 unsigned x
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_X
);
948 unsigned y
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Y
);
949 unsigned z
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Z
);
950 unsigned w
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_W
);
953 if (x
== y
&& x
== z
&& x
== w
) {
955 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
956 } else if (swiz
!= BRW_SWIZZLE_XYZW
) {
958 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
959 err
|= control(file
, "channel select", chan_sel
, y
, NULL
);
960 err
|= control(file
, "channel select", chan_sel
, z
, NULL
);
961 err
|= control(file
, "channel select", chan_sel
, w
, NULL
);
968 const struct gen_device_info
*devinfo
,
970 enum brw_reg_type type
,
972 unsigned _vert_stride
,
977 unsigned swz_x
, unsigned swz_y
, unsigned swz_z
, unsigned swz_w
)
981 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
982 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
984 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
986 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
988 err
|= reg(file
, _reg_file
, _reg_nr
);
992 unsigned elem_size
= brw_reg_type_to_size(type
);
994 /* bit4 for subreg number byte addressing. Make this same meaning as
995 in da1 case, so output looks consistent. */
996 format(file
, ".%d", 16 / elem_size
);
999 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
1001 err
|= src_swizzle(file
, BRW_SWIZZLE4(swz_x
, swz_y
, swz_z
, swz_w
));
1002 string(file
, brw_reg_type_to_letters(type
));
1006 static enum brw_vertical_stride
1007 vstride_from_align1_3src_vstride(const struct gen_device_info
*devinfo
,
1008 enum gen10_align1_3src_vertical_stride vstride
)
1011 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_0
: return BRW_VERTICAL_STRIDE_0
;
1012 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2
:
1013 if (devinfo
->gen
>= 12)
1014 return BRW_VERTICAL_STRIDE_1
;
1016 return BRW_VERTICAL_STRIDE_2
;
1017 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_4
: return BRW_VERTICAL_STRIDE_4
;
1018 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8
: return BRW_VERTICAL_STRIDE_8
;
1020 unreachable("not reached");
1024 static enum brw_horizontal_stride
1025 hstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride
)
1028 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0
: return BRW_HORIZONTAL_STRIDE_0
;
1029 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1
: return BRW_HORIZONTAL_STRIDE_1
;
1030 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2
: return BRW_HORIZONTAL_STRIDE_2
;
1031 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4
: return BRW_HORIZONTAL_STRIDE_4
;
1033 unreachable("not reached");
1037 static enum brw_vertical_stride
1038 vstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride
)
1041 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0
: return BRW_VERTICAL_STRIDE_0
;
1042 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1
: return BRW_VERTICAL_STRIDE_1
;
1043 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2
: return BRW_VERTICAL_STRIDE_2
;
1044 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4
: return BRW_VERTICAL_STRIDE_4
;
1046 unreachable("not reached");
1050 /* From "GEN10 Regioning Rules for Align1 Ternary Operations" in the
1051 * "Register Region Restrictions" documentation
1053 static enum brw_width
1054 implied_width(enum brw_vertical_stride _vert_stride
,
1055 enum brw_horizontal_stride _horiz_stride
)
1057 /* "1. Width is 1 when Vertical and Horizontal Strides are both zero." */
1058 if (_vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1059 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
) {
1062 /* "2. Width is equal to vertical stride when Horizontal Stride is zero." */
1063 } else if (_horiz_stride
== BRW_HORIZONTAL_STRIDE_0
) {
1064 switch (_vert_stride
) {
1065 case BRW_VERTICAL_STRIDE_2
: return BRW_WIDTH_2
;
1066 case BRW_VERTICAL_STRIDE_4
: return BRW_WIDTH_4
;
1067 case BRW_VERTICAL_STRIDE_8
: return BRW_WIDTH_8
;
1068 case BRW_VERTICAL_STRIDE_0
:
1070 unreachable("not reached");
1074 /* FINISHME: Implement these: */
1076 /* "3. Width is equal to Vertical Stride/Horizontal Stride when both
1077 * Strides are non-zero.
1079 * 4. Vertical Stride must not be zero if Horizontal Stride is non-zero.
1080 * This implies Vertical Stride is always greater than Horizontal
1083 * Given these statements and the knowledge that the stride and width
1084 * values are encoded in logarithmic form, we can perform the division
1085 * by just subtracting.
1087 return _vert_stride
- _horiz_stride
;
1092 src0_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1095 unsigned reg_nr
, subreg_nr
;
1096 enum brw_reg_file _file
;
1097 enum brw_reg_type type
;
1098 enum brw_vertical_stride _vert_stride
;
1099 enum brw_width _width
;
1100 enum brw_horizontal_stride _horiz_stride
;
1101 bool is_scalar_region
;
1102 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1105 if (devinfo
->gen
>= 12 && !brw_inst_3src_a1_src0_is_imm(devinfo
, inst
)) {
1106 _file
= brw_inst_3src_a1_src0_reg_file(devinfo
, inst
);
1107 } else if (brw_inst_3src_a1_src0_reg_file(devinfo
, inst
) ==
1108 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1109 _file
= BRW_GENERAL_REGISTER_FILE
;
1110 } else if (brw_inst_3src_a1_src0_type(devinfo
, inst
) ==
1111 BRW_REGISTER_TYPE_NF
) {
1112 _file
= BRW_ARCHITECTURE_REGISTER_FILE
;
1114 _file
= BRW_IMMEDIATE_VALUE
;
1115 uint16_t imm_val
= brw_inst_3src_a1_src0_imm(devinfo
, inst
);
1116 enum brw_reg_type type
= brw_inst_3src_a1_src0_type(devinfo
, inst
);
1118 if (type
== BRW_REGISTER_TYPE_W
) {
1119 format(file
, "%dW", imm_val
);
1120 } else if (type
== BRW_REGISTER_TYPE_UW
) {
1121 format(file
, "0x%04xUW", imm_val
);
1122 } else if (type
== BRW_REGISTER_TYPE_HF
) {
1123 format(file
, "0x%04xHF", imm_val
);
1128 reg_nr
= brw_inst_3src_src0_reg_nr(devinfo
, inst
);
1129 subreg_nr
= brw_inst_3src_a1_src0_subreg_nr(devinfo
, inst
);
1130 type
= brw_inst_3src_a1_src0_type(devinfo
, inst
);
1131 _vert_stride
= vstride_from_align1_3src_vstride(
1132 devinfo
, brw_inst_3src_a1_src0_vstride(devinfo
, inst
));
1133 _horiz_stride
= hstride_from_align1_3src_hstride(
1134 brw_inst_3src_a1_src0_hstride(devinfo
, inst
));
1135 _width
= implied_width(_vert_stride
, _horiz_stride
);
1137 _file
= BRW_GENERAL_REGISTER_FILE
;
1138 reg_nr
= brw_inst_3src_src0_reg_nr(devinfo
, inst
);
1139 subreg_nr
= brw_inst_3src_a16_src0_subreg_nr(devinfo
, inst
) * 4;
1140 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1142 if (brw_inst_3src_a16_src0_rep_ctrl(devinfo
, inst
)) {
1143 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1144 _width
= BRW_WIDTH_1
;
1145 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1147 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1148 _width
= BRW_WIDTH_4
;
1149 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1152 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1153 _width
== BRW_WIDTH_1
&&
1154 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1156 subreg_nr
/= brw_reg_type_to_size(type
);
1158 err
|= control(file
, "negate", m_negate
,
1159 brw_inst_3src_src0_negate(devinfo
, inst
), NULL
);
1160 err
|= control(file
, "abs", _abs
, brw_inst_3src_src0_abs(devinfo
, inst
), NULL
);
1162 err
|= reg(file
, _file
, reg_nr
);
1165 if (subreg_nr
|| is_scalar_region
)
1166 format(file
, ".%d", subreg_nr
);
1167 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1168 if (!is_scalar_region
&& !is_align1
)
1169 err
|= src_swizzle(file
, brw_inst_3src_a16_src0_swizzle(devinfo
, inst
));
1170 string(file
, brw_reg_type_to_letters(type
));
1175 src1_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1178 unsigned reg_nr
, subreg_nr
;
1179 enum brw_reg_file _file
;
1180 enum brw_reg_type type
;
1181 enum brw_vertical_stride _vert_stride
;
1182 enum brw_width _width
;
1183 enum brw_horizontal_stride _horiz_stride
;
1184 bool is_scalar_region
;
1185 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1188 if (devinfo
->gen
>= 12) {
1189 _file
= brw_inst_3src_a1_src1_reg_file(devinfo
, inst
);
1190 } else if (brw_inst_3src_a1_src1_reg_file(devinfo
, inst
) ==
1191 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1192 _file
= BRW_GENERAL_REGISTER_FILE
;
1194 _file
= BRW_ARCHITECTURE_REGISTER_FILE
;
1197 reg_nr
= brw_inst_3src_src1_reg_nr(devinfo
, inst
);
1198 subreg_nr
= brw_inst_3src_a1_src1_subreg_nr(devinfo
, inst
);
1199 type
= brw_inst_3src_a1_src1_type(devinfo
, inst
);
1201 _vert_stride
= vstride_from_align1_3src_vstride(
1202 devinfo
, brw_inst_3src_a1_src1_vstride(devinfo
, inst
));
1203 _horiz_stride
= hstride_from_align1_3src_hstride(
1204 brw_inst_3src_a1_src1_hstride(devinfo
, inst
));
1205 _width
= implied_width(_vert_stride
, _horiz_stride
);
1207 _file
= BRW_GENERAL_REGISTER_FILE
;
1208 reg_nr
= brw_inst_3src_src1_reg_nr(devinfo
, inst
);
1209 subreg_nr
= brw_inst_3src_a16_src1_subreg_nr(devinfo
, inst
) * 4;
1210 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1212 if (brw_inst_3src_a16_src1_rep_ctrl(devinfo
, inst
)) {
1213 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1214 _width
= BRW_WIDTH_1
;
1215 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1217 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1218 _width
= BRW_WIDTH_4
;
1219 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1222 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1223 _width
== BRW_WIDTH_1
&&
1224 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1226 subreg_nr
/= brw_reg_type_to_size(type
);
1228 err
|= control(file
, "negate", m_negate
,
1229 brw_inst_3src_src1_negate(devinfo
, inst
), NULL
);
1230 err
|= control(file
, "abs", _abs
, brw_inst_3src_src1_abs(devinfo
, inst
), NULL
);
1232 err
|= reg(file
, _file
, reg_nr
);
1235 if (subreg_nr
|| is_scalar_region
)
1236 format(file
, ".%d", subreg_nr
);
1237 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1238 if (!is_scalar_region
&& !is_align1
)
1239 err
|= src_swizzle(file
, brw_inst_3src_a16_src1_swizzle(devinfo
, inst
));
1240 string(file
, brw_reg_type_to_letters(type
));
1245 src2_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1248 unsigned reg_nr
, subreg_nr
;
1249 enum brw_reg_file _file
;
1250 enum brw_reg_type type
;
1251 enum brw_vertical_stride _vert_stride
;
1252 enum brw_width _width
;
1253 enum brw_horizontal_stride _horiz_stride
;
1254 bool is_scalar_region
;
1255 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1258 if (devinfo
->gen
>= 12 && !brw_inst_3src_a1_src2_is_imm(devinfo
, inst
)) {
1259 _file
= brw_inst_3src_a1_src2_reg_file(devinfo
, inst
);
1260 } else if (brw_inst_3src_a1_src2_reg_file(devinfo
, inst
) ==
1261 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1262 _file
= BRW_GENERAL_REGISTER_FILE
;
1264 _file
= BRW_IMMEDIATE_VALUE
;
1265 uint16_t imm_val
= brw_inst_3src_a1_src2_imm(devinfo
, inst
);
1266 enum brw_reg_type type
= brw_inst_3src_a1_src2_type(devinfo
, inst
);
1268 if (type
== BRW_REGISTER_TYPE_W
) {
1269 format(file
, "%dW", imm_val
);
1270 } else if (type
== BRW_REGISTER_TYPE_UW
) {
1271 format(file
, "0x%04xUW", imm_val
);
1272 } else if (type
== BRW_REGISTER_TYPE_HF
) {
1273 format(file
, "0x%04xHF", imm_val
);
1278 reg_nr
= brw_inst_3src_src2_reg_nr(devinfo
, inst
);
1279 subreg_nr
= brw_inst_3src_a1_src2_subreg_nr(devinfo
, inst
);
1280 type
= brw_inst_3src_a1_src2_type(devinfo
, inst
);
1281 /* FINISHME: No vertical stride on src2. Is using the hstride in place
1282 * correct? Doesn't seem like it, since there's hstride=1 but
1285 _vert_stride
= vstride_from_align1_3src_hstride(
1286 brw_inst_3src_a1_src2_hstride(devinfo
, inst
));
1287 _horiz_stride
= hstride_from_align1_3src_hstride(
1288 brw_inst_3src_a1_src2_hstride(devinfo
, inst
));
1289 _width
= implied_width(_vert_stride
, _horiz_stride
);
1291 _file
= BRW_GENERAL_REGISTER_FILE
;
1292 reg_nr
= brw_inst_3src_src2_reg_nr(devinfo
, inst
);
1293 subreg_nr
= brw_inst_3src_a16_src2_subreg_nr(devinfo
, inst
) * 4;
1294 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1296 if (brw_inst_3src_a16_src2_rep_ctrl(devinfo
, inst
)) {
1297 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1298 _width
= BRW_WIDTH_1
;
1299 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1301 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1302 _width
= BRW_WIDTH_4
;
1303 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1306 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1307 _width
== BRW_WIDTH_1
&&
1308 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1310 subreg_nr
/= brw_reg_type_to_size(type
);
1312 err
|= control(file
, "negate", m_negate
,
1313 brw_inst_3src_src2_negate(devinfo
, inst
), NULL
);
1314 err
|= control(file
, "abs", _abs
, brw_inst_3src_src2_abs(devinfo
, inst
), NULL
);
1316 err
|= reg(file
, _file
, reg_nr
);
1319 if (subreg_nr
|| is_scalar_region
)
1320 format(file
, ".%d", subreg_nr
);
1321 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1322 if (!is_scalar_region
&& !is_align1
)
1323 err
|= src_swizzle(file
, brw_inst_3src_a16_src2_swizzle(devinfo
, inst
));
1324 string(file
, brw_reg_type_to_letters(type
));
1329 imm(FILE *file
, const struct gen_device_info
*devinfo
, enum brw_reg_type type
,
1330 const brw_inst
*inst
)
1333 case BRW_REGISTER_TYPE_UQ
:
1334 format(file
, "0x%016"PRIx64
"UQ", brw_inst_imm_uq(devinfo
, inst
));
1336 case BRW_REGISTER_TYPE_Q
:
1337 format(file
, "0x%016"PRIx64
"Q", brw_inst_imm_uq(devinfo
, inst
));
1339 case BRW_REGISTER_TYPE_UD
:
1340 format(file
, "0x%08xUD", brw_inst_imm_ud(devinfo
, inst
));
1342 case BRW_REGISTER_TYPE_D
:
1343 format(file
, "%dD", brw_inst_imm_d(devinfo
, inst
));
1345 case BRW_REGISTER_TYPE_UW
:
1346 format(file
, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo
, inst
));
1348 case BRW_REGISTER_TYPE_W
:
1349 format(file
, "%dW", (int16_t) brw_inst_imm_d(devinfo
, inst
));
1351 case BRW_REGISTER_TYPE_UV
:
1352 format(file
, "0x%08xUV", brw_inst_imm_ud(devinfo
, inst
));
1354 case BRW_REGISTER_TYPE_VF
:
1355 format(file
, "0x%"PRIx64
"VF", brw_inst_bits(inst
, 127, 96));
1357 format(file
, "/* [%-gF, %-gF, %-gF, %-gF]VF */",
1358 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
)),
1359 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 8),
1360 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 16),
1361 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 24));
1363 case BRW_REGISTER_TYPE_V
:
1364 format(file
, "0x%08xV", brw_inst_imm_ud(devinfo
, inst
));
1366 case BRW_REGISTER_TYPE_F
:
1367 /* The DIM instruction's src0 uses an F type but contains a
1370 if (brw_inst_opcode(devinfo
, inst
) == BRW_OPCODE_DIM
) {
1371 format(file
, "0x%"PRIx64
"F", brw_inst_bits(inst
, 127, 64));
1373 format(file
, "/* %-gF */", brw_inst_imm_df(devinfo
, inst
));
1375 format(file
, "0x%"PRIx64
"F", brw_inst_bits(inst
, 127, 96));
1377 format(file
, " /* %-gF */", brw_inst_imm_f(devinfo
, inst
));
1380 case BRW_REGISTER_TYPE_DF
:
1381 format(file
, "0x%016"PRIx64
"DF", brw_inst_bits(inst
, 127, 64));
1383 format(file
, "/* %-gDF */", brw_inst_imm_df(devinfo
, inst
));
1385 case BRW_REGISTER_TYPE_HF
:
1386 string(file
, "Half Float IMM");
1388 case BRW_REGISTER_TYPE_NF
:
1389 case BRW_REGISTER_TYPE_UB
:
1390 case BRW_REGISTER_TYPE_B
:
1391 format(file
, "*** invalid immediate type %d ", type
);
1397 src_sends_da(FILE *file
,
1398 const struct gen_device_info
*devinfo
,
1399 enum brw_reg_type type
,
1400 enum brw_reg_file _reg_file
,
1402 unsigned _reg_subnr
)
1406 err
|= reg(file
, _reg_file
, _reg_nr
);
1411 string(file
, brw_reg_type_to_letters(type
));
1417 src_sends_ia(FILE *file
,
1418 const struct gen_device_info
*devinfo
,
1419 enum brw_reg_type type
,
1421 unsigned _addr_subreg_nr
)
1423 string(file
, "g[a0");
1424 if (_addr_subreg_nr
)
1427 format(file
, " %d", _addr_imm
);
1429 string(file
, brw_reg_type_to_letters(type
));
1435 src0(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1437 if (is_split_send(devinfo
, brw_inst_opcode(devinfo
, inst
))) {
1438 if (devinfo
->gen
>= 12) {
1439 return src_sends_da(file
,
1441 BRW_REGISTER_TYPE_UD
,
1442 brw_inst_send_src0_reg_file(devinfo
, inst
),
1443 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1445 } else if (brw_inst_send_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1446 return src_sends_da(file
,
1448 BRW_REGISTER_TYPE_UD
,
1449 BRW_GENERAL_REGISTER_FILE
,
1450 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1451 brw_inst_src0_da16_subreg_nr(devinfo
, inst
));
1453 return src_sends_ia(file
,
1455 BRW_REGISTER_TYPE_UD
,
1456 brw_inst_send_src0_ia16_addr_imm(devinfo
, inst
),
1457 brw_inst_src0_ia_subreg_nr(devinfo
, inst
));
1459 } else if (brw_inst_src0_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1460 return imm(file
, devinfo
, brw_inst_src0_type(devinfo
, inst
), inst
);
1461 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1462 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1463 return src_da1(file
,
1465 brw_inst_opcode(devinfo
, inst
),
1466 brw_inst_src0_type(devinfo
, inst
),
1467 brw_inst_src0_reg_file(devinfo
, inst
),
1468 brw_inst_src0_vstride(devinfo
, inst
),
1469 brw_inst_src0_width(devinfo
, inst
),
1470 brw_inst_src0_hstride(devinfo
, inst
),
1471 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1472 brw_inst_src0_da1_subreg_nr(devinfo
, inst
),
1473 brw_inst_src0_abs(devinfo
, inst
),
1474 brw_inst_src0_negate(devinfo
, inst
));
1476 return src_ia1(file
,
1478 brw_inst_opcode(devinfo
, inst
),
1479 brw_inst_src0_type(devinfo
, inst
),
1480 brw_inst_src0_ia1_addr_imm(devinfo
, inst
),
1481 brw_inst_src0_ia_subreg_nr(devinfo
, inst
),
1482 brw_inst_src0_negate(devinfo
, inst
),
1483 brw_inst_src0_abs(devinfo
, inst
),
1484 brw_inst_src0_hstride(devinfo
, inst
),
1485 brw_inst_src0_width(devinfo
, inst
),
1486 brw_inst_src0_vstride(devinfo
, inst
));
1489 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1490 return src_da16(file
,
1492 brw_inst_opcode(devinfo
, inst
),
1493 brw_inst_src0_type(devinfo
, inst
),
1494 brw_inst_src0_reg_file(devinfo
, inst
),
1495 brw_inst_src0_vstride(devinfo
, inst
),
1496 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1497 brw_inst_src0_da16_subreg_nr(devinfo
, inst
),
1498 brw_inst_src0_abs(devinfo
, inst
),
1499 brw_inst_src0_negate(devinfo
, inst
),
1500 brw_inst_src0_da16_swiz_x(devinfo
, inst
),
1501 brw_inst_src0_da16_swiz_y(devinfo
, inst
),
1502 brw_inst_src0_da16_swiz_z(devinfo
, inst
),
1503 brw_inst_src0_da16_swiz_w(devinfo
, inst
));
1505 string(file
, "Indirect align16 address mode not supported");
1512 src1(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1514 if (is_split_send(devinfo
, brw_inst_opcode(devinfo
, inst
))) {
1515 return src_sends_da(file
,
1517 BRW_REGISTER_TYPE_UD
,
1518 brw_inst_send_src1_reg_file(devinfo
, inst
),
1519 brw_inst_send_src1_reg_nr(devinfo
, inst
),
1521 } else if (brw_inst_src1_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1522 return imm(file
, devinfo
, brw_inst_src1_type(devinfo
, inst
), inst
);
1523 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1524 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1525 return src_da1(file
,
1527 brw_inst_opcode(devinfo
, inst
),
1528 brw_inst_src1_type(devinfo
, inst
),
1529 brw_inst_src1_reg_file(devinfo
, inst
),
1530 brw_inst_src1_vstride(devinfo
, inst
),
1531 brw_inst_src1_width(devinfo
, inst
),
1532 brw_inst_src1_hstride(devinfo
, inst
),
1533 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1534 brw_inst_src1_da1_subreg_nr(devinfo
, inst
),
1535 brw_inst_src1_abs(devinfo
, inst
),
1536 brw_inst_src1_negate(devinfo
, inst
));
1538 return src_ia1(file
,
1540 brw_inst_opcode(devinfo
, inst
),
1541 brw_inst_src1_type(devinfo
, inst
),
1542 brw_inst_src1_ia1_addr_imm(devinfo
, inst
),
1543 brw_inst_src1_ia_subreg_nr(devinfo
, inst
),
1544 brw_inst_src1_negate(devinfo
, inst
),
1545 brw_inst_src1_abs(devinfo
, inst
),
1546 brw_inst_src1_hstride(devinfo
, inst
),
1547 brw_inst_src1_width(devinfo
, inst
),
1548 brw_inst_src1_vstride(devinfo
, inst
));
1551 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1552 return src_da16(file
,
1554 brw_inst_opcode(devinfo
, inst
),
1555 brw_inst_src1_type(devinfo
, inst
),
1556 brw_inst_src1_reg_file(devinfo
, inst
),
1557 brw_inst_src1_vstride(devinfo
, inst
),
1558 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1559 brw_inst_src1_da16_subreg_nr(devinfo
, inst
),
1560 brw_inst_src1_abs(devinfo
, inst
),
1561 brw_inst_src1_negate(devinfo
, inst
),
1562 brw_inst_src1_da16_swiz_x(devinfo
, inst
),
1563 brw_inst_src1_da16_swiz_y(devinfo
, inst
),
1564 brw_inst_src1_da16_swiz_z(devinfo
, inst
),
1565 brw_inst_src1_da16_swiz_w(devinfo
, inst
));
1567 string(file
, "Indirect align16 address mode not supported");
1574 qtr_ctrl(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1576 int qtr_ctl
= brw_inst_qtr_control(devinfo
, inst
);
1577 int exec_size
= 1 << brw_inst_exec_size(devinfo
, inst
);
1578 const unsigned nib_ctl
= devinfo
->gen
< 7 ? 0 :
1579 brw_inst_nib_control(devinfo
, inst
);
1581 if (exec_size
< 8 || nib_ctl
) {
1582 format(file
, " %dN", qtr_ctl
* 2 + nib_ctl
+ 1);
1583 } else if (exec_size
== 8) {
1586 string(file
, " 1Q");
1589 string(file
, " 2Q");
1592 string(file
, " 3Q");
1595 string(file
, " 4Q");
1598 } else if (exec_size
== 16) {
1600 string(file
, " 1H");
1602 string(file
, " 2H");
1608 swsb(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1610 const struct tgl_swsb swsb
= tgl_swsb_decode(brw_inst_swsb(devinfo
, inst
));
1612 format(file
, " @%d", swsb
.regdist
);
1614 format(file
, " $%d%s", swsb
.sbid
,
1615 (swsb
.mode
& TGL_SBID_SET
? "" :
1616 swsb
.mode
& TGL_SBID_DST
? ".dst" : ".src"));
1621 static __attribute__((__unused__
)) int
1622 brw_disassemble_imm(const struct gen_device_info
*devinfo
,
1623 uint32_t dw3
, uint32_t dw2
, uint32_t dw1
, uint32_t dw0
)
1626 inst
.data
[0] = (((uint64_t) dw1
) << 32) | ((uint64_t) dw0
);
1627 inst
.data
[1] = (((uint64_t) dw3
) << 32) | ((uint64_t) dw2
);
1628 return brw_disassemble_inst(stderr
, devinfo
, &inst
, false);
1633 brw_disassemble_inst(FILE *file
, const struct gen_device_info
*devinfo
,
1634 const brw_inst
*inst
, bool is_compacted
)
1639 const enum opcode opcode
= brw_inst_opcode(devinfo
, inst
);
1640 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, opcode
);
1642 if (brw_inst_pred_control(devinfo
, inst
)) {
1644 err
|= control(file
, "predicate inverse", pred_inv
,
1645 brw_inst_pred_inv(devinfo
, inst
), NULL
);
1646 format(file
, "f%"PRIu64
".%"PRIu64
,
1647 devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0,
1648 brw_inst_flag_subreg_nr(devinfo
, inst
));
1649 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1650 err
|= control(file
, "predicate control align1", pred_ctrl_align1
,
1651 brw_inst_pred_control(devinfo
, inst
), NULL
);
1653 err
|= control(file
, "predicate control align16", pred_ctrl_align16
,
1654 brw_inst_pred_control(devinfo
, inst
), NULL
);
1659 err
|= print_opcode(file
, devinfo
, opcode
);
1661 if (!is_send(opcode
))
1662 err
|= control(file
, "saturate", saturate
, brw_inst_saturate(devinfo
, inst
),
1665 err
|= control(file
, "debug control", debug_ctrl
,
1666 brw_inst_debug_control(devinfo
, inst
), NULL
);
1668 if (opcode
== BRW_OPCODE_MATH
) {
1670 err
|= control(file
, "function", math_function
,
1671 brw_inst_math_function(devinfo
, inst
), NULL
);
1673 } else if (opcode
== BRW_OPCODE_SYNC
) {
1675 err
|= control(file
, "function", sync_function
,
1676 brw_inst_cond_modifier(devinfo
, inst
), NULL
);
1678 } else if (!is_send(opcode
)) {
1679 err
|= control(file
, "conditional modifier", conditional_modifier
,
1680 brw_inst_cond_modifier(devinfo
, inst
), NULL
);
1682 /* If we're using the conditional modifier, print which flags reg is
1683 * used for it. Note that on gen6+, the embedded-condition SEL and
1684 * control flow doesn't update flags.
1686 if (brw_inst_cond_modifier(devinfo
, inst
) &&
1687 (devinfo
->gen
< 6 || (opcode
!= BRW_OPCODE_SEL
&&
1688 opcode
!= BRW_OPCODE_CSEL
&&
1689 opcode
!= BRW_OPCODE_IF
&&
1690 opcode
!= BRW_OPCODE_WHILE
))) {
1691 format(file
, ".f%"PRIu64
".%"PRIu64
,
1692 devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0,
1693 brw_inst_flag_subreg_nr(devinfo
, inst
));
1697 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1699 err
|= control(file
, "execution size", exec_size
,
1700 brw_inst_exec_size(devinfo
, inst
), NULL
);
1704 if (opcode
== BRW_OPCODE_SEND
&& devinfo
->gen
< 6)
1705 format(file
, " %"PRIu64
, brw_inst_base_mrf(devinfo
, inst
));
1707 if (has_uip(devinfo
, opcode
)) {
1708 /* Instructions that have UIP also have JIP. */
1710 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1712 format(file
, "UIP: %d", brw_inst_uip(devinfo
, inst
));
1713 } else if (has_jip(devinfo
, opcode
)) {
1715 if (devinfo
->gen
>= 7) {
1716 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1718 format(file
, "JIP: %d", brw_inst_gen6_jump_count(devinfo
, inst
));
1720 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_BREAK
||
1721 opcode
== BRW_OPCODE_CONTINUE
||
1722 opcode
== BRW_OPCODE_ELSE
)) {
1724 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1726 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1727 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_IF
||
1728 opcode
== BRW_OPCODE_IFF
||
1729 opcode
== BRW_OPCODE_HALT
||
1730 opcode
== BRW_OPCODE_WHILE
)) {
1732 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1733 } else if (devinfo
->gen
< 6 && opcode
== BRW_OPCODE_ENDIF
) {
1735 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1736 } else if (opcode
== BRW_OPCODE_JMPI
) {
1738 err
|= src1(file
, devinfo
, inst
);
1739 } else if (desc
&& desc
->nsrc
== 3) {
1741 err
|= dest_3src(file
, devinfo
, inst
);
1744 err
|= src0_3src(file
, devinfo
, inst
);
1747 err
|= src1_3src(file
, devinfo
, inst
);
1750 err
|= src2_3src(file
, devinfo
, inst
);
1752 if (desc
->ndst
> 0) {
1754 err
|= dest(file
, devinfo
, inst
);
1757 if (desc
->nsrc
> 0) {
1759 err
|= src0(file
, devinfo
, inst
);
1762 if (desc
->nsrc
> 1) {
1764 err
|= src1(file
, devinfo
, inst
);
1768 if (is_send(opcode
)) {
1769 enum brw_message_target sfid
= brw_inst_sfid(devinfo
, inst
);
1771 bool has_imm_desc
= false, has_imm_ex_desc
= false;
1772 uint32_t imm_desc
= 0, imm_ex_desc
= 0;
1773 if (is_split_send(devinfo
, opcode
)) {
1775 if (brw_inst_send_sel_reg32_desc(devinfo
, inst
)) {
1776 /* show the indirect descriptor source */
1777 err
|= src_sends_ia(file
, devinfo
, BRW_REGISTER_TYPE_UD
, 0, 0);
1779 has_imm_desc
= true;
1780 imm_desc
= brw_inst_send_desc(devinfo
, inst
);
1781 fprintf(file
, "0x%08"PRIx32
, imm_desc
);
1785 if (brw_inst_send_sel_reg32_ex_desc(devinfo
, inst
)) {
1786 /* show the indirect descriptor source */
1787 err
|= src_sends_ia(file
, devinfo
, BRW_REGISTER_TYPE_UD
, 0,
1788 brw_inst_send_ex_desc_ia_subreg_nr(devinfo
, inst
));
1790 has_imm_ex_desc
= true;
1791 imm_ex_desc
= brw_inst_sends_ex_desc(devinfo
, inst
);
1792 fprintf(file
, "0x%08"PRIx32
, imm_ex_desc
);
1795 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1796 /* show the indirect descriptor source */
1798 err
|= src1(file
, devinfo
, inst
);
1801 has_imm_desc
= true;
1802 imm_desc
= brw_inst_send_desc(devinfo
, inst
);
1806 /* Print message descriptor as immediate source */
1807 fprintf(file
, "0x%08"PRIx64
, inst
->data
[1] >> 32);
1815 err
|= control(file
, "SFID", devinfo
->gen
>= 6 ? gen6_sfid
: gen4_sfid
,
1817 string(file
, " MsgDesc:");
1819 if (!has_imm_desc
) {
1820 format(file
, " indirect");
1824 err
|= control(file
, "math function", math_function
,
1825 brw_inst_math_msg_function(devinfo
, inst
), &space
);
1826 err
|= control(file
, "math saturate", math_saturate
,
1827 brw_inst_math_msg_saturate(devinfo
, inst
), &space
);
1828 err
|= control(file
, "math signed", math_signed
,
1829 brw_inst_math_msg_signed_int(devinfo
, inst
), &space
);
1830 err
|= control(file
, "math scalar", math_scalar
,
1831 brw_inst_math_msg_data_type(devinfo
, inst
), &space
);
1832 err
|= control(file
, "math precision", math_precision
,
1833 brw_inst_math_msg_precision(devinfo
, inst
), &space
);
1835 case BRW_SFID_SAMPLER
:
1836 if (devinfo
->gen
>= 5) {
1837 err
|= control(file
, "sampler message", gen5_sampler_msg_type
,
1838 brw_sampler_desc_msg_type(devinfo
, imm_desc
),
1840 err
|= control(file
, "sampler simd mode", gen5_sampler_simd_mode
,
1841 brw_sampler_desc_simd_mode(devinfo
, imm_desc
),
1843 format(file
, " Surface = %u Sampler = %u",
1844 brw_sampler_desc_binding_table_index(devinfo
, imm_desc
),
1845 brw_sampler_desc_sampler(devinfo
, imm_desc
));
1847 format(file
, " (%u, %u, %u, ",
1848 brw_sampler_desc_binding_table_index(devinfo
, imm_desc
),
1849 brw_sampler_desc_sampler(devinfo
, imm_desc
),
1850 brw_sampler_desc_msg_type(devinfo
, imm_desc
));
1851 if (!devinfo
->is_g4x
) {
1852 err
|= control(file
, "sampler target format",
1853 sampler_target_format
,
1854 brw_sampler_desc_return_format(devinfo
, imm_desc
),
1860 case GEN6_SFID_DATAPORT_SAMPLER_CACHE
:
1861 case GEN6_SFID_DATAPORT_CONSTANT_CACHE
:
1862 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1863 if (devinfo
->gen
>= 6) {
1864 format(file
, " (%u, %u, %u, %u)",
1865 brw_dp_desc_binding_table_index(devinfo
, imm_desc
),
1866 brw_dp_desc_msg_control(devinfo
, imm_desc
),
1867 brw_dp_desc_msg_type(devinfo
, imm_desc
),
1868 devinfo
->gen
>= 7 ? 0u :
1869 brw_dp_write_desc_write_commit(devinfo
, imm_desc
));
1871 bool is_965
= devinfo
->gen
== 4 && !devinfo
->is_g4x
;
1872 err
|= control(file
, "DP read message type",
1873 is_965
? gen4_dp_read_port_msg_type
:
1874 g45_dp_read_port_msg_type
,
1875 brw_dp_read_desc_msg_type(devinfo
, imm_desc
),
1878 format(file
, " MsgCtrl = 0x%u",
1879 brw_dp_read_desc_msg_control(devinfo
, imm_desc
));
1881 format(file
, " Surface = %u",
1882 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
1886 case GEN6_SFID_DATAPORT_RENDER_CACHE
: {
1887 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1888 unsigned msg_type
= brw_dp_write_desc_msg_type(devinfo
, imm_desc
);
1890 err
|= control(file
, "DP rc message type",
1891 dp_rc_msg_type(devinfo
), msg_type
, &space
);
1893 bool is_rt_write
= msg_type
==
1894 (devinfo
->gen
>= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1895 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
);
1898 err
|= control(file
, "RT message type", m_rt_write_subtype
,
1899 brw_inst_rt_message_type(devinfo
, inst
), &space
);
1900 if (devinfo
->gen
>= 6 && brw_inst_rt_slot_group(devinfo
, inst
))
1901 string(file
, " Hi");
1902 if (brw_dp_write_desc_last_render_target(devinfo
, imm_desc
))
1903 string(file
, " LastRT");
1904 if (devinfo
->gen
< 7 &&
1905 brw_dp_write_desc_write_commit(devinfo
, imm_desc
))
1906 string(file
, " WriteCommit");
1908 format(file
, " MsgCtrl = 0x%u",
1909 brw_dp_write_desc_msg_control(devinfo
, imm_desc
));
1912 format(file
, " Surface = %u",
1913 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
1917 case BRW_SFID_URB
: {
1918 unsigned opcode
= brw_inst_urb_opcode(devinfo
, inst
);
1920 format(file
, " %"PRIu64
, brw_inst_urb_global_offset(devinfo
, inst
));
1924 err
|= control(file
, "urb opcode",
1925 devinfo
->gen
>= 7 ? gen7_urb_opcode
1929 if (devinfo
->gen
>= 7 &&
1930 brw_inst_urb_per_slot_offset(devinfo
, inst
)) {
1931 string(file
, " per-slot");
1934 if (opcode
== GEN8_URB_OPCODE_SIMD8_WRITE
||
1935 opcode
== GEN8_URB_OPCODE_SIMD8_READ
) {
1936 if (brw_inst_urb_channel_mask_present(devinfo
, inst
))
1937 string(file
, " masked");
1939 err
|= control(file
, "urb swizzle", urb_swizzle
,
1940 brw_inst_urb_swizzle_control(devinfo
, inst
),
1944 if (devinfo
->gen
< 7) {
1945 err
|= control(file
, "urb allocate", urb_allocate
,
1946 brw_inst_urb_allocate(devinfo
, inst
), &space
);
1947 err
|= control(file
, "urb used", urb_used
,
1948 brw_inst_urb_used(devinfo
, inst
), &space
);
1950 if (devinfo
->gen
< 8) {
1951 err
|= control(file
, "urb complete", urb_complete
,
1952 brw_inst_urb_complete(devinfo
, inst
), &space
);
1956 case BRW_SFID_THREAD_SPAWNER
:
1959 case BRW_SFID_MESSAGE_GATEWAY
:
1960 format(file
, " (%s)",
1961 gen7_gateway_subfuncid
[brw_inst_gateway_subfuncid(devinfo
, inst
)]);
1964 case GEN7_SFID_DATAPORT_DATA_CACHE
:
1965 if (devinfo
->gen
>= 7) {
1968 err
|= control(file
, "DP DC0 message type",
1969 dp_dc0_msg_type_gen7
,
1970 brw_dp_desc_msg_type(devinfo
, imm_desc
), &space
);
1972 format(file
, ", %u, ",
1973 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
1975 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1976 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
:
1977 control(file
, "atomic op", aop
,
1978 brw_dp_desc_msg_control(devinfo
, imm_desc
) & 0xf,
1983 brw_dp_desc_msg_control(devinfo
, imm_desc
));
1990 case HSW_SFID_DATAPORT_DATA_CACHE_1
: {
1991 if (devinfo
->gen
>= 7) {
1994 unsigned msg_ctrl
= brw_dp_desc_msg_control(devinfo
, imm_desc
);
1996 err
|= control(file
, "DP DC1 message type",
1997 dp_dc1_msg_type_hsw
,
1998 brw_dp_desc_msg_type(devinfo
, imm_desc
), &space
);
2000 format(file
, ", Surface = %u, ",
2001 brw_dp_desc_binding_table_index(devinfo
, imm_desc
));
2003 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
2004 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
:
2005 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
:
2006 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
:
2007 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
2009 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
:
2010 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
:
2011 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
:
2012 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP
:
2013 control(file
, "atomic op", aop
, msg_ctrl
& 0xf, &space
);
2015 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
:
2016 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
:
2017 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
:
2018 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
:
2019 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE
:
2020 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ
: {
2021 static const char *simd_modes
[] = { "4x2", "16", "8" };
2022 format(file
, "SIMD%s, Mask = 0x%x",
2023 simd_modes
[msg_ctrl
>> 4], msg_ctrl
& 0xf);
2026 case GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP
:
2027 case GEN9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP
:
2028 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
2029 control(file
, "atomic float op", aop_float
, msg_ctrl
& 0xf,
2033 format(file
, "0x%x", msg_ctrl
);
2041 case GEN7_SFID_PIXEL_INTERPOLATOR
:
2042 if (devinfo
->gen
>= 7) {
2043 format(file
, " (%s, %s, 0x%02"PRIx64
")",
2044 brw_inst_pi_nopersp(devinfo
, inst
) ? "linear" : "persp",
2045 pixel_interpolator_msg_types
[brw_inst_pi_message_type(devinfo
, inst
)],
2046 brw_inst_pi_message_data(devinfo
, inst
));
2052 format(file
, "unsupported shared function ID %d", sfid
);
2060 format(file
, "mlen %u", brw_message_desc_mlen(devinfo
, imm_desc
));
2061 if (has_imm_ex_desc
) {
2062 format(file
, " ex_mlen %u",
2063 brw_message_ex_desc_ex_mlen(devinfo
, imm_ex_desc
));
2066 format(file
, " rlen %u", brw_message_desc_rlen(devinfo
, imm_desc
));
2069 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
2072 err
|= control(file
, "access mode", access_mode
,
2073 brw_inst_access_mode(devinfo
, inst
), &space
);
2074 if (devinfo
->gen
>= 6) {
2075 err
|= control(file
, "write enable control", wectrl
,
2076 brw_inst_mask_control(devinfo
, inst
), &space
);
2078 err
|= control(file
, "mask control", mask_ctrl
,
2079 brw_inst_mask_control(devinfo
, inst
), &space
);
2082 if (devinfo
->gen
< 12) {
2083 err
|= control(file
, "dependency control", dep_ctrl
,
2084 ((brw_inst_no_dd_check(devinfo
, inst
) << 1) |
2085 brw_inst_no_dd_clear(devinfo
, inst
)), &space
);
2088 if (devinfo
->gen
>= 6)
2089 err
|= qtr_ctrl(file
, devinfo
, inst
);
2091 if (brw_inst_qtr_control(devinfo
, inst
) == BRW_COMPRESSION_COMPRESSED
&&
2092 desc
&& desc
->ndst
> 0 &&
2093 brw_inst_dst_reg_file(devinfo
, inst
) == BRW_MESSAGE_REGISTER_FILE
&&
2094 brw_inst_dst_da_reg_nr(devinfo
, inst
) & BRW_MRF_COMPR4
) {
2095 format(file
, " compr4");
2097 err
|= control(file
, "compression control", compr_ctrl
,
2098 brw_inst_qtr_control(devinfo
, inst
), &space
);
2102 if (devinfo
->gen
>= 12)
2103 err
|= swsb(file
, devinfo
, inst
);
2105 err
|= control(file
, "compaction", cmpt_ctrl
, is_compacted
, &space
);
2106 err
|= control(file
, "thread control", thread_ctrl
,
2107 (devinfo
->gen
>= 12 ? brw_inst_atomic_control(devinfo
, inst
) :
2108 brw_inst_thread_control(devinfo
, inst
)),
2110 if (has_branch_ctrl(devinfo
, opcode
)) {
2111 err
|= control(file
, "branch ctrl", branch_ctrl
,
2112 brw_inst_branch_control(devinfo
, inst
), &space
);
2113 } else if (devinfo
->gen
>= 6) {
2114 err
|= control(file
, "acc write control", accwr
,
2115 brw_inst_acc_wr_control(devinfo
, inst
), &space
);
2117 if (is_send(opcode
))
2118 err
|= control(file
, "end of thread", end_of_thread
,
2119 brw_inst_eot(devinfo
, inst
), &space
);