2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
36 #undef P /* prompted depth */
37 #undef C /* computed */
38 #undef N /* non-promoted? */
50 } wm_iz_table
[BRW_WM_IZ_BIT_MAX
] =
119 * \param line_aa BRW_WM_AA_NEVER, BRW_WM_AA_ALWAYS or BRW_WM_AA_SOMETIMES
120 * \param lookup bitmask of BRW_WM_IZ_* flags
122 void fs_visitor::setup_fs_payload_gen4()
124 assert(stage
== MESA_SHADER_FRAGMENT
);
125 assert(dispatch_width
<= 16);
126 struct brw_wm_prog_data
*prog_data
= brw_wm_prog_data(this->prog_data
);
127 brw_wm_prog_key
*key
= (brw_wm_prog_key
*) this->key
;
129 bool kill_stats_promoted_workaround
= false;
130 int lookup
= key
->iz_lookup
;
132 assert(lookup
< BRW_WM_IZ_BIT_MAX
);
134 /* Crazy workaround in the windowizer, which we need to track in
135 * our register allocation and render target writes. See the "If
136 * statistics are enabled..." paragraph of 11.5.3.2: Early Depth
137 * Test Cases [Pre-DevGT] of the 3D Pipeline - Windower B-Spec.
140 (lookup
& BRW_WM_IZ_PS_KILL_ALPHATEST_BIT
) &&
141 wm_iz_table
[lookup
].mode
== P
) {
142 kill_stats_promoted_workaround
= true;
145 payload
.subspan_coord_reg
[0] = reg
++;
147 prog_data
->uses_src_depth
=
148 (nir
->info
.inputs_read
& (1 << VARYING_SLOT_POS
)) != 0;
149 if (wm_iz_table
[lookup
].sd_present
|| prog_data
->uses_src_depth
||
150 kill_stats_promoted_workaround
) {
151 payload
.source_depth_reg
[0] = reg
;
155 if (wm_iz_table
[lookup
].sd_to_rt
|| kill_stats_promoted_workaround
)
156 source_depth_to_render_target
= true;
158 if (wm_iz_table
[lookup
].ds_present
|| key
->line_aa
!= BRW_WM_AA_NEVER
) {
159 payload
.aa_dest_stencil_reg
[0] = reg
;
160 runtime_check_aads_emit
=
161 !wm_iz_table
[lookup
].ds_present
&& key
->line_aa
== BRW_WM_AA_SOMETIMES
;
165 if (wm_iz_table
[lookup
].dd_present
) {
166 payload
.dest_depth_reg
[0] = reg
;
170 payload
.num_regs
= reg
;