anv: Disable constant buffer 0 being relative.
[mesa.git] / src / intel / vulkan / genX_state.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 #include "common/gen_sample_positions.h"
33 #include "genxml/gen_macros.h"
34 #include "genxml/genX_pack.h"
35
36 #include "vk_util.h"
37
38 #if GEN_GEN == 10
39 /**
40 * From Gen10 Workarounds page in h/w specs:
41 * WaSampleOffsetIZ:
42 * "Prior to the 3DSTATE_SAMPLE_PATTERN driver must ensure there are no
43 * markers in the pipeline by programming a PIPE_CONTROL with stall."
44 */
45 static void
46 gen10_emit_wa_cs_stall_flush(struct anv_batch *batch)
47 {
48
49 anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) {
50 pc.CommandStreamerStallEnable = true;
51 pc.StallAtPixelScoreboard = true;
52 }
53 }
54
55 /**
56 * From Gen10 Workarounds page in h/w specs:
57 * WaSampleOffsetIZ:_cs_stall_flush
58 * "When 3DSTATE_SAMPLE_PATTERN is programmed, driver must then issue an
59 * MI_LOAD_REGISTER_IMM command to an offset between 0x7000 and 0x7FFF(SVL)
60 * after the command to ensure the state has been delivered prior to any
61 * command causing a marker in the pipeline."
62 */
63 static void
64 gen10_emit_wa_lri_to_cache_mode_zero(struct anv_batch *batch)
65 {
66 /* Before changing the value of CACHE_MODE_0 register, GFX pipeline must
67 * be idle; i.e., full flush is required.
68 */
69 anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) {
70 pc.DepthCacheFlushEnable = true;
71 pc.DCFlushEnable = true;
72 pc.RenderTargetCacheFlushEnable = true;
73 pc.InstructionCacheInvalidateEnable = true;
74 pc.StateCacheInvalidationEnable = true;
75 pc.TextureCacheInvalidationEnable = true;
76 pc.VFCacheInvalidationEnable = true;
77 pc.ConstantCacheInvalidationEnable =true;
78 }
79
80 /* Write to CACHE_MODE_0 (0x7000) */
81 uint32_t cache_mode_0 = 0;
82 anv_pack_struct(&cache_mode_0, GENX(CACHE_MODE_0));
83
84 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
85 lri.RegisterOffset = GENX(CACHE_MODE_0_num);
86 lri.DataDWord = cache_mode_0;
87 }
88 }
89 #endif
90
91 VkResult
92 genX(init_device_state)(struct anv_device *device)
93 {
94 GENX(MEMORY_OBJECT_CONTROL_STATE_pack)(NULL, &device->default_mocs,
95 &GENX(MOCS));
96
97 struct anv_batch batch;
98
99 uint32_t cmds[64];
100 batch.start = batch.next = cmds;
101 batch.end = (void *) cmds + sizeof(cmds);
102
103 anv_batch_emit(&batch, GENX(PIPELINE_SELECT), ps) {
104 #if GEN_GEN >= 9
105 ps.MaskBits = 3;
106 #endif
107 ps.PipelineSelection = _3D;
108 }
109
110 #if GEN_GEN == 9
111 uint32_t cache_mode_1;
112 anv_pack_struct(&cache_mode_1, GENX(CACHE_MODE_1),
113 .FloatBlendOptimizationEnable = true,
114 .FloatBlendOptimizationEnableMask = true,
115 .PartialResolveDisableInVC = true,
116 .PartialResolveDisableInVCMask = true);
117
118 anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
119 lri.RegisterOffset = GENX(CACHE_MODE_1_num);
120 lri.DataDWord = cache_mode_1;
121 }
122 #endif
123
124 #if GEN_GEN == 10 || GEN_GEN == 11
125 uint32_t cache_mode_ss;
126 anv_pack_struct(&cache_mode_ss, GENX(CACHE_MODE_SS),
127 .FloatBlendOptimizationEnable = true,
128 .FloatBlendOptimizationEnableMask = true);
129
130 anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
131 lri.RegisterOffset = GENX(CACHE_MODE_SS_num);
132 lri.DataDWord = cache_mode_ss;
133 }
134 #endif
135
136 anv_batch_emit(&batch, GENX(3DSTATE_AA_LINE_PARAMETERS), aa);
137
138 anv_batch_emit(&batch, GENX(3DSTATE_DRAWING_RECTANGLE), rect) {
139 rect.ClippedDrawingRectangleYMin = 0;
140 rect.ClippedDrawingRectangleXMin = 0;
141 rect.ClippedDrawingRectangleYMax = UINT16_MAX;
142 rect.ClippedDrawingRectangleXMax = UINT16_MAX;
143 rect.DrawingRectangleOriginY = 0;
144 rect.DrawingRectangleOriginX = 0;
145 }
146
147 #if GEN_GEN >= 8
148 anv_batch_emit(&batch, GENX(3DSTATE_WM_CHROMAKEY), ck);
149
150 #if GEN_GEN == 10
151 gen10_emit_wa_cs_stall_flush(&batch);
152 #endif
153
154 /* See the Vulkan 1.0 spec Table 24.1 "Standard sample locations" and
155 * VkPhysicalDeviceFeatures::standardSampleLocations.
156 */
157 anv_batch_emit(&batch, GENX(3DSTATE_SAMPLE_PATTERN), sp) {
158 GEN_SAMPLE_POS_1X(sp._1xSample);
159 GEN_SAMPLE_POS_2X(sp._2xSample);
160 GEN_SAMPLE_POS_4X(sp._4xSample);
161 GEN_SAMPLE_POS_8X(sp._8xSample);
162 #if GEN_GEN >= 9
163 GEN_SAMPLE_POS_16X(sp._16xSample);
164 #endif
165 }
166 #endif
167
168 #if GEN_GEN == 10
169 gen10_emit_wa_lri_to_cache_mode_zero(&batch);
170 #endif
171
172 /* Set the "CONSTANT_BUFFER Address Offset Disable" bit, so
173 * 3DSTATE_CONSTANT_XS buffer 0 is an absolute address.
174 *
175 * This is only safe on kernels with context isolation support.
176 */
177 if (GEN_GEN >= 8 &&
178 device->instance->physicalDevice.has_context_isolation) {
179 UNUSED uint32_t tmp_reg;
180 #if GEN_GEN >= 9
181 anv_pack_struct(&tmp_reg, GENX(CS_DEBUG_MODE2),
182 .CONSTANT_BUFFERAddressOffsetDisable = true,
183 .CONSTANT_BUFFERAddressOffsetDisableMask = true);
184 anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
185 lri.RegisterOffset = GENX(CS_DEBUG_MODE2_num);
186 lri.DataDWord = tmp_reg;
187 }
188 #elif GEN_GEN == 8
189 anv_pack_struct(&tmp_reg, GENX(INSTPM),
190 .CONSTANT_BUFFERAddressOffsetDisable = true,
191 .CONSTANT_BUFFERAddressOffsetDisableMask = true);
192 anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
193 lri.RegisterOffset = GENX(INSTPM_num);
194 lri.DataDWord = tmp_reg;
195 }
196 #endif
197 }
198
199 anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe);
200
201 assert(batch.next <= batch.end);
202
203 return anv_device_submit_simple_batch(device, &batch);
204 }
205
206 static uint32_t
207 vk_to_gen_tex_filter(VkFilter filter, bool anisotropyEnable)
208 {
209 switch (filter) {
210 default:
211 assert(!"Invalid filter");
212 case VK_FILTER_NEAREST:
213 return anisotropyEnable ? MAPFILTER_ANISOTROPIC : MAPFILTER_NEAREST;
214 case VK_FILTER_LINEAR:
215 return anisotropyEnable ? MAPFILTER_ANISOTROPIC : MAPFILTER_LINEAR;
216 }
217 }
218
219 static uint32_t
220 vk_to_gen_max_anisotropy(float ratio)
221 {
222 return (anv_clamp_f(ratio, 2, 16) - 2) / 2;
223 }
224
225 static const uint32_t vk_to_gen_mipmap_mode[] = {
226 [VK_SAMPLER_MIPMAP_MODE_NEAREST] = MIPFILTER_NEAREST,
227 [VK_SAMPLER_MIPMAP_MODE_LINEAR] = MIPFILTER_LINEAR
228 };
229
230 static const uint32_t vk_to_gen_tex_address[] = {
231 [VK_SAMPLER_ADDRESS_MODE_REPEAT] = TCM_WRAP,
232 [VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT] = TCM_MIRROR,
233 [VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE] = TCM_CLAMP,
234 [VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE] = TCM_MIRROR_ONCE,
235 [VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER] = TCM_CLAMP_BORDER,
236 };
237
238 /* Vulkan specifies the result of shadow comparisons as:
239 * 1 if ref <op> texel,
240 * 0 otherwise.
241 *
242 * The hardware does:
243 * 0 if texel <op> ref,
244 * 1 otherwise.
245 *
246 * So, these look a bit strange because there's both a negation
247 * and swapping of the arguments involved.
248 */
249 static const uint32_t vk_to_gen_shadow_compare_op[] = {
250 [VK_COMPARE_OP_NEVER] = PREFILTEROPALWAYS,
251 [VK_COMPARE_OP_LESS] = PREFILTEROPLEQUAL,
252 [VK_COMPARE_OP_EQUAL] = PREFILTEROPNOTEQUAL,
253 [VK_COMPARE_OP_LESS_OR_EQUAL] = PREFILTEROPLESS,
254 [VK_COMPARE_OP_GREATER] = PREFILTEROPGEQUAL,
255 [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPEQUAL,
256 [VK_COMPARE_OP_GREATER_OR_EQUAL] = PREFILTEROPGREATER,
257 [VK_COMPARE_OP_ALWAYS] = PREFILTEROPNEVER,
258 };
259
260 VkResult genX(CreateSampler)(
261 VkDevice _device,
262 const VkSamplerCreateInfo* pCreateInfo,
263 const VkAllocationCallbacks* pAllocator,
264 VkSampler* pSampler)
265 {
266 ANV_FROM_HANDLE(anv_device, device, _device);
267 struct anv_sampler *sampler;
268
269 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
270
271 sampler = vk_zalloc2(&device->alloc, pAllocator, sizeof(*sampler), 8,
272 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
273 if (!sampler)
274 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
275
276 sampler->n_planes = 1;
277
278 uint32_t border_color_offset = device->border_colors.offset +
279 pCreateInfo->borderColor * 64;
280
281 vk_foreach_struct(ext, pCreateInfo->pNext) {
282 switch (ext->sType) {
283 case VK_STRUCTURE_TYPE_SAMPLER_YCBCR_CONVERSION_INFO: {
284 VkSamplerYcbcrConversionInfo *pSamplerConversion =
285 (VkSamplerYcbcrConversionInfo *) ext;
286 ANV_FROM_HANDLE(anv_ycbcr_conversion, conversion,
287 pSamplerConversion->conversion);
288
289 if (conversion == NULL)
290 break;
291
292 sampler->n_planes = conversion->format->n_planes;
293 sampler->conversion = conversion;
294 break;
295 }
296 default:
297 anv_debug_ignored_stype(ext->sType);
298 break;
299 }
300 }
301
302 for (unsigned p = 0; p < sampler->n_planes; p++) {
303 const bool plane_has_chroma =
304 sampler->conversion && sampler->conversion->format->planes[p].has_chroma;
305 const VkFilter min_filter =
306 plane_has_chroma ? sampler->conversion->chroma_filter : pCreateInfo->minFilter;
307 const VkFilter mag_filter =
308 plane_has_chroma ? sampler->conversion->chroma_filter : pCreateInfo->magFilter;
309 const bool enable_min_filter_addr_rounding = min_filter != VK_FILTER_NEAREST;
310 const bool enable_mag_filter_addr_rounding = mag_filter != VK_FILTER_NEAREST;
311 /* From Broadwell PRM, SAMPLER_STATE:
312 * "Mip Mode Filter must be set to MIPFILTER_NONE for Planar YUV surfaces."
313 */
314 const uint32_t mip_filter_mode =
315 (sampler->conversion &&
316 isl_format_is_yuv(sampler->conversion->format->planes[0].isl_format)) ?
317 MIPFILTER_NONE : vk_to_gen_mipmap_mode[pCreateInfo->mipmapMode];
318
319 struct GENX(SAMPLER_STATE) sampler_state = {
320 .SamplerDisable = false,
321 .TextureBorderColorMode = DX10OGL,
322
323 #if GEN_GEN >= 8
324 .LODPreClampMode = CLAMP_MODE_OGL,
325 #else
326 .LODPreClampEnable = CLAMP_ENABLE_OGL,
327 #endif
328
329 #if GEN_GEN == 8
330 .BaseMipLevel = 0.0,
331 #endif
332 .MipModeFilter = mip_filter_mode,
333 .MagModeFilter = vk_to_gen_tex_filter(mag_filter, pCreateInfo->anisotropyEnable),
334 .MinModeFilter = vk_to_gen_tex_filter(min_filter, pCreateInfo->anisotropyEnable),
335 .TextureLODBias = anv_clamp_f(pCreateInfo->mipLodBias, -16, 15.996),
336 .AnisotropicAlgorithm = EWAApproximation,
337 .MinLOD = anv_clamp_f(pCreateInfo->minLod, 0, 14),
338 .MaxLOD = anv_clamp_f(pCreateInfo->maxLod, 0, 14),
339 .ChromaKeyEnable = 0,
340 .ChromaKeyIndex = 0,
341 .ChromaKeyMode = 0,
342 .ShadowFunction = vk_to_gen_shadow_compare_op[pCreateInfo->compareOp],
343 .CubeSurfaceControlMode = OVERRIDE,
344
345 .BorderColorPointer = border_color_offset,
346
347 #if GEN_GEN >= 8
348 .LODClampMagnificationMode = MIPNONE,
349 #endif
350
351 .MaximumAnisotropy = vk_to_gen_max_anisotropy(pCreateInfo->maxAnisotropy),
352 .RAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding,
353 .RAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding,
354 .VAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding,
355 .VAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding,
356 .UAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding,
357 .UAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding,
358 .TrilinearFilterQuality = 0,
359 .NonnormalizedCoordinateEnable = pCreateInfo->unnormalizedCoordinates,
360 .TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeU],
361 .TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeV],
362 .TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeW],
363 };
364
365 GENX(SAMPLER_STATE_pack)(NULL, sampler->state[p], &sampler_state);
366 }
367
368 *pSampler = anv_sampler_to_handle(sampler);
369
370 return VK_SUCCESS;
371 }