src/mesa/drivers/dri/i965/blorp_priv.h

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #pragma once
  25
  26 #include <stdint.h>
  27
  28 #include "compiler/nir/nir.h"
  29
  30 #include "blorp.h"
  31
  32 #ifdef __cplusplus
  33 extern "C" {
  34 #endif
  35
  36 /**
  37  * Binding table indices used by BLORP.
  38  */
  39 enum {
  40    BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
  41    BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
  42    BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
  43 };
  44
  45 struct brw_blorp_surface_info
  46 {
  47    struct isl_surf surf;
  48    drm_intel_bo *bo;
  49    uint32_t offset;
  50
  51    struct isl_surf aux_surf;
  52    drm_intel_bo *aux_bo;
  53    uint32_t aux_offset;
  54    enum isl_aux_usage aux_usage;
  55
  56    union isl_color_value clear_color;
  57
  58    struct isl_view view;
  59
  60    /* Z offset into a 3-D texture or slice of a 2-D array texture. */
  61    uint32_t z_offset;
  62
  63    uint32_t tile_x_sa, tile_y_sa;
  64 };
  65
  66 void
  67 brw_blorp_surface_info_init(struct brw_context *brw,
  68                             struct brw_blorp_surface_info *info,
  69                             const struct brw_blorp_surf *surf,
  70                             unsigned int level, unsigned int layer,
  71                             enum isl_format format, bool is_render_target);
  72
  73
  74 struct brw_blorp_coord_transform
  75 {
  76    float multiplier;
  77    float offset;
  78 };
  79
  80 /**
  81  * Bounding rectangle telling pixel discard which pixels are not to be
  82  * touched. This is needed in when surfaces are configured as something else
  83  * what they really are:
  84  *
  85  *    - writing W-tiled stencil as Y-tiled
  86  *    - writing interleaved multisampled as single sampled.
  87  *
  88  * See blorp_nir_discard_if_outside_rect().
  89  */
  90 struct brw_blorp_discard_rect
  91 {
  92    uint32_t x0;
  93    uint32_t x1;
  94    uint32_t y0;
  95    uint32_t y1;
  96 };
  97
  98 /**
  99  * Grid needed for blended and scaled blits of integer formats, see
 100  * blorp_nir_manual_blend_bilinear().
 101  */
 102 struct brw_blorp_rect_grid
 103 {
 104    float x1;
 105    float y1;
 106    float pad[2];
 107 };
 108
 109 struct brw_blorp_wm_inputs
 110 {
 111    struct brw_blorp_discard_rect discard_rect;
 112    struct brw_blorp_rect_grid rect_grid;
 113    struct brw_blorp_coord_transform coord_transform[2];
 114
 115    /* Minimum layer setting works for all the textures types but texture_3d
 116     * for which the setting has no effect. Use the z-coordinate instead.
 117     */
 118    uint32_t src_z;
 119
 120    /* Pad out to an integral number of registers */
 121    uint32_t pad[3];
 122 };
 123
 124 struct brw_blorp_prog_data
 125 {
 126    bool dispatch_8;
 127    bool dispatch_16;
 128
 129    uint8_t first_curbe_grf_0;
 130    uint8_t first_curbe_grf_2;
 131
 132    uint32_t ksp_offset_2;
 133
 134    /**
 135     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 136     * than one sample per pixel.
 137     */
 138    bool persample_msaa_dispatch;
 139
 140    /**
 141     * Mask of which FS inputs are marked flat by the shader source.  This is
 142     * needed for setting up 3DSTATE_SF/SBE.
 143     */
 144    uint32_t flat_inputs;
 145    unsigned num_varying_inputs;
 146    GLbitfield64 inputs_read;
 147 };
 148
 149 static inline unsigned
 150 brw_blorp_get_urb_length(const struct brw_blorp_prog_data *prog_data)
 151 {
 152    if (prog_data == NULL)
 153       return 1;
 154
 155    /* From the BSpec: 3D Pipeline - Strips and Fans - 3DSTATE_SBE
 156     *
 157     * read_length = ceiling((max_source_attr+1)/2)
 158     */
 159    return MAX2((prog_data->num_varying_inputs + 1) / 2, 1);
 160 }
 161
 162 struct brw_blorp_params
 163 {
 164    uint32_t x0;
 165    uint32_t y0;
 166    uint32_t x1;
 167    uint32_t y1;
 168    struct brw_blorp_surface_info depth;
 169    uint32_t depth_format;
 170    struct brw_blorp_surface_info src;
 171    struct brw_blorp_surface_info dst;
 172    enum gen6_hiz_op hiz_op;
 173    union {
 174       unsigned fast_clear_op;
 175       unsigned resolve_type;
 176    };
 177    bool color_write_disable[4];
 178    struct brw_blorp_wm_inputs wm_inputs;
 179    unsigned num_draw_buffers;
 180    unsigned num_layers;
 181    uint32_t wm_prog_kernel;
 182    struct brw_blorp_prog_data *wm_prog_data;
 183 };
 184
 185 void
 186 brw_blorp_params_init(struct brw_blorp_params *params);
 187
 188 void
 189 brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
 190
 191 void
 192 gen6_blorp_exec(struct brw_context *brw,
 193                 const struct brw_blorp_params *params);
 194
 195 void
 196 gen7_blorp_exec(struct brw_context *brw,
 197                 const struct brw_blorp_params *params);
 198
 199 void
 200 gen75_blorp_exec(struct brw_context *brw,
 201                  const struct brw_blorp_params *params);
 202
 203 void
 204 gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
 205
 206 void
 207 gen9_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
 208
 209 struct brw_blorp_blit_prog_key
 210 {
 211    /* Number of samples per pixel that have been configured in the surface
 212     * state for texturing from.
 213     */
 214    unsigned tex_samples;
 215
 216    /* MSAA layout that has been configured in the surface state for texturing
 217     * from.
 218     */
 219    enum isl_msaa_layout tex_layout;
 220
 221    enum isl_aux_usage tex_aux_usage;
 222
 223    /* Actual number of samples per pixel in the source image. */
 224    unsigned src_samples;
 225
 226    /* Actual MSAA layout used by the source image. */
 227    enum isl_msaa_layout src_layout;
 228
 229    /* Number of samples per pixel that have been configured in the render
 230     * target.
 231     */
 232    unsigned rt_samples;
 233
 234    /* MSAA layout that has been configured in the render target. */
 235    enum isl_msaa_layout rt_layout;
 236
 237    /* Actual number of samples per pixel in the destination image. */
 238    unsigned dst_samples;
 239
 240    /* Actual MSAA layout used by the destination image. */
 241    enum isl_msaa_layout dst_layout;
 242
 243    /* Type of the data to be read from the texture (one of
 244     * nir_type_(int|uint|float)).
 245     */
 246    nir_alu_type texture_data_type;
 247
 248    /* True if the source image is W tiled.  If true, the surface state for the
 249     * source image must be configured as Y tiled, and tex_samples must be 0.
 250     */
 251    bool src_tiled_w;
 252
 253    /* True if the destination image is W tiled.  If true, the surface state
 254     * for the render target must be configured as Y tiled, and rt_samples must
 255     * be 0.
 256     */
 257    bool dst_tiled_w;
 258
 259    /* True if all source samples should be blended together to produce each
 260     * destination pixel.  If true, src_tiled_w must be false, tex_samples must
 261     * equal src_samples, and tex_samples must be nonzero.
 262     */
 263    bool blend;
 264
 265    /* True if the rectangle being sent through the rendering pipeline might be
 266     * larger than the destination rectangle, so the WM program should kill any
 267     * pixels that are outside the destination rectangle.
 268     */
 269    bool use_kill;
 270
 271    /**
 272     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 273     * than one sample per pixel.
 274     */
 275    bool persample_msaa_dispatch;
 276
 277    /* True for scaled blitting. */
 278    bool blit_scaled;
 279
 280    /* Scale factors between the pixel grid and the grid of samples. We're
 281     * using grid of samples for bilinear filetring in multisample scaled blits.
 282     */
 283    float x_scale;
 284    float y_scale;
 285
 286    /* True for blits with filter = GL_LINEAR. */
 287    bool bilinear_filter;
 288 };
 289
 290 /**
 291  * \name BLORP internals
 292  * \{
 293  *
 294  * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
 295  */
 296
 297 void brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key);
 298
 299 const unsigned *
 300 brw_blorp_compile_nir_shader(struct brw_context *brw, struct nir_shader *nir,
 301                              const struct brw_wm_prog_key *wm_key,
 302                              bool use_repclear,
 303                              struct brw_blorp_prog_data *prog_data,
 304                              unsigned *program_size);
 305
 306 uint32_t
 307 brw_blorp_emit_surface_state(struct brw_context *brw,
 308                              const struct brw_blorp_surface_info *surface,
 309                              uint32_t read_domains, uint32_t write_domain,
 310                              bool is_render_target);
 311
 312 /** \} */
 313
 314 #ifdef __cplusplus
 315 } /* end extern "C" */
 316 #endif /* __cplusplus */