i965: Stop lowering ir_triop_lrp.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_binding_tables.c
1 /*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /**
25 * \file brw_binding_tables.c
26 *
27 * State atoms which upload the "binding table" for each shader stage.
28 *
29 * Binding tables map a numeric "surface index" to the SURFACE_STATE structure
30 * for a currently bound surface. This allows SEND messages (such as sampler
31 * or data port messages) to refer to a particular surface by number, rather
32 * than by pointer.
33 *
34 * The binding table is stored as a (sparse) array of SURFACE_STATE entries;
35 * surface indexes are simply indexes into the array. The ordering of the
36 * entries is entirely left up to software; see the SURF_INDEX_* macros in
37 * brw_context.h to see our current layout.
38 */
39
40 #include "main/mtypes.h"
41
42 #include "brw_context.h"
43 #include "brw_defines.h"
44 #include "brw_state.h"
45 #include "intel_batchbuffer.h"
46
47 /**
48 * Upload a shader stage's binding table as indirect state.
49 *
50 * This copies brw_stage_state::surf_offset[] into the indirect state section
51 * of the batchbuffer (allocated by brw_state_batch()).
52 */
53 static void
54 brw_upload_binding_table(struct brw_context *brw,
55 GLbitfield brw_new_binding_table,
56 struct brw_stage_state *stage_state)
57 {
58 /* CACHE_NEW_*_PROG */
59 struct brw_stage_prog_data *prog_data = stage_state->prog_data;
60
61 /* If there are no surfaces, skip making the binding table altogether. */
62 if (prog_data->binding_table.size_bytes == 0) {
63 if (stage_state->bind_bo_offset != 0) {
64 brw->state.dirty.brw |= brw_new_binding_table;
65 stage_state->bind_bo_offset = 0;
66 }
67 return;
68 }
69
70 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
71 brw->vtbl.create_raw_surface(
72 brw, brw->shader_time.bo, 0, brw->shader_time.bo->size,
73 &stage_state->surf_offset[prog_data->binding_table.shader_time_start], true);
74 }
75
76 uint32_t *bind = brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
77 prog_data->binding_table.size_bytes, 32,
78 &stage_state->bind_bo_offset);
79
80 /* BRW_NEW_SURFACES and BRW_NEW_*_CONSTBUF */
81 memcpy(bind, stage_state->surf_offset, prog_data->binding_table.size_bytes);
82
83 brw->state.dirty.brw |= brw_new_binding_table;
84 }
85
86 /**
87 * State atoms which upload the binding table for a particular shader stage.
88 * @{
89 */
90
91 /** Upload the VS binding table. */
92 static void
93 brw_vs_upload_binding_table(struct brw_context *brw)
94 {
95 brw_upload_binding_table(brw, BRW_NEW_VS_BINDING_TABLE, &brw->vs.base);
96 }
97
98 const struct brw_tracked_state brw_vs_binding_table = {
99 .dirty = {
100 .mesa = 0,
101 .brw = BRW_NEW_BATCH |
102 BRW_NEW_VS_CONSTBUF |
103 BRW_NEW_SURFACES,
104 .cache = CACHE_NEW_VS_PROG
105 },
106 .emit = brw_vs_upload_binding_table,
107 };
108
109
110 /** Upload the PS binding table. */
111 static void
112 brw_upload_wm_binding_table(struct brw_context *brw)
113 {
114 brw_upload_binding_table(brw, BRW_NEW_PS_BINDING_TABLE, &brw->wm.base);
115 }
116
117 const struct brw_tracked_state brw_wm_binding_table = {
118 .dirty = {
119 .mesa = 0,
120 .brw = BRW_NEW_BATCH | BRW_NEW_SURFACES,
121 .cache = CACHE_NEW_WM_PROG
122 },
123 .emit = brw_upload_wm_binding_table,
124 };
125
126 /** Upload the GS binding table (if GS is active). */
127 static void
128 brw_gs_upload_binding_table(struct brw_context *brw)
129 {
130 /* If there's no GS, skip changing anything. */
131 if (brw->geometry_program == NULL)
132 return;
133
134 brw_upload_binding_table(brw, BRW_NEW_GS_BINDING_TABLE, &brw->gs.base);
135 }
136
137 const struct brw_tracked_state brw_gs_binding_table = {
138 .dirty = {
139 .mesa = 0,
140 .brw = BRW_NEW_BATCH |
141 BRW_NEW_GS_CONSTBUF |
142 BRW_NEW_SURFACES,
143 .cache = CACHE_NEW_GS_PROG
144 },
145 .emit = brw_gs_upload_binding_table,
146 };
147
148 /** @} */
149
150 /**
151 * State atoms which emit 3DSTATE packets to update the binding table pointers.
152 * @{
153 */
154
155 /**
156 * (Gen4-5) Upload the binding table pointers for all shader stages.
157 *
158 * The binding table pointers are relative to the surface state base address,
159 * which points at the batchbuffer containing the streamed batch state.
160 */
161 static void
162 gen4_upload_binding_table_pointers(struct brw_context *brw)
163 {
164 BEGIN_BATCH(6);
165 OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS << 16 | (6 - 2));
166 OUT_BATCH(brw->vs.base.bind_bo_offset);
167 OUT_BATCH(0); /* gs */
168 OUT_BATCH(0); /* clip */
169 OUT_BATCH(0); /* sf */
170 OUT_BATCH(brw->wm.base.bind_bo_offset);
171 ADVANCE_BATCH();
172 }
173
174 const struct brw_tracked_state brw_binding_table_pointers = {
175 .dirty = {
176 .mesa = 0,
177 .brw = (BRW_NEW_BATCH |
178 BRW_NEW_STATE_BASE_ADDRESS |
179 BRW_NEW_VS_BINDING_TABLE |
180 BRW_NEW_GS_BINDING_TABLE |
181 BRW_NEW_PS_BINDING_TABLE),
182 .cache = 0,
183 },
184 .emit = gen4_upload_binding_table_pointers,
185 };
186
187 /**
188 * (Sandybridge Only) Upload the binding table pointers for all shader stages.
189 *
190 * The binding table pointers are relative to the surface state base address,
191 * which points at the batchbuffer containing the streamed batch state.
192 */
193 static void
194 gen6_upload_binding_table_pointers(struct brw_context *brw)
195 {
196 BEGIN_BATCH(4);
197 OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS << 16 |
198 GEN6_BINDING_TABLE_MODIFY_VS |
199 GEN6_BINDING_TABLE_MODIFY_GS |
200 GEN6_BINDING_TABLE_MODIFY_PS |
201 (4 - 2));
202 OUT_BATCH(brw->vs.base.bind_bo_offset); /* vs */
203 OUT_BATCH(brw->ff_gs.bind_bo_offset); /* gs */
204 OUT_BATCH(brw->wm.base.bind_bo_offset); /* wm/ps */
205 ADVANCE_BATCH();
206 }
207
208 const struct brw_tracked_state gen6_binding_table_pointers = {
209 .dirty = {
210 .mesa = 0,
211 .brw = (BRW_NEW_BATCH |
212 BRW_NEW_STATE_BASE_ADDRESS |
213 BRW_NEW_VS_BINDING_TABLE |
214 BRW_NEW_GS_BINDING_TABLE |
215 BRW_NEW_PS_BINDING_TABLE),
216 .cache = 0,
217 },
218 .emit = gen6_upload_binding_table_pointers,
219 };
220
221 /* Gen7+ code lives in gen7_{vs,gs,wm}_state.c. */
222
223 /** @} */