2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
28 #include "brw_context.h"
29 #include "intel_mipmap_tree.h"
38 brw_blorp_blit_miptrees(struct brw_context
*brw
,
39 struct intel_mipmap_tree
*src_mt
,
40 unsigned src_level
, unsigned src_layer
,
41 struct intel_mipmap_tree
*dst_mt
,
42 unsigned dst_level
, unsigned dst_layer
,
43 float src_x0
, float src_y0
,
44 float src_x1
, float src_y1
,
45 float dst_x0
, float dst_y0
,
46 float dst_x1
, float dst_y1
,
47 GLenum filter
, bool mirror_x
, bool mirror_y
);
50 brw_blorp_clear_color(struct brw_context
*brw
, struct gl_framebuffer
*fb
,
54 brw_blorp_resolve_color(struct brw_context
*brw
,
55 struct intel_mipmap_tree
*mt
);
58 } /* end extern "C" */
61 * Binding table indices used by BLORP.
64 BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX
,
65 BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX
,
66 BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
70 class brw_blorp_mip_info
75 void set(struct intel_mipmap_tree
*mt
,
76 unsigned int level
, unsigned int layer
);
78 struct intel_mipmap_tree
*mt
;
81 * The miplevel to use.
86 * The 2D layer within the miplevel. Combined, level and layer define the
87 * 2D miptree slice to use.
89 * Note: if mt is a 2D multisample array texture on Gen7+ using
90 * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, layer is the physical
91 * layer holding sample 0. So, for example, if mt->num_samples == 4, then
92 * logical layer n corresponds to layer == 4*n.
97 * Width of the miplevel to be used. For surfaces using
98 * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
103 * Height of the miplevel to be used. For surfaces using
104 * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
109 * X offset within the surface to texture from (or render to). For
110 * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
116 * Y offset within the surface to texture from (or render to). For
117 * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
123 class brw_blorp_surface_info
: public brw_blorp_mip_info
126 brw_blorp_surface_info();
128 void set(struct brw_context
*brw
,
129 struct intel_mipmap_tree
*mt
,
130 unsigned int level
, unsigned int layer
,
131 bool is_render_target
);
133 uint32_t compute_tile_offsets(uint32_t *tile_x
, uint32_t *tile_y
) const;
135 /* Setting this flag indicates that the buffer's contents are W-tiled
136 * stencil data, but the surface state should be set up for Y tiled
137 * MESA_FORMAT_R_UNORM8 data (this is necessary because surface states don't
140 * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of
141 * MESA_FORMAT_R_UNORM8 data are 128 pixels wide by 32 pixels high, the width and
142 * pitch stored in the surface state will be multiplied by 2, and the
143 * height will be halved. Also, since W and Y tiles store their data in a
144 * different order, the width and height will be rounded up to a multiple
145 * of the tile size, to ensure that the WM program can access the full
146 * width and height of the buffer.
148 bool map_stencil_as_y_tiled
;
150 unsigned num_samples
;
152 /* Setting this flag indicates that the surface should be set up in
153 * ARYSPC_LOD0 mode. Ignored prior to Gen7.
155 bool array_spacing_lod0
;
158 * Format that should be used when setting up the surface state for this
159 * surface. Should correspond to one of the BRW_SURFACEFORMAT_* enums.
161 uint32_t brw_surfaceformat
;
164 * For MSAA surfaces, MSAA layout that should be used when setting up the
165 * surface state for this surface.
167 intel_msaa_layout msaa_layout
;
171 struct brw_blorp_coord_transform_params
173 void setup(GLfloat src0
, GLfloat src1
, GLfloat dst0
, GLfloat dst1
,
181 struct brw_blorp_wm_push_constants
187 /* Top right coordinates of the rectangular grid used for scaled blitting */
190 brw_blorp_coord_transform_params x_transform
;
191 brw_blorp_coord_transform_params y_transform
;
192 /* Pad out to an integral number of registers */
196 /* Every 32 bytes of push constant data constitutes one GEN register. */
197 const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS
=
198 sizeof(brw_blorp_wm_push_constants
) / 32;
200 struct brw_blorp_prog_data
202 unsigned int first_curbe_grf
;
205 * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
206 * than one sample per pixel.
208 bool persample_msaa_dispatch
;
212 enum gen7_fast_clear_op
{
213 GEN7_FAST_CLEAR_OP_NONE
,
214 GEN7_FAST_CLEAR_OP_FAST_CLEAR
,
215 GEN7_FAST_CLEAR_OP_RESOLVE
,
219 class brw_blorp_params
224 virtual uint32_t get_wm_prog(struct brw_context
*brw
,
225 brw_blorp_prog_data
**prog_data
) const = 0;
231 brw_blorp_mip_info depth
;
232 uint32_t depth_format
;
233 brw_blorp_surface_info src
;
234 brw_blorp_surface_info dst
;
235 enum gen6_hiz_op hiz_op
;
236 enum gen7_fast_clear_op fast_clear_op
;
238 brw_blorp_wm_push_constants wm_push_consts
;
239 bool color_write_disable
[4];
244 brw_blorp_exec(struct brw_context
*brw
, const brw_blorp_params
*params
);
248 * Parameters for a HiZ or depth resolve operation.
250 * For an overview of HiZ ops, see the following sections of the Sandy Bridge
251 * PRM, Volume 1, Part 2:
252 * - 7.5.3.1 Depth Buffer Clear
253 * - 7.5.3.2 Depth Buffer Resolve
254 * - 7.5.3.3 Hierarchical Depth Buffer Resolve
256 class brw_hiz_op_params
: public brw_blorp_params
259 brw_hiz_op_params(struct intel_mipmap_tree
*mt
,
260 unsigned int level
, unsigned int layer
,
263 virtual uint32_t get_wm_prog(struct brw_context
*brw
,
264 brw_blorp_prog_data
**prog_data
) const;
267 struct brw_blorp_blit_prog_key
269 /* Number of samples per pixel that have been configured in the surface
270 * state for texturing from.
272 unsigned tex_samples
;
274 /* MSAA layout that has been configured in the surface state for texturing
277 intel_msaa_layout tex_layout
;
279 /* Actual number of samples per pixel in the source image. */
280 unsigned src_samples
;
282 /* Actual MSAA layout used by the source image. */
283 intel_msaa_layout src_layout
;
285 /* Number of samples per pixel that have been configured in the render
290 /* MSAA layout that has been configured in the render target. */
291 intel_msaa_layout rt_layout
;
293 /* Actual number of samples per pixel in the destination image. */
294 unsigned dst_samples
;
296 /* Actual MSAA layout used by the destination image. */
297 intel_msaa_layout dst_layout
;
299 /* Type of the data to be read from the texture (one of
300 * BRW_REGISTER_TYPE_{UD,D,F}).
302 unsigned texture_data_type
;
304 /* True if the source image is W tiled. If true, the surface state for the
305 * source image must be configured as Y tiled, and tex_samples must be 0.
309 /* True if the destination image is W tiled. If true, the surface state
310 * for the render target must be configured as Y tiled, and rt_samples must
315 /* True if all source samples should be blended together to produce each
316 * destination pixel. If true, src_tiled_w must be false, tex_samples must
317 * equal src_samples, and tex_samples must be nonzero.
321 /* True if the rectangle being sent through the rendering pipeline might be
322 * larger than the destination rectangle, so the WM program should kill any
323 * pixels that are outside the destination rectangle.
328 * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
329 * than one sample per pixel.
331 bool persample_msaa_dispatch
;
333 /* True for scaled blitting. */
336 /* Scale factors between the pixel grid and the grid of samples. We're
337 * using grid of samples for bilinear filetring in multisample scaled blits.
342 /* True for blits with filter = GL_LINEAR. */
343 bool bilinear_filter
;
346 class brw_blorp_blit_params
: public brw_blorp_params
349 brw_blorp_blit_params(struct brw_context
*brw
,
350 struct intel_mipmap_tree
*src_mt
,
351 unsigned src_level
, unsigned src_layer
,
352 struct intel_mipmap_tree
*dst_mt
,
353 unsigned dst_level
, unsigned dst_layer
,
354 GLfloat src_x0
, GLfloat src_y0
,
355 GLfloat src_x1
, GLfloat src_y1
,
356 GLfloat dst_x0
, GLfloat dst_y0
,
357 GLfloat dst_x1
, GLfloat dst_y1
,
358 GLenum filter
, bool mirror_x
, bool mirror_y
);
360 virtual uint32_t get_wm_prog(struct brw_context
*brw
,
361 brw_blorp_prog_data
**prog_data
) const;
364 brw_blorp_blit_prog_key wm_prog_key
;
368 * \name BLORP internals
371 * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
375 gen6_blorp_init(struct brw_context
*brw
);
378 gen6_blorp_emit_state_base_address(struct brw_context
*brw
,
379 const brw_blorp_params
*params
);
382 gen6_blorp_emit_vertices(struct brw_context
*brw
,
383 const brw_blorp_params
*params
);
386 gen6_blorp_emit_blend_state(struct brw_context
*brw
,
387 const brw_blorp_params
*params
);
390 gen6_blorp_emit_cc_state(struct brw_context
*brw
,
391 const brw_blorp_params
*params
);
394 gen6_blorp_emit_wm_constants(struct brw_context
*brw
,
395 const brw_blorp_params
*params
);
398 gen6_blorp_emit_vs_disable(struct brw_context
*brw
,
399 const brw_blorp_params
*params
);
402 gen6_blorp_emit_binding_table(struct brw_context
*brw
,
403 const brw_blorp_params
*params
,
404 uint32_t wm_surf_offset_renderbuffer
,
405 uint32_t wm_surf_offset_texture
);
408 gen6_blorp_emit_depth_stencil_state(struct brw_context
*brw
,
409 const brw_blorp_params
*params
);
412 gen6_blorp_emit_gs_disable(struct brw_context
*brw
,
413 const brw_blorp_params
*params
);
416 gen6_blorp_emit_clip_disable(struct brw_context
*brw
,
417 const brw_blorp_params
*params
);
420 gen6_blorp_emit_drawing_rectangle(struct brw_context
*brw
,
421 const brw_blorp_params
*params
);
424 #endif /* __cplusplus */