intel: restrict dma-buf-import images to external sampling only
[mesa.git] / src / mesa / drivers / dri / i965 / intel_screen.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <errno.h>
29 #include <time.h>
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/texobj.h"
35 #include "main/hash.h"
36 #include "main/fbobject.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
39
40 #include "utils.h"
41 #include "xmlpool.h"
42
43 PUBLIC const char __driConfigOptions[] =
44 DRI_CONF_BEGIN
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
49 */
50 DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
54 DRI_CONF_DESC_END
55 DRI_CONF_OPT_END
56
57 DRI_CONF_OPT_BEGIN_B(hiz, "true")
58 DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
59 DRI_CONF_OPT_END
60
61 DRI_CONF_SECTION_END
62 DRI_CONF_SECTION_QUALITY
63 DRI_CONF_FORCE_S3TC_ENABLE("false")
64 DRI_CONF_SECTION_END
65 DRI_CONF_SECTION_DEBUG
66 DRI_CONF_NO_RAST("false")
67 DRI_CONF_ALWAYS_FLUSH_BATCH("false")
68 DRI_CONF_ALWAYS_FLUSH_CACHE("false")
69 DRI_CONF_DISABLE_THROTTLING("false")
70 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
71 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
72 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
73
74 DRI_CONF_OPT_BEGIN_B(shader_precompile, "true")
75 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
76 DRI_CONF_OPT_END
77 DRI_CONF_SECTION_END
78 DRI_CONF_END;
79
80 const GLuint __driNConfigOptions = 12;
81
82 #include "intel_batchbuffer.h"
83 #include "intel_buffers.h"
84 #include "intel_bufmgr.h"
85 #include "intel_chipset.h"
86 #include "intel_fbo.h"
87 #include "intel_mipmap_tree.h"
88 #include "intel_screen.h"
89 #include "intel_tex.h"
90 #include "intel_regions.h"
91
92 #include "brw_context.h"
93
94 #include "i915_drm.h"
95
96 #ifdef USE_NEW_INTERFACE
97 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
98 #endif /*USE_NEW_INTERFACE */
99
100 /**
101 * For debugging purposes, this returns a time in seconds.
102 */
103 double
104 get_time(void)
105 {
106 struct timespec tp;
107
108 clock_gettime(CLOCK_MONOTONIC, &tp);
109
110 return tp.tv_sec + tp.tv_nsec / 1000000000.0;
111 }
112
113 void
114 aub_dump_bmp(struct gl_context *ctx)
115 {
116 struct gl_framebuffer *fb = ctx->DrawBuffer;
117
118 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
119 struct intel_renderbuffer *irb =
120 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
121
122 if (irb && irb->mt) {
123 enum aub_dump_bmp_format format;
124
125 switch (irb->Base.Base.Format) {
126 case MESA_FORMAT_ARGB8888:
127 case MESA_FORMAT_XRGB8888:
128 format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
129 break;
130 default:
131 continue;
132 }
133
134 assert(irb->mt->region->pitch % irb->mt->region->cpp == 0);
135 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
136 irb->draw_x,
137 irb->draw_y,
138 irb->Base.Base.Width,
139 irb->Base.Base.Height,
140 format,
141 irb->mt->region->pitch,
142 0);
143 }
144 }
145 }
146
147 static const __DRItexBufferExtension intelTexBufferExtension = {
148 .base = { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
149
150 .setTexBuffer = intelSetTexBuffer,
151 .setTexBuffer2 = intelSetTexBuffer2,
152 .releaseTexBuffer = NULL,
153 };
154
155 static void
156 intelDRI2Flush(__DRIdrawable *drawable)
157 {
158 GET_CURRENT_CONTEXT(ctx);
159 struct brw_context *brw = brw_context(ctx);
160 if (brw == NULL)
161 return;
162
163 intel_resolve_for_dri2_flush(brw, drawable);
164 brw->need_throttle = true;
165
166 if (brw->batch.used)
167 intel_batchbuffer_flush(brw);
168
169 if (INTEL_DEBUG & DEBUG_AUB) {
170 aub_dump_bmp(ctx);
171 }
172 }
173
174 static const struct __DRI2flushExtensionRec intelFlushExtension = {
175 .base = { __DRI2_FLUSH, 3 },
176
177 .flush = intelDRI2Flush,
178 .invalidate = dri2InvalidateDrawable,
179 };
180
181 static struct intel_image_format intel_image_formats[] = {
182 { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
183 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
184
185 { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
186 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
187
188 { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
189 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
190 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
191 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
192
193 { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
194 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
195 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
196 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
197
198 { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
199 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
200 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
201 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
202
203 { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
204 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
205 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
206 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
207
208 { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
209 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
210 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
211 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
212
213 { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
214 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
215 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
216
217 { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
218 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
219 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
220
221 /* For YUYV buffers, we set up two overlapping DRI images and treat
222 * them as planar buffers in the compositors. Plane 0 is GR88 and
223 * samples YU or YV pairs and places Y into the R component, while
224 * plane 1 is ARGB and samples YUYV clusters and places pairs and
225 * places U into the G component and V into A. This lets the
226 * texture sampler interpolate the Y components correctly when
227 * sampling from plane 0, and interpolate U and V correctly when
228 * sampling from plane 1. */
229 { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
230 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
231 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
232 };
233
234 static struct intel_image_format *
235 intel_image_format_lookup(int fourcc)
236 {
237 struct intel_image_format *f = NULL;
238
239 for (unsigned i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
240 if (intel_image_formats[i].fourcc == fourcc) {
241 f = &intel_image_formats[i];
242 break;
243 }
244 }
245
246 return f;
247 }
248
249 static __DRIimage *
250 intel_allocate_image(int dri_format, void *loaderPrivate)
251 {
252 __DRIimage *image;
253
254 image = calloc(1, sizeof *image);
255 if (image == NULL)
256 return NULL;
257
258 image->dri_format = dri_format;
259 image->offset = 0;
260
261 switch (dri_format) {
262 case __DRI_IMAGE_FORMAT_RGB565:
263 image->format = MESA_FORMAT_RGB565;
264 break;
265 case __DRI_IMAGE_FORMAT_XRGB8888:
266 image->format = MESA_FORMAT_XRGB8888;
267 break;
268 case __DRI_IMAGE_FORMAT_ARGB8888:
269 image->format = MESA_FORMAT_ARGB8888;
270 break;
271 case __DRI_IMAGE_FORMAT_ABGR8888:
272 image->format = MESA_FORMAT_RGBA8888_REV;
273 break;
274 case __DRI_IMAGE_FORMAT_XBGR8888:
275 image->format = MESA_FORMAT_RGBX8888_REV;
276 break;
277 case __DRI_IMAGE_FORMAT_R8:
278 image->format = MESA_FORMAT_R8;
279 break;
280 case __DRI_IMAGE_FORMAT_GR88:
281 image->format = MESA_FORMAT_GR88;
282 break;
283 case __DRI_IMAGE_FORMAT_NONE:
284 image->format = MESA_FORMAT_NONE;
285 break;
286 default:
287 free(image);
288 return NULL;
289 }
290
291 image->internal_format = _mesa_get_format_base_format(image->format);
292 image->data = loaderPrivate;
293
294 return image;
295 }
296
297 /**
298 * Sets up a DRIImage structure to point to our shared image in a region
299 */
300 static void
301 intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image,
302 struct intel_mipmap_tree *mt, GLuint level,
303 GLuint zoffset)
304 {
305 unsigned int draw_x, draw_y;
306 uint32_t mask_x, mask_y;
307
308 intel_miptree_make_shareable(brw, mt);
309
310 intel_miptree_check_level_layer(mt, level, zoffset);
311
312 intel_region_get_tile_masks(mt->region, &mask_x, &mask_y, false);
313 intel_miptree_get_image_offset(mt, level, zoffset, &draw_x, &draw_y);
314
315 image->width = mt->level[level].width;
316 image->height = mt->level[level].height;
317 image->tile_x = draw_x & mask_x;
318 image->tile_y = draw_y & mask_y;
319
320 image->offset = intel_region_get_aligned_offset(mt->region,
321 draw_x & ~mask_x,
322 draw_y & ~mask_y,
323 false);
324
325 intel_region_reference(&image->region, mt->region);
326 }
327
328 static void
329 intel_setup_image_from_dimensions(__DRIimage *image)
330 {
331 image->width = image->region->width;
332 image->height = image->region->height;
333 image->tile_x = 0;
334 image->tile_y = 0;
335 image->has_depthstencil = false;
336 }
337
338 static inline uint32_t
339 intel_dri_format(GLuint format)
340 {
341 switch (format) {
342 case MESA_FORMAT_RGB565:
343 return __DRI_IMAGE_FORMAT_RGB565;
344 case MESA_FORMAT_XRGB8888:
345 return __DRI_IMAGE_FORMAT_XRGB8888;
346 case MESA_FORMAT_ARGB8888:
347 return __DRI_IMAGE_FORMAT_ARGB8888;
348 case MESA_FORMAT_RGBA8888_REV:
349 return __DRI_IMAGE_FORMAT_ABGR8888;
350 case MESA_FORMAT_R8:
351 return __DRI_IMAGE_FORMAT_R8;
352 case MESA_FORMAT_RG88:
353 return __DRI_IMAGE_FORMAT_GR88;
354 }
355
356 return MESA_FORMAT_NONE;
357 }
358
359 static __DRIimage *
360 intel_create_image_from_name(__DRIscreen *screen,
361 int width, int height, int format,
362 int name, int pitch, void *loaderPrivate)
363 {
364 struct intel_screen *intelScreen = screen->driverPrivate;
365 __DRIimage *image;
366 int cpp;
367
368 image = intel_allocate_image(format, loaderPrivate);
369 if (image == NULL)
370 return NULL;
371
372 if (image->format == MESA_FORMAT_NONE)
373 cpp = 1;
374 else
375 cpp = _mesa_get_format_bytes(image->format);
376 image->region = intel_region_alloc_for_handle(intelScreen,
377 cpp, width, height,
378 pitch * cpp, name, "image");
379 if (image->region == NULL) {
380 free(image);
381 return NULL;
382 }
383
384 intel_setup_image_from_dimensions(image);
385
386 return image;
387 }
388
389 static __DRIimage *
390 intel_create_image_from_renderbuffer(__DRIcontext *context,
391 int renderbuffer, void *loaderPrivate)
392 {
393 __DRIimage *image;
394 struct brw_context *brw = context->driverPrivate;
395 struct gl_context *ctx = &brw->ctx;
396 struct gl_renderbuffer *rb;
397 struct intel_renderbuffer *irb;
398
399 rb = _mesa_lookup_renderbuffer(ctx, renderbuffer);
400 if (!rb) {
401 _mesa_error(ctx, GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
402 return NULL;
403 }
404
405 irb = intel_renderbuffer(rb);
406 intel_miptree_make_shareable(brw, irb->mt);
407 image = calloc(1, sizeof *image);
408 if (image == NULL)
409 return NULL;
410
411 image->internal_format = rb->InternalFormat;
412 image->format = rb->Format;
413 image->offset = 0;
414 image->data = loaderPrivate;
415 intel_region_reference(&image->region, irb->mt->region);
416 intel_setup_image_from_dimensions(image);
417 image->dri_format = intel_dri_format(image->format);
418 image->has_depthstencil = irb->mt->stencil_mt? true : false;
419
420 rb->NeedsFinishRenderTexture = true;
421 return image;
422 }
423
424 static __DRIimage *
425 intel_create_image_from_texture(__DRIcontext *context, int target,
426 unsigned texture, int zoffset,
427 int level,
428 unsigned *error,
429 void *loaderPrivate)
430 {
431 __DRIimage *image;
432 struct brw_context *brw = context->driverPrivate;
433 struct gl_texture_object *obj;
434 struct intel_texture_object *iobj;
435 GLuint face = 0;
436
437 obj = _mesa_lookup_texture(&brw->ctx, texture);
438 if (!obj || obj->Target != target) {
439 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
440 return NULL;
441 }
442
443 if (target == GL_TEXTURE_CUBE_MAP)
444 face = zoffset;
445
446 _mesa_test_texobj_completeness(&brw->ctx, obj);
447 iobj = intel_texture_object(obj);
448 if (!obj->_BaseComplete || (level > 0 && !obj->_MipmapComplete)) {
449 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
450 return NULL;
451 }
452
453 if (level < obj->BaseLevel || level > obj->_MaxLevel) {
454 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
455 return NULL;
456 }
457
458 if (target == GL_TEXTURE_3D && obj->Image[face][level]->Depth < zoffset) {
459 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
460 return NULL;
461 }
462 image = calloc(1, sizeof *image);
463 if (image == NULL) {
464 *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
465 return NULL;
466 }
467
468 image->internal_format = obj->Image[face][level]->InternalFormat;
469 image->format = obj->Image[face][level]->TexFormat;
470 image->data = loaderPrivate;
471 intel_setup_image_from_mipmap_tree(brw, image, iobj->mt, level, zoffset);
472 image->dri_format = intel_dri_format(image->format);
473 image->has_depthstencil = iobj->mt->stencil_mt? true : false;
474 if (image->dri_format == MESA_FORMAT_NONE) {
475 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
476 free(image);
477 return NULL;
478 }
479
480 *error = __DRI_IMAGE_ERROR_SUCCESS;
481 return image;
482 }
483
484 static void
485 intel_destroy_image(__DRIimage *image)
486 {
487 intel_region_release(&image->region);
488 free(image);
489 }
490
491 static __DRIimage *
492 intel_create_image(__DRIscreen *screen,
493 int width, int height, int format,
494 unsigned int use,
495 void *loaderPrivate)
496 {
497 __DRIimage *image;
498 struct intel_screen *intelScreen = screen->driverPrivate;
499 uint32_t tiling;
500 int cpp;
501
502 tiling = I915_TILING_X;
503 if (use & __DRI_IMAGE_USE_CURSOR) {
504 if (width != 64 || height != 64)
505 return NULL;
506 tiling = I915_TILING_NONE;
507 }
508
509 image = intel_allocate_image(format, loaderPrivate);
510 if (image == NULL)
511 return NULL;
512
513 cpp = _mesa_get_format_bytes(image->format);
514 image->region =
515 intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
516 if (image->region == NULL) {
517 free(image);
518 return NULL;
519 }
520
521 intel_setup_image_from_dimensions(image);
522
523 return image;
524 }
525
526 static GLboolean
527 intel_query_image(__DRIimage *image, int attrib, int *value)
528 {
529 switch (attrib) {
530 case __DRI_IMAGE_ATTRIB_STRIDE:
531 *value = image->region->pitch;
532 return true;
533 case __DRI_IMAGE_ATTRIB_HANDLE:
534 *value = image->region->bo->handle;
535 return true;
536 case __DRI_IMAGE_ATTRIB_NAME:
537 return intel_region_flink(image->region, (uint32_t *) value);
538 case __DRI_IMAGE_ATTRIB_FORMAT:
539 *value = image->dri_format;
540 return true;
541 case __DRI_IMAGE_ATTRIB_WIDTH:
542 *value = image->region->width;
543 return true;
544 case __DRI_IMAGE_ATTRIB_HEIGHT:
545 *value = image->region->height;
546 return true;
547 case __DRI_IMAGE_ATTRIB_COMPONENTS:
548 if (image->planar_format == NULL)
549 return false;
550 *value = image->planar_format->components;
551 return true;
552 case __DRI_IMAGE_ATTRIB_FD:
553 if (drm_intel_bo_gem_export_to_prime(image->region->bo, value) == 0)
554 return true;
555 return false;
556 default:
557 return false;
558 }
559 }
560
561 static __DRIimage *
562 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
563 {
564 __DRIimage *image;
565
566 image = calloc(1, sizeof *image);
567 if (image == NULL)
568 return NULL;
569
570 intel_region_reference(&image->region, orig_image->region);
571 if (image->region == NULL) {
572 free(image);
573 return NULL;
574 }
575
576 image->internal_format = orig_image->internal_format;
577 image->planar_format = orig_image->planar_format;
578 image->dri_format = orig_image->dri_format;
579 image->format = orig_image->format;
580 image->offset = orig_image->offset;
581 image->width = orig_image->width;
582 image->height = orig_image->height;
583 image->tile_x = orig_image->tile_x;
584 image->tile_y = orig_image->tile_y;
585 image->has_depthstencil = orig_image->has_depthstencil;
586 image->data = loaderPrivate;
587
588 memcpy(image->strides, orig_image->strides, sizeof(image->strides));
589 memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
590
591 return image;
592 }
593
594 static GLboolean
595 intel_validate_usage(__DRIimage *image, unsigned int use)
596 {
597 if (use & __DRI_IMAGE_USE_CURSOR) {
598 if (image->region->width != 64 || image->region->height != 64)
599 return GL_FALSE;
600 }
601
602 return GL_TRUE;
603 }
604
605 static __DRIimage *
606 intel_create_image_from_names(__DRIscreen *screen,
607 int width, int height, int fourcc,
608 int *names, int num_names,
609 int *strides, int *offsets,
610 void *loaderPrivate)
611 {
612 struct intel_image_format *f = NULL;
613 __DRIimage *image;
614 int i, index;
615
616 if (screen == NULL || names == NULL || num_names != 1)
617 return NULL;
618
619 f = intel_image_format_lookup(fourcc);
620 if (f == NULL)
621 return NULL;
622
623 image = intel_create_image_from_name(screen, width, height,
624 __DRI_IMAGE_FORMAT_NONE,
625 names[0], strides[0],
626 loaderPrivate);
627
628 if (image == NULL)
629 return NULL;
630
631 image->planar_format = f;
632 for (i = 0; i < f->nplanes; i++) {
633 index = f->planes[i].buffer_index;
634 image->offsets[index] = offsets[index];
635 image->strides[index] = strides[index];
636 }
637
638 return image;
639 }
640
641 static __DRIimage *
642 intel_create_image_from_fds(__DRIscreen *screen,
643 int width, int height, int fourcc,
644 int *fds, int num_fds, int *strides, int *offsets,
645 void *loaderPrivate)
646 {
647 struct intel_screen *intelScreen = screen->driverPrivate;
648 struct intel_image_format *f;
649 __DRIimage *image;
650 int i, index;
651
652 if (fds == NULL || num_fds != 1)
653 return NULL;
654
655 f = intel_image_format_lookup(fourcc);
656 if (f == NULL)
657 return NULL;
658
659 if (f->nplanes == 1)
660 image = intel_allocate_image(f->planes[0].dri_format, loaderPrivate);
661 else
662 image = intel_allocate_image(__DRI_IMAGE_FORMAT_NONE, loaderPrivate);
663
664 if (image == NULL)
665 return NULL;
666
667 image->region = intel_region_alloc_for_fd(intelScreen,
668 1, width, height,
669 strides[0], fds[0], "image");
670 if (image->region == NULL) {
671 free(image);
672 return NULL;
673 }
674
675 image->planar_format = f;
676 for (i = 0; i < f->nplanes; i++) {
677 index = f->planes[i].buffer_index;
678 image->offsets[index] = offsets[index];
679 image->strides[index] = strides[index];
680 }
681
682 intel_setup_image_from_dimensions(image);
683
684 return image;
685 }
686
687 static __DRIimage *
688 intel_create_image_from_dma_bufs(__DRIscreen *screen,
689 int width, int height, int fourcc,
690 int *fds, int num_fds,
691 int *strides, int *offsets,
692 enum __DRIYUVColorSpace yuv_color_space,
693 enum __DRISampleRange sample_range,
694 enum __DRIChromaSiting horizontal_siting,
695 enum __DRIChromaSiting vertical_siting,
696 unsigned *error,
697 void *loaderPrivate)
698 {
699 __DRIimage *image;
700 struct intel_image_format *f = intel_image_format_lookup(fourcc);
701
702 /* For now only packed formats that have native sampling are supported. */
703 if (!f || f->nplanes != 1) {
704 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
705 return NULL;
706 }
707
708 image = intel_create_image_from_fds(screen, width, height, fourcc, fds,
709 num_fds, strides, offsets,
710 loaderPrivate);
711
712 /*
713 * Invalid parameters and any inconsistencies between are assumed to be
714 * checked by the caller. Therefore besides unsupported formats one can fail
715 * only in allocation.
716 */
717 if (!image) {
718 *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
719 return NULL;
720 }
721
722 image->dma_buf_imported = true;
723 image->yuv_color_space = yuv_color_space;
724 image->sample_range = sample_range;
725 image->horizontal_siting = horizontal_siting;
726 image->vertical_siting = vertical_siting;
727
728 *error = __DRI_IMAGE_ERROR_SUCCESS;
729 return image;
730 }
731
732 static __DRIimage *
733 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
734 {
735 int width, height, offset, stride, dri_format, index;
736 struct intel_image_format *f;
737 uint32_t mask_x, mask_y;
738 __DRIimage *image;
739
740 if (parent == NULL || parent->planar_format == NULL)
741 return NULL;
742
743 f = parent->planar_format;
744
745 if (plane >= f->nplanes)
746 return NULL;
747
748 width = parent->region->width >> f->planes[plane].width_shift;
749 height = parent->region->height >> f->planes[plane].height_shift;
750 dri_format = f->planes[plane].dri_format;
751 index = f->planes[plane].buffer_index;
752 offset = parent->offsets[index];
753 stride = parent->strides[index];
754
755 image = intel_allocate_image(dri_format, loaderPrivate);
756 if (image == NULL)
757 return NULL;
758
759 if (offset + height * stride > parent->region->bo->size) {
760 _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
761 free(image);
762 return NULL;
763 }
764
765 image->region = calloc(sizeof(*image->region), 1);
766 if (image->region == NULL) {
767 free(image);
768 return NULL;
769 }
770
771 image->region->cpp = _mesa_get_format_bytes(image->format);
772 image->region->width = width;
773 image->region->height = height;
774 image->region->pitch = stride;
775 image->region->refcount = 1;
776 image->region->bo = parent->region->bo;
777 drm_intel_bo_reference(image->region->bo);
778 image->region->tiling = parent->region->tiling;
779 image->offset = offset;
780 intel_setup_image_from_dimensions(image);
781
782 intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
783 if (offset & mask_x)
784 _mesa_warning(NULL,
785 "intel_create_sub_image: offset not on tile boundary");
786
787 return image;
788 }
789
790 static struct __DRIimageExtensionRec intelImageExtension = {
791 .base = { __DRI_IMAGE, 8 },
792
793 .createImageFromName = intel_create_image_from_name,
794 .createImageFromRenderbuffer = intel_create_image_from_renderbuffer,
795 .destroyImage = intel_destroy_image,
796 .createImage = intel_create_image,
797 .queryImage = intel_query_image,
798 .dupImage = intel_dup_image,
799 .validateUsage = intel_validate_usage,
800 .createImageFromNames = intel_create_image_from_names,
801 .fromPlanar = intel_from_planar,
802 .createImageFromTexture = intel_create_image_from_texture,
803 .createImageFromFds = intel_create_image_from_fds,
804 .createImageFromDmaBufs = intel_create_image_from_dma_bufs
805 };
806
807 static const __DRIextension *intelScreenExtensions[] = {
808 &intelTexBufferExtension.base,
809 &intelFlushExtension.base,
810 &intelImageExtension.base,
811 &dri2ConfigQueryExtension.base,
812 NULL
813 };
814
815 static bool
816 intel_get_param(__DRIscreen *psp, int param, int *value)
817 {
818 int ret;
819 struct drm_i915_getparam gp;
820
821 memset(&gp, 0, sizeof(gp));
822 gp.param = param;
823 gp.value = value;
824
825 ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
826 if (ret) {
827 if (ret != -EINVAL)
828 _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
829 return false;
830 }
831
832 return true;
833 }
834
835 static bool
836 intel_get_boolean(__DRIscreen *psp, int param)
837 {
838 int value = 0;
839 return intel_get_param(psp, param, &value) && value;
840 }
841
842 static void
843 intelDestroyScreen(__DRIscreen * sPriv)
844 {
845 struct intel_screen *intelScreen = sPriv->driverPrivate;
846
847 dri_bufmgr_destroy(intelScreen->bufmgr);
848 driDestroyOptionInfo(&intelScreen->optionCache);
849
850 free(intelScreen);
851 sPriv->driverPrivate = NULL;
852 }
853
854
855 /**
856 * This is called when we need to set up GL rendering to a new X window.
857 */
858 static GLboolean
859 intelCreateBuffer(__DRIscreen * driScrnPriv,
860 __DRIdrawable * driDrawPriv,
861 const struct gl_config * mesaVis, GLboolean isPixmap)
862 {
863 struct intel_renderbuffer *rb;
864 struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
865 gl_format rgbFormat;
866 unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
867 struct gl_framebuffer *fb;
868
869 if (isPixmap)
870 return false;
871
872 fb = CALLOC_STRUCT(gl_framebuffer);
873 if (!fb)
874 return false;
875
876 _mesa_initialize_window_framebuffer(fb, mesaVis);
877
878 if (mesaVis->redBits == 5)
879 rgbFormat = MESA_FORMAT_RGB565;
880 else if (mesaVis->sRGBCapable)
881 rgbFormat = MESA_FORMAT_SARGB8;
882 else if (mesaVis->alphaBits == 0)
883 rgbFormat = MESA_FORMAT_XRGB8888;
884 else {
885 rgbFormat = MESA_FORMAT_SARGB8;
886 fb->Visual.sRGBCapable = true;
887 }
888
889 /* setup the hardware-based renderbuffers */
890 rb = intel_create_renderbuffer(rgbFormat, num_samples);
891 _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
892
893 if (mesaVis->doubleBufferMode) {
894 rb = intel_create_renderbuffer(rgbFormat, num_samples);
895 _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
896 }
897
898 /*
899 * Assert here that the gl_config has an expected depth/stencil bit
900 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
901 * which constructs the advertised configs.)
902 */
903 if (mesaVis->depthBits == 24) {
904 assert(mesaVis->stencilBits == 8);
905
906 if (screen->hw_has_separate_stencil) {
907 rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
908 num_samples);
909 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
910 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
911 num_samples);
912 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
913 } else {
914 /*
915 * Use combined depth/stencil. Note that the renderbuffer is
916 * attached to two attachment points.
917 */
918 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
919 num_samples);
920 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
921 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
922 }
923 }
924 else if (mesaVis->depthBits == 16) {
925 assert(mesaVis->stencilBits == 0);
926 rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
927 num_samples);
928 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
929 }
930 else {
931 assert(mesaVis->depthBits == 0);
932 assert(mesaVis->stencilBits == 0);
933 }
934
935 /* now add any/all software-based renderbuffers we may need */
936 _swrast_add_soft_renderbuffers(fb,
937 false, /* never sw color */
938 false, /* never sw depth */
939 false, /* never sw stencil */
940 mesaVis->accumRedBits > 0,
941 false, /* never sw alpha */
942 false /* never sw aux */ );
943 driDrawPriv->driverPrivate = fb;
944
945 return true;
946 }
947
948 static void
949 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
950 {
951 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
952
953 _mesa_reference_framebuffer(&fb, NULL);
954 }
955
956 static GLboolean
957 intelCreateContext(gl_api api,
958 const struct gl_config * mesaVis,
959 __DRIcontext * driContextPriv,
960 unsigned major_version,
961 unsigned minor_version,
962 uint32_t flags,
963 unsigned *error,
964 void *sharedContextPrivate)
965 {
966 bool success = false;
967
968 success = brwCreateContext(api, mesaVis,
969 driContextPriv,
970 major_version, minor_version, flags,
971 error, sharedContextPrivate);
972
973 if (success)
974 return true;
975
976 if (driContextPriv->driverPrivate != NULL)
977 intelDestroyContext(driContextPriv);
978
979 return false;
980 }
981
982 static bool
983 intel_init_bufmgr(struct intel_screen *intelScreen)
984 {
985 __DRIscreen *spriv = intelScreen->driScrnPriv;
986
987 intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
988
989 intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
990 if (intelScreen->bufmgr == NULL) {
991 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
992 __func__, __LINE__);
993 return false;
994 }
995
996 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
997
998 if (!intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA)) {
999 fprintf(stderr, "[%s: %u] Kernel 2.6.39 required.\n", __func__, __LINE__);
1000 return false;
1001 }
1002
1003 return true;
1004 }
1005
1006 /**
1007 * Override intel_screen.hw_has_separate_stencil with environment variable
1008 * INTEL_SEPARATE_STENCIL.
1009 *
1010 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
1011 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
1012 * is ignored.
1013 */
1014 static void
1015 intel_override_separate_stencil(struct intel_screen *screen)
1016 {
1017 const char *s = getenv("INTEL_SEPARATE_STENCIL");
1018 if (!s) {
1019 return;
1020 } else if (!strncmp("0", s, 2)) {
1021 screen->hw_has_separate_stencil = false;
1022 } else if (!strncmp("1", s, 2)) {
1023 screen->hw_has_separate_stencil = true;
1024 } else {
1025 fprintf(stderr,
1026 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
1027 "invalid value and is ignored", s);
1028 }
1029 }
1030
1031 static bool
1032 intel_detect_swizzling(struct intel_screen *screen)
1033 {
1034 drm_intel_bo *buffer;
1035 unsigned long flags = 0;
1036 unsigned long aligned_pitch;
1037 uint32_t tiling = I915_TILING_X;
1038 uint32_t swizzle_mode = 0;
1039
1040 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
1041 64, 64, 4,
1042 &tiling, &aligned_pitch, flags);
1043 if (buffer == NULL)
1044 return false;
1045
1046 drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
1047 drm_intel_bo_unreference(buffer);
1048
1049 if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
1050 return false;
1051 else
1052 return true;
1053 }
1054
1055 static __DRIconfig**
1056 intel_screen_make_configs(__DRIscreen *dri_screen)
1057 {
1058 static const gl_format formats[] = {
1059 MESA_FORMAT_RGB565,
1060 MESA_FORMAT_ARGB8888
1061 };
1062
1063 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1064 static const GLenum back_buffer_modes[] = {
1065 GLX_SWAP_UNDEFINED_OML, GLX_NONE,
1066 };
1067
1068 static const uint8_t singlesample_samples[1] = {0};
1069 static const uint8_t multisample_samples[2] = {4, 8};
1070
1071 struct intel_screen *screen = dri_screen->driverPrivate;
1072 uint8_t depth_bits[4], stencil_bits[4];
1073 __DRIconfig **configs = NULL;
1074
1075 /* Generate singlesample configs without accumulation buffer. */
1076 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1077 __DRIconfig **new_configs;
1078 int num_depth_stencil_bits = 2;
1079
1080 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1081 * buffer that has a different number of bits per pixel than the color
1082 * buffer, gen >= 6 supports this.
1083 */
1084 depth_bits[0] = 0;
1085 stencil_bits[0] = 0;
1086
1087 if (formats[i] == MESA_FORMAT_RGB565) {
1088 depth_bits[1] = 16;
1089 stencil_bits[1] = 0;
1090 if (screen->gen >= 6) {
1091 depth_bits[2] = 24;
1092 stencil_bits[2] = 8;
1093 num_depth_stencil_bits = 3;
1094 }
1095 } else {
1096 depth_bits[1] = 24;
1097 stencil_bits[1] = 8;
1098 }
1099
1100 new_configs = driCreateConfigs(formats[i],
1101 depth_bits,
1102 stencil_bits,
1103 num_depth_stencil_bits,
1104 back_buffer_modes, 2,
1105 singlesample_samples, 1,
1106 false);
1107 configs = driConcatConfigs(configs, new_configs);
1108 }
1109
1110 /* Generate the minimum possible set of configs that include an
1111 * accumulation buffer.
1112 */
1113 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1114 __DRIconfig **new_configs;
1115
1116 if (formats[i] == MESA_FORMAT_RGB565) {
1117 depth_bits[0] = 16;
1118 stencil_bits[0] = 0;
1119 } else {
1120 depth_bits[0] = 24;
1121 stencil_bits[0] = 8;
1122 }
1123
1124 new_configs = driCreateConfigs(formats[i],
1125 depth_bits, stencil_bits, 1,
1126 back_buffer_modes, 1,
1127 singlesample_samples, 1,
1128 true);
1129 configs = driConcatConfigs(configs, new_configs);
1130 }
1131
1132 /* Generate multisample configs.
1133 *
1134 * This loop breaks early, and hence is a no-op, on gen < 6.
1135 *
1136 * Multisample configs must follow the singlesample configs in order to
1137 * work around an X server bug present in 1.12. The X server chooses to
1138 * associate the first listed RGBA888-Z24S8 config, regardless of its
1139 * sample count, with the 32-bit depth visual used for compositing.
1140 *
1141 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1142 * supported. Singlebuffer configs are not supported because no one wants
1143 * them.
1144 */
1145 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1146 if (screen->gen < 6)
1147 break;
1148
1149 __DRIconfig **new_configs;
1150 const int num_depth_stencil_bits = 2;
1151 int num_msaa_modes = 0;
1152
1153 depth_bits[0] = 0;
1154 stencil_bits[0] = 0;
1155
1156 if (formats[i] == MESA_FORMAT_RGB565) {
1157 depth_bits[1] = 16;
1158 stencil_bits[1] = 0;
1159 } else {
1160 depth_bits[1] = 24;
1161 stencil_bits[1] = 8;
1162 }
1163
1164 if (screen->gen >= 7)
1165 num_msaa_modes = 2;
1166 else if (screen->gen == 6)
1167 num_msaa_modes = 1;
1168
1169 new_configs = driCreateConfigs(formats[i],
1170 depth_bits,
1171 stencil_bits,
1172 num_depth_stencil_bits,
1173 back_buffer_modes, 1,
1174 multisample_samples,
1175 num_msaa_modes,
1176 false);
1177 configs = driConcatConfigs(configs, new_configs);
1178 }
1179
1180 if (configs == NULL) {
1181 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1182 __LINE__);
1183 return NULL;
1184 }
1185
1186 return configs;
1187 }
1188
1189 static void
1190 set_max_gl_versions(struct intel_screen *screen)
1191 {
1192 int gl_version_override = _mesa_get_gl_version_override();
1193
1194 switch (screen->gen) {
1195 case 7:
1196 screen->max_gl_core_version = 31;
1197 screen->max_gl_compat_version = 30;
1198 screen->max_gl_es1_version = 11;
1199 screen->max_gl_es2_version = 30;
1200 break;
1201 case 6:
1202 screen->max_gl_core_version = 31;
1203 screen->max_gl_compat_version = 30;
1204 screen->max_gl_es1_version = 11;
1205 screen->max_gl_es2_version = 30;
1206 break;
1207 case 5:
1208 case 4:
1209 screen->max_gl_core_version = 0;
1210 screen->max_gl_compat_version = 21;
1211 screen->max_gl_es1_version = 11;
1212 screen->max_gl_es2_version = 20;
1213 break;
1214 default:
1215 assert(!"unrecognized intel_screen::gen");
1216 break;
1217 }
1218
1219 if (gl_version_override >= 31) {
1220 screen->max_gl_core_version = MAX2(screen->max_gl_core_version,
1221 gl_version_override);
1222 } else {
1223 screen->max_gl_compat_version = MAX2(screen->max_gl_compat_version,
1224 gl_version_override);
1225 }
1226
1227 #ifndef FEATURE_ES1
1228 screen->max_gl_es1_version = 0;
1229 #endif
1230
1231 #ifndef FEATURE_ES2
1232 screen->max_gl_es2_version = 0;
1233 #endif
1234 }
1235
1236 /**
1237 * This is the driver specific part of the createNewScreen entry point.
1238 * Called when using DRI2.
1239 *
1240 * \return the struct gl_config supported by this driver
1241 */
1242 static const
1243 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1244 {
1245 struct intel_screen *intelScreen;
1246
1247 if (psp->dri2.loader->base.version <= 2 ||
1248 psp->dri2.loader->getBuffersWithFormat == NULL) {
1249 fprintf(stderr,
1250 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1251 "support required\n");
1252 return false;
1253 }
1254
1255 /* Allocate the private area */
1256 intelScreen = calloc(1, sizeof *intelScreen);
1257 if (!intelScreen) {
1258 fprintf(stderr, "\nERROR! Allocating private area failed\n");
1259 return false;
1260 }
1261 /* parse information in __driConfigOptions */
1262 driParseOptionInfo(&intelScreen->optionCache,
1263 __driConfigOptions, __driNConfigOptions);
1264
1265 intelScreen->driScrnPriv = psp;
1266 psp->driverPrivate = (void *) intelScreen;
1267
1268 if (!intel_init_bufmgr(intelScreen))
1269 return false;
1270
1271 intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1272
1273 if (IS_GEN7(intelScreen->deviceID)) {
1274 intelScreen->gen = 7;
1275 } else if (IS_GEN6(intelScreen->deviceID)) {
1276 intelScreen->gen = 6;
1277 } else if (IS_GEN5(intelScreen->deviceID)) {
1278 intelScreen->gen = 5;
1279 } else {
1280 intelScreen->gen = 4;
1281 }
1282
1283 intelScreen->hw_has_separate_stencil = intelScreen->gen >= 6;
1284 intelScreen->hw_must_use_separate_stencil = intelScreen->gen >= 7;
1285
1286 int has_llc = 0;
1287 bool success = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_HAS_LLC,
1288 &has_llc);
1289 if (success && has_llc)
1290 intelScreen->hw_has_llc = true;
1291 else if (!success && intelScreen->gen >= 6)
1292 intelScreen->hw_has_llc = true;
1293
1294 intel_override_separate_stencil(intelScreen);
1295
1296 intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1297
1298 set_max_gl_versions(intelScreen);
1299
1300 psp->api_mask = (1 << __DRI_API_OPENGL);
1301 if (intelScreen->max_gl_core_version > 0)
1302 psp->api_mask |= (1 << __DRI_API_OPENGL_CORE);
1303 if (intelScreen->max_gl_es1_version > 0)
1304 psp->api_mask |= (1 << __DRI_API_GLES);
1305 if (intelScreen->max_gl_es2_version > 0)
1306 psp->api_mask |= (1 << __DRI_API_GLES2);
1307 if (intelScreen->max_gl_es2_version >= 30)
1308 psp->api_mask |= (1 << __DRI_API_GLES3);
1309
1310 psp->extensions = intelScreenExtensions;
1311
1312 return (const __DRIconfig**) intel_screen_make_configs(psp);
1313 }
1314
1315 struct intel_buffer {
1316 __DRIbuffer base;
1317 struct intel_region *region;
1318 };
1319
1320 static __DRIbuffer *
1321 intelAllocateBuffer(__DRIscreen *screen,
1322 unsigned attachment, unsigned format,
1323 int width, int height)
1324 {
1325 struct intel_buffer *intelBuffer;
1326 struct intel_screen *intelScreen = screen->driverPrivate;
1327
1328 assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1329 attachment == __DRI_BUFFER_BACK_LEFT);
1330
1331 intelBuffer = calloc(1, sizeof *intelBuffer);
1332 if (intelBuffer == NULL)
1333 return NULL;
1334
1335 /* The front and back buffers are color buffers, which are X tiled. */
1336 intelBuffer->region = intel_region_alloc(intelScreen,
1337 I915_TILING_X,
1338 format / 8,
1339 width,
1340 height,
1341 true);
1342
1343 if (intelBuffer->region == NULL) {
1344 free(intelBuffer);
1345 return NULL;
1346 }
1347
1348 intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1349
1350 intelBuffer->base.attachment = attachment;
1351 intelBuffer->base.cpp = intelBuffer->region->cpp;
1352 intelBuffer->base.pitch = intelBuffer->region->pitch;
1353
1354 return &intelBuffer->base;
1355 }
1356
1357 static void
1358 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1359 {
1360 struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1361
1362 intel_region_release(&intelBuffer->region);
1363 free(intelBuffer);
1364 }
1365
1366
1367 const struct __DriverAPIRec driDriverAPI = {
1368 .InitScreen = intelInitScreen2,
1369 .DestroyScreen = intelDestroyScreen,
1370 .CreateContext = intelCreateContext,
1371 .DestroyContext = intelDestroyContext,
1372 .CreateBuffer = intelCreateBuffer,
1373 .DestroyBuffer = intelDestroyBuffer,
1374 .MakeCurrent = intelMakeCurrent,
1375 .UnbindContext = intelUnbindContext,
1376 .AllocateBuffer = intelAllocateBuffer,
1377 .ReleaseBuffer = intelReleaseBuffer
1378 };
1379
1380 /* This is the table of extensions that the loader will dlsym() for. */
1381 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1382 &driCoreExtension.base,
1383 &driDRI2Extension.base,
1384 NULL
1385 };