1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/texobj.h"
35 #include "main/hash.h"
36 #include "main/fbobject.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
43 PUBLIC
const char __driConfigOptions
[] =
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC
)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
50 DRI_CONF_OPT_BEGIN_V(bo_reuse
, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en
, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
57 DRI_CONF_OPT_BEGIN_B(hiz
, "true")
58 DRI_CONF_DESC(en
, "Enable Hierarchical Z on gen6+")
62 DRI_CONF_SECTION_QUALITY
63 DRI_CONF_FORCE_S3TC_ENABLE("false")
65 DRI_CONF_SECTION_DEBUG
66 DRI_CONF_NO_RAST("false")
67 DRI_CONF_ALWAYS_FLUSH_BATCH("false")
68 DRI_CONF_ALWAYS_FLUSH_CACHE("false")
69 DRI_CONF_DISABLE_THROTTLING("false")
70 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
71 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
72 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
74 DRI_CONF_OPT_BEGIN_B(shader_precompile
, "true")
75 DRI_CONF_DESC(en
, "Perform code generation at shader link time.")
80 #include "intel_batchbuffer.h"
81 #include "intel_buffers.h"
82 #include "intel_bufmgr.h"
83 #include "intel_chipset.h"
84 #include "intel_fbo.h"
85 #include "intel_mipmap_tree.h"
86 #include "intel_screen.h"
87 #include "intel_tex.h"
88 #include "intel_regions.h"
90 #include "brw_context.h"
94 #ifdef USE_NEW_INTERFACE
95 static PFNGLXCREATECONTEXTMODES create_context_modes
= NULL
;
96 #endif /*USE_NEW_INTERFACE */
99 * For debugging purposes, this returns a time in seconds.
106 clock_gettime(CLOCK_MONOTONIC
, &tp
);
108 return tp
.tv_sec
+ tp
.tv_nsec
/ 1000000000.0;
112 aub_dump_bmp(struct gl_context
*ctx
)
114 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
116 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
117 struct intel_renderbuffer
*irb
=
118 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
120 if (irb
&& irb
->mt
) {
121 enum aub_dump_bmp_format format
;
123 switch (irb
->Base
.Base
.Format
) {
124 case MESA_FORMAT_ARGB8888
:
125 case MESA_FORMAT_XRGB8888
:
126 format
= AUB_DUMP_BMP_FORMAT_ARGB_8888
;
132 assert(irb
->mt
->region
->pitch
% irb
->mt
->region
->cpp
== 0);
133 drm_intel_gem_bo_aub_dump_bmp(irb
->mt
->region
->bo
,
136 irb
->Base
.Base
.Width
,
137 irb
->Base
.Base
.Height
,
139 irb
->mt
->region
->pitch
,
145 static const __DRItexBufferExtension intelTexBufferExtension
= {
146 .base
= { __DRI_TEX_BUFFER
, __DRI_TEX_BUFFER_VERSION
},
148 .setTexBuffer
= intelSetTexBuffer
,
149 .setTexBuffer2
= intelSetTexBuffer2
,
150 .releaseTexBuffer
= NULL
,
154 intelDRI2Flush(__DRIdrawable
*drawable
)
156 GET_CURRENT_CONTEXT(ctx
);
157 struct brw_context
*brw
= brw_context(ctx
);
161 intel_resolve_for_dri2_flush(brw
, drawable
);
162 brw
->need_throttle
= true;
165 intel_batchbuffer_flush(brw
);
167 if (INTEL_DEBUG
& DEBUG_AUB
) {
172 static const struct __DRI2flushExtensionRec intelFlushExtension
= {
173 .base
= { __DRI2_FLUSH
, 3 },
175 .flush
= intelDRI2Flush
,
176 .invalidate
= dri2InvalidateDrawable
,
179 static struct intel_image_format intel_image_formats
[] = {
180 { __DRI_IMAGE_FOURCC_ARGB8888
, __DRI_IMAGE_COMPONENTS_RGBA
, 1,
181 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } },
183 { __DRI_IMAGE_FOURCC_XRGB8888
, __DRI_IMAGE_COMPONENTS_RGB
, 1,
184 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888
, 4 }, } },
186 { __DRI_IMAGE_FOURCC_YUV410
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
187 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
188 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 },
189 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 } } },
191 { __DRI_IMAGE_FOURCC_YUV411
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
192 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
193 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
194 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
196 { __DRI_IMAGE_FOURCC_YUV420
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
197 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
198 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 },
199 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 } } },
201 { __DRI_IMAGE_FOURCC_YUV422
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
202 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
203 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
204 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
206 { __DRI_IMAGE_FOURCC_YUV444
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
207 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
208 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
209 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
211 { __DRI_IMAGE_FOURCC_NV12
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
212 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
213 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
215 { __DRI_IMAGE_FOURCC_NV16
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
216 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
217 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
219 /* For YUYV buffers, we set up two overlapping DRI images and treat
220 * them as planar buffers in the compositors. Plane 0 is GR88 and
221 * samples YU or YV pairs and places Y into the R component, while
222 * plane 1 is ARGB and samples YUYV clusters and places pairs and
223 * places U into the G component and V into A. This lets the
224 * texture sampler interpolate the Y components correctly when
225 * sampling from plane 0, and interpolate U and V correctly when
226 * sampling from plane 1. */
227 { __DRI_IMAGE_FOURCC_YUYV
, __DRI_IMAGE_COMPONENTS_Y_XUXV
, 2,
228 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88
, 2 },
229 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } }
232 static struct intel_image_format
*
233 intel_image_format_lookup(int fourcc
)
235 struct intel_image_format
*f
= NULL
;
237 for (unsigned i
= 0; i
< ARRAY_SIZE(intel_image_formats
); i
++) {
238 if (intel_image_formats
[i
].fourcc
== fourcc
) {
239 f
= &intel_image_formats
[i
];
248 intel_allocate_image(int dri_format
, void *loaderPrivate
)
252 image
= calloc(1, sizeof *image
);
256 image
->dri_format
= dri_format
;
259 switch (dri_format
) {
260 case __DRI_IMAGE_FORMAT_RGB565
:
261 image
->format
= MESA_FORMAT_RGB565
;
263 case __DRI_IMAGE_FORMAT_XRGB8888
:
264 image
->format
= MESA_FORMAT_XRGB8888
;
266 case __DRI_IMAGE_FORMAT_ARGB8888
:
267 image
->format
= MESA_FORMAT_ARGB8888
;
269 case __DRI_IMAGE_FORMAT_ABGR8888
:
270 image
->format
= MESA_FORMAT_RGBA8888_REV
;
272 case __DRI_IMAGE_FORMAT_XBGR8888
:
273 image
->format
= MESA_FORMAT_RGBX8888_REV
;
275 case __DRI_IMAGE_FORMAT_R8
:
276 image
->format
= MESA_FORMAT_R8
;
278 case __DRI_IMAGE_FORMAT_GR88
:
279 image
->format
= MESA_FORMAT_GR88
;
281 case __DRI_IMAGE_FORMAT_NONE
:
282 image
->format
= MESA_FORMAT_NONE
;
289 image
->internal_format
= _mesa_get_format_base_format(image
->format
);
290 image
->data
= loaderPrivate
;
296 * Sets up a DRIImage structure to point to our shared image in a region
299 intel_setup_image_from_mipmap_tree(struct brw_context
*brw
, __DRIimage
*image
,
300 struct intel_mipmap_tree
*mt
, GLuint level
,
303 unsigned int draw_x
, draw_y
;
304 uint32_t mask_x
, mask_y
;
306 intel_miptree_make_shareable(brw
, mt
);
308 intel_miptree_check_level_layer(mt
, level
, zoffset
);
310 intel_region_get_tile_masks(mt
->region
, &mask_x
, &mask_y
, false);
311 intel_miptree_get_image_offset(mt
, level
, zoffset
, &draw_x
, &draw_y
);
313 image
->width
= mt
->level
[level
].width
;
314 image
->height
= mt
->level
[level
].height
;
315 image
->tile_x
= draw_x
& mask_x
;
316 image
->tile_y
= draw_y
& mask_y
;
318 image
->offset
= intel_region_get_aligned_offset(mt
->region
,
323 intel_region_reference(&image
->region
, mt
->region
);
327 intel_setup_image_from_dimensions(__DRIimage
*image
)
329 image
->width
= image
->region
->width
;
330 image
->height
= image
->region
->height
;
333 image
->has_depthstencil
= false;
336 static inline uint32_t
337 intel_dri_format(GLuint format
)
340 case MESA_FORMAT_RGB565
:
341 return __DRI_IMAGE_FORMAT_RGB565
;
342 case MESA_FORMAT_XRGB8888
:
343 return __DRI_IMAGE_FORMAT_XRGB8888
;
344 case MESA_FORMAT_ARGB8888
:
345 return __DRI_IMAGE_FORMAT_ARGB8888
;
346 case MESA_FORMAT_RGBA8888_REV
:
347 return __DRI_IMAGE_FORMAT_ABGR8888
;
349 return __DRI_IMAGE_FORMAT_R8
;
350 case MESA_FORMAT_RG88
:
351 return __DRI_IMAGE_FORMAT_GR88
;
354 return MESA_FORMAT_NONE
;
358 intel_create_image_from_name(__DRIscreen
*screen
,
359 int width
, int height
, int format
,
360 int name
, int pitch
, void *loaderPrivate
)
362 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
366 image
= intel_allocate_image(format
, loaderPrivate
);
370 if (image
->format
== MESA_FORMAT_NONE
)
373 cpp
= _mesa_get_format_bytes(image
->format
);
374 image
->region
= intel_region_alloc_for_handle(intelScreen
,
376 pitch
* cpp
, name
, "image");
377 if (image
->region
== NULL
) {
382 intel_setup_image_from_dimensions(image
);
388 intel_create_image_from_renderbuffer(__DRIcontext
*context
,
389 int renderbuffer
, void *loaderPrivate
)
392 struct brw_context
*brw
= context
->driverPrivate
;
393 struct gl_context
*ctx
= &brw
->ctx
;
394 struct gl_renderbuffer
*rb
;
395 struct intel_renderbuffer
*irb
;
397 rb
= _mesa_lookup_renderbuffer(ctx
, renderbuffer
);
399 _mesa_error(ctx
, GL_INVALID_OPERATION
, "glRenderbufferExternalMESA");
403 irb
= intel_renderbuffer(rb
);
404 intel_miptree_make_shareable(brw
, irb
->mt
);
405 image
= calloc(1, sizeof *image
);
409 image
->internal_format
= rb
->InternalFormat
;
410 image
->format
= rb
->Format
;
412 image
->data
= loaderPrivate
;
413 intel_region_reference(&image
->region
, irb
->mt
->region
);
414 intel_setup_image_from_dimensions(image
);
415 image
->dri_format
= intel_dri_format(image
->format
);
416 image
->has_depthstencil
= irb
->mt
->stencil_mt
? true : false;
418 rb
->NeedsFinishRenderTexture
= true;
423 intel_create_image_from_texture(__DRIcontext
*context
, int target
,
424 unsigned texture
, int zoffset
,
430 struct brw_context
*brw
= context
->driverPrivate
;
431 struct gl_texture_object
*obj
;
432 struct intel_texture_object
*iobj
;
435 obj
= _mesa_lookup_texture(&brw
->ctx
, texture
);
436 if (!obj
|| obj
->Target
!= target
) {
437 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
441 if (target
== GL_TEXTURE_CUBE_MAP
)
444 _mesa_test_texobj_completeness(&brw
->ctx
, obj
);
445 iobj
= intel_texture_object(obj
);
446 if (!obj
->_BaseComplete
|| (level
> 0 && !obj
->_MipmapComplete
)) {
447 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
451 if (level
< obj
->BaseLevel
|| level
> obj
->_MaxLevel
) {
452 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
456 if (target
== GL_TEXTURE_3D
&& obj
->Image
[face
][level
]->Depth
< zoffset
) {
457 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
460 image
= calloc(1, sizeof *image
);
462 *error
= __DRI_IMAGE_ERROR_BAD_ALLOC
;
466 image
->internal_format
= obj
->Image
[face
][level
]->InternalFormat
;
467 image
->format
= obj
->Image
[face
][level
]->TexFormat
;
468 image
->data
= loaderPrivate
;
469 intel_setup_image_from_mipmap_tree(brw
, image
, iobj
->mt
, level
, zoffset
);
470 image
->dri_format
= intel_dri_format(image
->format
);
471 image
->has_depthstencil
= iobj
->mt
->stencil_mt
? true : false;
472 if (image
->dri_format
== MESA_FORMAT_NONE
) {
473 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
478 *error
= __DRI_IMAGE_ERROR_SUCCESS
;
483 intel_destroy_image(__DRIimage
*image
)
485 intel_region_release(&image
->region
);
490 intel_create_image(__DRIscreen
*screen
,
491 int width
, int height
, int format
,
496 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
500 tiling
= I915_TILING_X
;
501 if (use
& __DRI_IMAGE_USE_CURSOR
) {
502 if (width
!= 64 || height
!= 64)
504 tiling
= I915_TILING_NONE
;
507 image
= intel_allocate_image(format
, loaderPrivate
);
511 cpp
= _mesa_get_format_bytes(image
->format
);
513 intel_region_alloc(intelScreen
, tiling
, cpp
, width
, height
, true);
514 if (image
->region
== NULL
) {
519 intel_setup_image_from_dimensions(image
);
525 intel_query_image(__DRIimage
*image
, int attrib
, int *value
)
528 case __DRI_IMAGE_ATTRIB_STRIDE
:
529 *value
= image
->region
->pitch
;
531 case __DRI_IMAGE_ATTRIB_HANDLE
:
532 *value
= image
->region
->bo
->handle
;
534 case __DRI_IMAGE_ATTRIB_NAME
:
535 return intel_region_flink(image
->region
, (uint32_t *) value
);
536 case __DRI_IMAGE_ATTRIB_FORMAT
:
537 *value
= image
->dri_format
;
539 case __DRI_IMAGE_ATTRIB_WIDTH
:
540 *value
= image
->region
->width
;
542 case __DRI_IMAGE_ATTRIB_HEIGHT
:
543 *value
= image
->region
->height
;
545 case __DRI_IMAGE_ATTRIB_COMPONENTS
:
546 if (image
->planar_format
== NULL
)
548 *value
= image
->planar_format
->components
;
550 case __DRI_IMAGE_ATTRIB_FD
:
551 if (drm_intel_bo_gem_export_to_prime(image
->region
->bo
, value
) == 0)
560 intel_dup_image(__DRIimage
*orig_image
, void *loaderPrivate
)
564 image
= calloc(1, sizeof *image
);
568 intel_region_reference(&image
->region
, orig_image
->region
);
569 if (image
->region
== NULL
) {
574 image
->internal_format
= orig_image
->internal_format
;
575 image
->planar_format
= orig_image
->planar_format
;
576 image
->dri_format
= orig_image
->dri_format
;
577 image
->format
= orig_image
->format
;
578 image
->offset
= orig_image
->offset
;
579 image
->width
= orig_image
->width
;
580 image
->height
= orig_image
->height
;
581 image
->tile_x
= orig_image
->tile_x
;
582 image
->tile_y
= orig_image
->tile_y
;
583 image
->has_depthstencil
= orig_image
->has_depthstencil
;
584 image
->data
= loaderPrivate
;
586 memcpy(image
->strides
, orig_image
->strides
, sizeof(image
->strides
));
587 memcpy(image
->offsets
, orig_image
->offsets
, sizeof(image
->offsets
));
593 intel_validate_usage(__DRIimage
*image
, unsigned int use
)
595 if (use
& __DRI_IMAGE_USE_CURSOR
) {
596 if (image
->region
->width
!= 64 || image
->region
->height
!= 64)
604 intel_create_image_from_names(__DRIscreen
*screen
,
605 int width
, int height
, int fourcc
,
606 int *names
, int num_names
,
607 int *strides
, int *offsets
,
610 struct intel_image_format
*f
= NULL
;
614 if (screen
== NULL
|| names
== NULL
|| num_names
!= 1)
617 f
= intel_image_format_lookup(fourcc
);
621 image
= intel_create_image_from_name(screen
, width
, height
,
622 __DRI_IMAGE_FORMAT_NONE
,
623 names
[0], strides
[0],
629 image
->planar_format
= f
;
630 for (i
= 0; i
< f
->nplanes
; i
++) {
631 index
= f
->planes
[i
].buffer_index
;
632 image
->offsets
[index
] = offsets
[index
];
633 image
->strides
[index
] = strides
[index
];
640 intel_create_image_from_fds(__DRIscreen
*screen
,
641 int width
, int height
, int fourcc
,
642 int *fds
, int num_fds
, int *strides
, int *offsets
,
645 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
646 struct intel_image_format
*f
;
650 if (fds
== NULL
|| num_fds
!= 1)
653 f
= intel_image_format_lookup(fourcc
);
658 image
= intel_allocate_image(f
->planes
[0].dri_format
, loaderPrivate
);
660 image
= intel_allocate_image(__DRI_IMAGE_FORMAT_NONE
, loaderPrivate
);
665 image
->region
= intel_region_alloc_for_fd(intelScreen
,
667 strides
[0], fds
[0], "image");
668 if (image
->region
== NULL
) {
673 image
->planar_format
= f
;
674 for (i
= 0; i
< f
->nplanes
; i
++) {
675 index
= f
->planes
[i
].buffer_index
;
676 image
->offsets
[index
] = offsets
[index
];
677 image
->strides
[index
] = strides
[index
];
680 intel_setup_image_from_dimensions(image
);
686 intel_create_image_from_dma_bufs(__DRIscreen
*screen
,
687 int width
, int height
, int fourcc
,
688 int *fds
, int num_fds
,
689 int *strides
, int *offsets
,
690 enum __DRIYUVColorSpace yuv_color_space
,
691 enum __DRISampleRange sample_range
,
692 enum __DRIChromaSiting horizontal_siting
,
693 enum __DRIChromaSiting vertical_siting
,
698 struct intel_image_format
*f
= intel_image_format_lookup(fourcc
);
700 /* For now only packed formats that have native sampling are supported. */
701 if (!f
|| f
->nplanes
!= 1) {
702 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
706 image
= intel_create_image_from_fds(screen
, width
, height
, fourcc
, fds
,
707 num_fds
, strides
, offsets
,
711 * Invalid parameters and any inconsistencies between are assumed to be
712 * checked by the caller. Therefore besides unsupported formats one can fail
713 * only in allocation.
716 *error
= __DRI_IMAGE_ERROR_BAD_ALLOC
;
720 image
->dma_buf_imported
= true;
721 image
->yuv_color_space
= yuv_color_space
;
722 image
->sample_range
= sample_range
;
723 image
->horizontal_siting
= horizontal_siting
;
724 image
->vertical_siting
= vertical_siting
;
726 *error
= __DRI_IMAGE_ERROR_SUCCESS
;
731 intel_from_planar(__DRIimage
*parent
, int plane
, void *loaderPrivate
)
733 int width
, height
, offset
, stride
, dri_format
, index
;
734 struct intel_image_format
*f
;
735 uint32_t mask_x
, mask_y
;
738 if (parent
== NULL
|| parent
->planar_format
== NULL
)
741 f
= parent
->planar_format
;
743 if (plane
>= f
->nplanes
)
746 width
= parent
->region
->width
>> f
->planes
[plane
].width_shift
;
747 height
= parent
->region
->height
>> f
->planes
[plane
].height_shift
;
748 dri_format
= f
->planes
[plane
].dri_format
;
749 index
= f
->planes
[plane
].buffer_index
;
750 offset
= parent
->offsets
[index
];
751 stride
= parent
->strides
[index
];
753 image
= intel_allocate_image(dri_format
, loaderPrivate
);
757 if (offset
+ height
* stride
> parent
->region
->bo
->size
) {
758 _mesa_warning(NULL
, "intel_create_sub_image: subimage out of bounds");
763 image
->region
= calloc(sizeof(*image
->region
), 1);
764 if (image
->region
== NULL
) {
769 image
->region
->cpp
= _mesa_get_format_bytes(image
->format
);
770 image
->region
->width
= width
;
771 image
->region
->height
= height
;
772 image
->region
->pitch
= stride
;
773 image
->region
->refcount
= 1;
774 image
->region
->bo
= parent
->region
->bo
;
775 drm_intel_bo_reference(image
->region
->bo
);
776 image
->region
->tiling
= parent
->region
->tiling
;
777 image
->offset
= offset
;
778 intel_setup_image_from_dimensions(image
);
780 intel_region_get_tile_masks(image
->region
, &mask_x
, &mask_y
, false);
783 "intel_create_sub_image: offset not on tile boundary");
788 static struct __DRIimageExtensionRec intelImageExtension
= {
789 .base
= { __DRI_IMAGE
, 8 },
791 .createImageFromName
= intel_create_image_from_name
,
792 .createImageFromRenderbuffer
= intel_create_image_from_renderbuffer
,
793 .destroyImage
= intel_destroy_image
,
794 .createImage
= intel_create_image
,
795 .queryImage
= intel_query_image
,
796 .dupImage
= intel_dup_image
,
797 .validateUsage
= intel_validate_usage
,
798 .createImageFromNames
= intel_create_image_from_names
,
799 .fromPlanar
= intel_from_planar
,
800 .createImageFromTexture
= intel_create_image_from_texture
,
801 .createImageFromFds
= intel_create_image_from_fds
,
802 .createImageFromDmaBufs
= intel_create_image_from_dma_bufs
805 static const __DRIextension
*intelScreenExtensions
[] = {
806 &intelTexBufferExtension
.base
,
807 &intelFlushExtension
.base
,
808 &intelImageExtension
.base
,
809 &dri2ConfigQueryExtension
.base
,
814 intel_get_param(__DRIscreen
*psp
, int param
, int *value
)
817 struct drm_i915_getparam gp
;
819 memset(&gp
, 0, sizeof(gp
));
823 ret
= drmCommandWriteRead(psp
->fd
, DRM_I915_GETPARAM
, &gp
, sizeof(gp
));
826 _mesa_warning(NULL
, "drm_i915_getparam: %d", ret
);
834 intel_get_boolean(__DRIscreen
*psp
, int param
)
837 return intel_get_param(psp
, param
, &value
) && value
;
841 intelDestroyScreen(__DRIscreen
* sPriv
)
843 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
845 dri_bufmgr_destroy(intelScreen
->bufmgr
);
846 driDestroyOptionInfo(&intelScreen
->optionCache
);
849 sPriv
->driverPrivate
= NULL
;
854 * This is called when we need to set up GL rendering to a new X window.
857 intelCreateBuffer(__DRIscreen
* driScrnPriv
,
858 __DRIdrawable
* driDrawPriv
,
859 const struct gl_config
* mesaVis
, GLboolean isPixmap
)
861 struct intel_renderbuffer
*rb
;
862 struct intel_screen
*screen
= (struct intel_screen
*) driScrnPriv
->driverPrivate
;
864 unsigned num_samples
= intel_quantize_num_samples(screen
, mesaVis
->samples
);
865 struct gl_framebuffer
*fb
;
870 fb
= CALLOC_STRUCT(gl_framebuffer
);
874 _mesa_initialize_window_framebuffer(fb
, mesaVis
);
876 if (mesaVis
->redBits
== 5)
877 rgbFormat
= MESA_FORMAT_RGB565
;
878 else if (mesaVis
->sRGBCapable
)
879 rgbFormat
= MESA_FORMAT_SARGB8
;
880 else if (mesaVis
->alphaBits
== 0)
881 rgbFormat
= MESA_FORMAT_XRGB8888
;
883 rgbFormat
= MESA_FORMAT_SARGB8
;
884 fb
->Visual
.sRGBCapable
= true;
887 /* setup the hardware-based renderbuffers */
888 rb
= intel_create_renderbuffer(rgbFormat
, num_samples
);
889 _mesa_add_renderbuffer(fb
, BUFFER_FRONT_LEFT
, &rb
->Base
.Base
);
891 if (mesaVis
->doubleBufferMode
) {
892 rb
= intel_create_renderbuffer(rgbFormat
, num_samples
);
893 _mesa_add_renderbuffer(fb
, BUFFER_BACK_LEFT
, &rb
->Base
.Base
);
897 * Assert here that the gl_config has an expected depth/stencil bit
898 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
899 * which constructs the advertised configs.)
901 if (mesaVis
->depthBits
== 24) {
902 assert(mesaVis
->stencilBits
== 8);
904 if (screen
->hw_has_separate_stencil
) {
905 rb
= intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24
,
907 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
908 rb
= intel_create_private_renderbuffer(MESA_FORMAT_S8
,
910 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
913 * Use combined depth/stencil. Note that the renderbuffer is
914 * attached to two attachment points.
916 rb
= intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24
,
918 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
919 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
922 else if (mesaVis
->depthBits
== 16) {
923 assert(mesaVis
->stencilBits
== 0);
924 rb
= intel_create_private_renderbuffer(MESA_FORMAT_Z16
,
926 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
929 assert(mesaVis
->depthBits
== 0);
930 assert(mesaVis
->stencilBits
== 0);
933 /* now add any/all software-based renderbuffers we may need */
934 _swrast_add_soft_renderbuffers(fb
,
935 false, /* never sw color */
936 false, /* never sw depth */
937 false, /* never sw stencil */
938 mesaVis
->accumRedBits
> 0,
939 false, /* never sw alpha */
940 false /* never sw aux */ );
941 driDrawPriv
->driverPrivate
= fb
;
947 intelDestroyBuffer(__DRIdrawable
* driDrawPriv
)
949 struct gl_framebuffer
*fb
= driDrawPriv
->driverPrivate
;
951 _mesa_reference_framebuffer(&fb
, NULL
);
955 intelCreateContext(gl_api api
,
956 const struct gl_config
* mesaVis
,
957 __DRIcontext
* driContextPriv
,
958 unsigned major_version
,
959 unsigned minor_version
,
962 void *sharedContextPrivate
)
964 bool success
= false;
966 success
= brwCreateContext(api
, mesaVis
,
968 major_version
, minor_version
, flags
,
969 error
, sharedContextPrivate
);
974 if (driContextPriv
->driverPrivate
!= NULL
)
975 intelDestroyContext(driContextPriv
);
981 intel_init_bufmgr(struct intel_screen
*intelScreen
)
983 __DRIscreen
*spriv
= intelScreen
->driScrnPriv
;
985 intelScreen
->no_hw
= getenv("INTEL_NO_HW") != NULL
;
987 intelScreen
->bufmgr
= intel_bufmgr_gem_init(spriv
->fd
, BATCH_SZ
);
988 if (intelScreen
->bufmgr
== NULL
) {
989 fprintf(stderr
, "[%s:%u] Error initializing buffer manager.\n",
994 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen
->bufmgr
);
996 if (!intel_get_boolean(spriv
, I915_PARAM_HAS_RELAXED_DELTA
)) {
997 fprintf(stderr
, "[%s: %u] Kernel 2.6.39 required.\n", __func__
, __LINE__
);
1005 * Override intel_screen.hw_has_separate_stencil with environment variable
1006 * INTEL_SEPARATE_STENCIL.
1008 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
1009 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
1013 intel_override_separate_stencil(struct intel_screen
*screen
)
1015 const char *s
= getenv("INTEL_SEPARATE_STENCIL");
1018 } else if (!strncmp("0", s
, 2)) {
1019 screen
->hw_has_separate_stencil
= false;
1020 } else if (!strncmp("1", s
, 2)) {
1021 screen
->hw_has_separate_stencil
= true;
1024 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
1025 "invalid value and is ignored", s
);
1030 intel_detect_swizzling(struct intel_screen
*screen
)
1032 drm_intel_bo
*buffer
;
1033 unsigned long flags
= 0;
1034 unsigned long aligned_pitch
;
1035 uint32_t tiling
= I915_TILING_X
;
1036 uint32_t swizzle_mode
= 0;
1038 buffer
= drm_intel_bo_alloc_tiled(screen
->bufmgr
, "swizzle test",
1040 &tiling
, &aligned_pitch
, flags
);
1044 drm_intel_bo_get_tiling(buffer
, &tiling
, &swizzle_mode
);
1045 drm_intel_bo_unreference(buffer
);
1047 if (swizzle_mode
== I915_BIT_6_SWIZZLE_NONE
)
1053 static __DRIconfig
**
1054 intel_screen_make_configs(__DRIscreen
*dri_screen
)
1056 static const gl_format formats
[] = {
1058 MESA_FORMAT_ARGB8888
1061 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1062 static const GLenum back_buffer_modes
[] = {
1063 GLX_SWAP_UNDEFINED_OML
, GLX_NONE
,
1066 static const uint8_t singlesample_samples
[1] = {0};
1067 static const uint8_t multisample_samples
[2] = {4, 8};
1069 struct intel_screen
*screen
= dri_screen
->driverPrivate
;
1070 uint8_t depth_bits
[4], stencil_bits
[4];
1071 __DRIconfig
**configs
= NULL
;
1073 /* Generate singlesample configs without accumulation buffer. */
1074 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1075 __DRIconfig
**new_configs
;
1076 int num_depth_stencil_bits
= 2;
1078 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1079 * buffer that has a different number of bits per pixel than the color
1080 * buffer, gen >= 6 supports this.
1083 stencil_bits
[0] = 0;
1085 if (formats
[i
] == MESA_FORMAT_RGB565
) {
1087 stencil_bits
[1] = 0;
1088 if (screen
->gen
>= 6) {
1090 stencil_bits
[2] = 8;
1091 num_depth_stencil_bits
= 3;
1095 stencil_bits
[1] = 8;
1098 new_configs
= driCreateConfigs(formats
[i
],
1101 num_depth_stencil_bits
,
1102 back_buffer_modes
, 2,
1103 singlesample_samples
, 1,
1105 configs
= driConcatConfigs(configs
, new_configs
);
1108 /* Generate the minimum possible set of configs that include an
1109 * accumulation buffer.
1111 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1112 __DRIconfig
**new_configs
;
1114 if (formats
[i
] == MESA_FORMAT_RGB565
) {
1116 stencil_bits
[0] = 0;
1119 stencil_bits
[0] = 8;
1122 new_configs
= driCreateConfigs(formats
[i
],
1123 depth_bits
, stencil_bits
, 1,
1124 back_buffer_modes
, 1,
1125 singlesample_samples
, 1,
1127 configs
= driConcatConfigs(configs
, new_configs
);
1130 /* Generate multisample configs.
1132 * This loop breaks early, and hence is a no-op, on gen < 6.
1134 * Multisample configs must follow the singlesample configs in order to
1135 * work around an X server bug present in 1.12. The X server chooses to
1136 * associate the first listed RGBA888-Z24S8 config, regardless of its
1137 * sample count, with the 32-bit depth visual used for compositing.
1139 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1140 * supported. Singlebuffer configs are not supported because no one wants
1143 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1144 if (screen
->gen
< 6)
1147 __DRIconfig
**new_configs
;
1148 const int num_depth_stencil_bits
= 2;
1149 int num_msaa_modes
= 0;
1152 stencil_bits
[0] = 0;
1154 if (formats
[i
] == MESA_FORMAT_RGB565
) {
1156 stencil_bits
[1] = 0;
1159 stencil_bits
[1] = 8;
1162 if (screen
->gen
>= 7)
1164 else if (screen
->gen
== 6)
1167 new_configs
= driCreateConfigs(formats
[i
],
1170 num_depth_stencil_bits
,
1171 back_buffer_modes
, 1,
1172 multisample_samples
,
1175 configs
= driConcatConfigs(configs
, new_configs
);
1178 if (configs
== NULL
) {
1179 fprintf(stderr
, "[%s:%u] Error creating FBConfig!\n", __func__
,
1188 set_max_gl_versions(struct intel_screen
*screen
)
1190 int gl_version_override
= _mesa_get_gl_version_override();
1192 switch (screen
->gen
) {
1194 screen
->max_gl_core_version
= 31;
1195 screen
->max_gl_compat_version
= 30;
1196 screen
->max_gl_es1_version
= 11;
1197 screen
->max_gl_es2_version
= 30;
1200 screen
->max_gl_core_version
= 31;
1201 screen
->max_gl_compat_version
= 30;
1202 screen
->max_gl_es1_version
= 11;
1203 screen
->max_gl_es2_version
= 30;
1207 screen
->max_gl_core_version
= 0;
1208 screen
->max_gl_compat_version
= 21;
1209 screen
->max_gl_es1_version
= 11;
1210 screen
->max_gl_es2_version
= 20;
1213 assert(!"unrecognized intel_screen::gen");
1217 if (gl_version_override
>= 31) {
1218 screen
->max_gl_core_version
= MAX2(screen
->max_gl_core_version
,
1219 gl_version_override
);
1221 screen
->max_gl_compat_version
= MAX2(screen
->max_gl_compat_version
,
1222 gl_version_override
);
1226 screen
->max_gl_es1_version
= 0;
1230 screen
->max_gl_es2_version
= 0;
1235 * This is the driver specific part of the createNewScreen entry point.
1236 * Called when using DRI2.
1238 * \return the struct gl_config supported by this driver
1241 __DRIconfig
**intelInitScreen2(__DRIscreen
*psp
)
1243 struct intel_screen
*intelScreen
;
1245 if (psp
->dri2
.loader
->base
.version
<= 2 ||
1246 psp
->dri2
.loader
->getBuffersWithFormat
== NULL
) {
1248 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1249 "support required\n");
1253 /* Allocate the private area */
1254 intelScreen
= calloc(1, sizeof *intelScreen
);
1256 fprintf(stderr
, "\nERROR! Allocating private area failed\n");
1259 /* parse information in __driConfigOptions */
1260 driParseOptionInfo(&intelScreen
->optionCache
, __driConfigOptions
);
1262 intelScreen
->driScrnPriv
= psp
;
1263 psp
->driverPrivate
= (void *) intelScreen
;
1265 if (!intel_init_bufmgr(intelScreen
))
1268 intelScreen
->deviceID
= drm_intel_bufmgr_gem_get_devid(intelScreen
->bufmgr
);
1270 if (IS_GEN7(intelScreen
->deviceID
)) {
1271 intelScreen
->gen
= 7;
1272 } else if (IS_GEN6(intelScreen
->deviceID
)) {
1273 intelScreen
->gen
= 6;
1274 } else if (IS_GEN5(intelScreen
->deviceID
)) {
1275 intelScreen
->gen
= 5;
1277 intelScreen
->gen
= 4;
1280 intelScreen
->hw_has_separate_stencil
= intelScreen
->gen
>= 6;
1281 intelScreen
->hw_must_use_separate_stencil
= intelScreen
->gen
>= 7;
1284 bool success
= intel_get_param(intelScreen
->driScrnPriv
, I915_PARAM_HAS_LLC
,
1286 if (success
&& has_llc
)
1287 intelScreen
->hw_has_llc
= true;
1288 else if (!success
&& intelScreen
->gen
>= 6)
1289 intelScreen
->hw_has_llc
= true;
1291 intel_override_separate_stencil(intelScreen
);
1293 intelScreen
->hw_has_swizzling
= intel_detect_swizzling(intelScreen
);
1295 set_max_gl_versions(intelScreen
);
1297 psp
->api_mask
= (1 << __DRI_API_OPENGL
);
1298 if (intelScreen
->max_gl_core_version
> 0)
1299 psp
->api_mask
|= (1 << __DRI_API_OPENGL_CORE
);
1300 if (intelScreen
->max_gl_es1_version
> 0)
1301 psp
->api_mask
|= (1 << __DRI_API_GLES
);
1302 if (intelScreen
->max_gl_es2_version
> 0)
1303 psp
->api_mask
|= (1 << __DRI_API_GLES2
);
1304 if (intelScreen
->max_gl_es2_version
>= 30)
1305 psp
->api_mask
|= (1 << __DRI_API_GLES3
);
1307 psp
->extensions
= intelScreenExtensions
;
1309 return (const __DRIconfig
**) intel_screen_make_configs(psp
);
1312 struct intel_buffer
{
1314 struct intel_region
*region
;
1317 static __DRIbuffer
*
1318 intelAllocateBuffer(__DRIscreen
*screen
,
1319 unsigned attachment
, unsigned format
,
1320 int width
, int height
)
1322 struct intel_buffer
*intelBuffer
;
1323 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
1325 assert(attachment
== __DRI_BUFFER_FRONT_LEFT
||
1326 attachment
== __DRI_BUFFER_BACK_LEFT
);
1328 intelBuffer
= calloc(1, sizeof *intelBuffer
);
1329 if (intelBuffer
== NULL
)
1332 /* The front and back buffers are color buffers, which are X tiled. */
1333 intelBuffer
->region
= intel_region_alloc(intelScreen
,
1340 if (intelBuffer
->region
== NULL
) {
1345 intel_region_flink(intelBuffer
->region
, &intelBuffer
->base
.name
);
1347 intelBuffer
->base
.attachment
= attachment
;
1348 intelBuffer
->base
.cpp
= intelBuffer
->region
->cpp
;
1349 intelBuffer
->base
.pitch
= intelBuffer
->region
->pitch
;
1351 return &intelBuffer
->base
;
1355 intelReleaseBuffer(__DRIscreen
*screen
, __DRIbuffer
*buffer
)
1357 struct intel_buffer
*intelBuffer
= (struct intel_buffer
*) buffer
;
1359 intel_region_release(&intelBuffer
->region
);
1364 const struct __DriverAPIRec driDriverAPI
= {
1365 .InitScreen
= intelInitScreen2
,
1366 .DestroyScreen
= intelDestroyScreen
,
1367 .CreateContext
= intelCreateContext
,
1368 .DestroyContext
= intelDestroyContext
,
1369 .CreateBuffer
= intelCreateBuffer
,
1370 .DestroyBuffer
= intelDestroyBuffer
,
1371 .MakeCurrent
= intelMakeCurrent
,
1372 .UnbindContext
= intelUnbindContext
,
1373 .AllocateBuffer
= intelAllocateBuffer
,
1374 .ReleaseBuffer
= intelReleaseBuffer
1377 /* This is the table of extensions that the loader will dlsym() for. */
1378 PUBLIC
const __DRIextension
*__driDriverExtensions
[] = {
1379 &driCoreExtension
.base
,
1380 &driDRI2Extension
.base
,