i965/fs: Add support for translating ir_triop_fma into MAD.
[mesa.git] / src / mesa / drivers / dri / i965 / intel_screen.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <errno.h>
29 #include <time.h>
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/texobj.h"
35 #include "main/hash.h"
36 #include "main/fbobject.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
39
40 #include "utils.h"
41 #include "xmlpool.h"
42
43 PUBLIC const char __driConfigOptions[] =
44 DRI_CONF_BEGIN
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
49 */
50 DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
54 DRI_CONF_DESC_END
55 DRI_CONF_OPT_END
56
57 DRI_CONF_OPT_BEGIN_B(hiz, "true")
58 DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
59 DRI_CONF_OPT_END
60
61 DRI_CONF_SECTION_END
62 DRI_CONF_SECTION_QUALITY
63 DRI_CONF_FORCE_S3TC_ENABLE("false")
64 DRI_CONF_SECTION_END
65 DRI_CONF_SECTION_DEBUG
66 DRI_CONF_NO_RAST("false")
67 DRI_CONF_ALWAYS_FLUSH_BATCH("false")
68 DRI_CONF_ALWAYS_FLUSH_CACHE("false")
69 DRI_CONF_DISABLE_THROTTLING("false")
70 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
71 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
72 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
73
74 DRI_CONF_OPT_BEGIN_B(shader_precompile, "true")
75 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
76 DRI_CONF_OPT_END
77 DRI_CONF_SECTION_END
78 DRI_CONF_END;
79
80 #include "intel_batchbuffer.h"
81 #include "intel_buffers.h"
82 #include "intel_bufmgr.h"
83 #include "intel_chipset.h"
84 #include "intel_fbo.h"
85 #include "intel_mipmap_tree.h"
86 #include "intel_screen.h"
87 #include "intel_tex.h"
88 #include "intel_regions.h"
89
90 #include "brw_context.h"
91
92 #include "i915_drm.h"
93
94 #ifdef USE_NEW_INTERFACE
95 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
96 #endif /*USE_NEW_INTERFACE */
97
98 /**
99 * For debugging purposes, this returns a time in seconds.
100 */
101 double
102 get_time(void)
103 {
104 struct timespec tp;
105
106 clock_gettime(CLOCK_MONOTONIC, &tp);
107
108 return tp.tv_sec + tp.tv_nsec / 1000000000.0;
109 }
110
111 void
112 aub_dump_bmp(struct gl_context *ctx)
113 {
114 struct gl_framebuffer *fb = ctx->DrawBuffer;
115
116 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
117 struct intel_renderbuffer *irb =
118 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
119
120 if (irb && irb->mt) {
121 enum aub_dump_bmp_format format;
122
123 switch (irb->Base.Base.Format) {
124 case MESA_FORMAT_ARGB8888:
125 case MESA_FORMAT_XRGB8888:
126 format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
127 break;
128 default:
129 continue;
130 }
131
132 assert(irb->mt->region->pitch % irb->mt->region->cpp == 0);
133 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
134 irb->draw_x,
135 irb->draw_y,
136 irb->Base.Base.Width,
137 irb->Base.Base.Height,
138 format,
139 irb->mt->region->pitch,
140 0);
141 }
142 }
143 }
144
145 static const __DRItexBufferExtension intelTexBufferExtension = {
146 .base = { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
147
148 .setTexBuffer = intelSetTexBuffer,
149 .setTexBuffer2 = intelSetTexBuffer2,
150 .releaseTexBuffer = NULL,
151 };
152
153 static void
154 intelDRI2Flush(__DRIdrawable *drawable)
155 {
156 GET_CURRENT_CONTEXT(ctx);
157 struct brw_context *brw = brw_context(ctx);
158 if (brw == NULL)
159 return;
160
161 intel_resolve_for_dri2_flush(brw, drawable);
162 brw->need_throttle = true;
163
164 if (brw->batch.used)
165 intel_batchbuffer_flush(brw);
166
167 if (INTEL_DEBUG & DEBUG_AUB) {
168 aub_dump_bmp(ctx);
169 }
170 }
171
172 static const struct __DRI2flushExtensionRec intelFlushExtension = {
173 .base = { __DRI2_FLUSH, 3 },
174
175 .flush = intelDRI2Flush,
176 .invalidate = dri2InvalidateDrawable,
177 };
178
179 static struct intel_image_format intel_image_formats[] = {
180 { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
181 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
182
183 { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
184 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
185
186 { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
187 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
188 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
189 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
190
191 { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
192 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
193 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
194 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
195
196 { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
197 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
198 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
199 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
200
201 { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
202 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
203 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
204 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
205
206 { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
207 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
208 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
209 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
210
211 { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
212 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
213 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
214
215 { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
216 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
217 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
218
219 /* For YUYV buffers, we set up two overlapping DRI images and treat
220 * them as planar buffers in the compositors. Plane 0 is GR88 and
221 * samples YU or YV pairs and places Y into the R component, while
222 * plane 1 is ARGB and samples YUYV clusters and places pairs and
223 * places U into the G component and V into A. This lets the
224 * texture sampler interpolate the Y components correctly when
225 * sampling from plane 0, and interpolate U and V correctly when
226 * sampling from plane 1. */
227 { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
228 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
229 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
230 };
231
232 static struct intel_image_format *
233 intel_image_format_lookup(int fourcc)
234 {
235 struct intel_image_format *f = NULL;
236
237 for (unsigned i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
238 if (intel_image_formats[i].fourcc == fourcc) {
239 f = &intel_image_formats[i];
240 break;
241 }
242 }
243
244 return f;
245 }
246
247 static __DRIimage *
248 intel_allocate_image(int dri_format, void *loaderPrivate)
249 {
250 __DRIimage *image;
251
252 image = calloc(1, sizeof *image);
253 if (image == NULL)
254 return NULL;
255
256 image->dri_format = dri_format;
257 image->offset = 0;
258
259 switch (dri_format) {
260 case __DRI_IMAGE_FORMAT_RGB565:
261 image->format = MESA_FORMAT_RGB565;
262 break;
263 case __DRI_IMAGE_FORMAT_XRGB8888:
264 image->format = MESA_FORMAT_XRGB8888;
265 break;
266 case __DRI_IMAGE_FORMAT_ARGB8888:
267 image->format = MESA_FORMAT_ARGB8888;
268 break;
269 case __DRI_IMAGE_FORMAT_ABGR8888:
270 image->format = MESA_FORMAT_RGBA8888_REV;
271 break;
272 case __DRI_IMAGE_FORMAT_XBGR8888:
273 image->format = MESA_FORMAT_RGBX8888_REV;
274 break;
275 case __DRI_IMAGE_FORMAT_R8:
276 image->format = MESA_FORMAT_R8;
277 break;
278 case __DRI_IMAGE_FORMAT_GR88:
279 image->format = MESA_FORMAT_GR88;
280 break;
281 case __DRI_IMAGE_FORMAT_NONE:
282 image->format = MESA_FORMAT_NONE;
283 break;
284 default:
285 free(image);
286 return NULL;
287 }
288
289 image->internal_format = _mesa_get_format_base_format(image->format);
290 image->data = loaderPrivate;
291
292 return image;
293 }
294
295 /**
296 * Sets up a DRIImage structure to point to our shared image in a region
297 */
298 static void
299 intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image,
300 struct intel_mipmap_tree *mt, GLuint level,
301 GLuint zoffset)
302 {
303 unsigned int draw_x, draw_y;
304 uint32_t mask_x, mask_y;
305
306 intel_miptree_make_shareable(brw, mt);
307
308 intel_miptree_check_level_layer(mt, level, zoffset);
309
310 intel_region_get_tile_masks(mt->region, &mask_x, &mask_y, false);
311 intel_miptree_get_image_offset(mt, level, zoffset, &draw_x, &draw_y);
312
313 image->width = mt->level[level].width;
314 image->height = mt->level[level].height;
315 image->tile_x = draw_x & mask_x;
316 image->tile_y = draw_y & mask_y;
317
318 image->offset = intel_region_get_aligned_offset(mt->region,
319 draw_x & ~mask_x,
320 draw_y & ~mask_y,
321 false);
322
323 intel_region_reference(&image->region, mt->region);
324 }
325
326 static void
327 intel_setup_image_from_dimensions(__DRIimage *image)
328 {
329 image->width = image->region->width;
330 image->height = image->region->height;
331 image->tile_x = 0;
332 image->tile_y = 0;
333 image->has_depthstencil = false;
334 }
335
336 static inline uint32_t
337 intel_dri_format(GLuint format)
338 {
339 switch (format) {
340 case MESA_FORMAT_RGB565:
341 return __DRI_IMAGE_FORMAT_RGB565;
342 case MESA_FORMAT_XRGB8888:
343 return __DRI_IMAGE_FORMAT_XRGB8888;
344 case MESA_FORMAT_ARGB8888:
345 return __DRI_IMAGE_FORMAT_ARGB8888;
346 case MESA_FORMAT_RGBA8888_REV:
347 return __DRI_IMAGE_FORMAT_ABGR8888;
348 case MESA_FORMAT_R8:
349 return __DRI_IMAGE_FORMAT_R8;
350 case MESA_FORMAT_RG88:
351 return __DRI_IMAGE_FORMAT_GR88;
352 }
353
354 return MESA_FORMAT_NONE;
355 }
356
357 static __DRIimage *
358 intel_create_image_from_name(__DRIscreen *screen,
359 int width, int height, int format,
360 int name, int pitch, void *loaderPrivate)
361 {
362 struct intel_screen *intelScreen = screen->driverPrivate;
363 __DRIimage *image;
364 int cpp;
365
366 image = intel_allocate_image(format, loaderPrivate);
367 if (image == NULL)
368 return NULL;
369
370 if (image->format == MESA_FORMAT_NONE)
371 cpp = 1;
372 else
373 cpp = _mesa_get_format_bytes(image->format);
374 image->region = intel_region_alloc_for_handle(intelScreen,
375 cpp, width, height,
376 pitch * cpp, name, "image");
377 if (image->region == NULL) {
378 free(image);
379 return NULL;
380 }
381
382 intel_setup_image_from_dimensions(image);
383
384 return image;
385 }
386
387 static __DRIimage *
388 intel_create_image_from_renderbuffer(__DRIcontext *context,
389 int renderbuffer, void *loaderPrivate)
390 {
391 __DRIimage *image;
392 struct brw_context *brw = context->driverPrivate;
393 struct gl_context *ctx = &brw->ctx;
394 struct gl_renderbuffer *rb;
395 struct intel_renderbuffer *irb;
396
397 rb = _mesa_lookup_renderbuffer(ctx, renderbuffer);
398 if (!rb) {
399 _mesa_error(ctx, GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
400 return NULL;
401 }
402
403 irb = intel_renderbuffer(rb);
404 intel_miptree_make_shareable(brw, irb->mt);
405 image = calloc(1, sizeof *image);
406 if (image == NULL)
407 return NULL;
408
409 image->internal_format = rb->InternalFormat;
410 image->format = rb->Format;
411 image->offset = 0;
412 image->data = loaderPrivate;
413 intel_region_reference(&image->region, irb->mt->region);
414 intel_setup_image_from_dimensions(image);
415 image->dri_format = intel_dri_format(image->format);
416 image->has_depthstencil = irb->mt->stencil_mt? true : false;
417
418 rb->NeedsFinishRenderTexture = true;
419 return image;
420 }
421
422 static __DRIimage *
423 intel_create_image_from_texture(__DRIcontext *context, int target,
424 unsigned texture, int zoffset,
425 int level,
426 unsigned *error,
427 void *loaderPrivate)
428 {
429 __DRIimage *image;
430 struct brw_context *brw = context->driverPrivate;
431 struct gl_texture_object *obj;
432 struct intel_texture_object *iobj;
433 GLuint face = 0;
434
435 obj = _mesa_lookup_texture(&brw->ctx, texture);
436 if (!obj || obj->Target != target) {
437 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
438 return NULL;
439 }
440
441 if (target == GL_TEXTURE_CUBE_MAP)
442 face = zoffset;
443
444 _mesa_test_texobj_completeness(&brw->ctx, obj);
445 iobj = intel_texture_object(obj);
446 if (!obj->_BaseComplete || (level > 0 && !obj->_MipmapComplete)) {
447 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
448 return NULL;
449 }
450
451 if (level < obj->BaseLevel || level > obj->_MaxLevel) {
452 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
453 return NULL;
454 }
455
456 if (target == GL_TEXTURE_3D && obj->Image[face][level]->Depth < zoffset) {
457 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
458 return NULL;
459 }
460 image = calloc(1, sizeof *image);
461 if (image == NULL) {
462 *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
463 return NULL;
464 }
465
466 image->internal_format = obj->Image[face][level]->InternalFormat;
467 image->format = obj->Image[face][level]->TexFormat;
468 image->data = loaderPrivate;
469 intel_setup_image_from_mipmap_tree(brw, image, iobj->mt, level, zoffset);
470 image->dri_format = intel_dri_format(image->format);
471 image->has_depthstencil = iobj->mt->stencil_mt? true : false;
472 if (image->dri_format == MESA_FORMAT_NONE) {
473 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
474 free(image);
475 return NULL;
476 }
477
478 *error = __DRI_IMAGE_ERROR_SUCCESS;
479 return image;
480 }
481
482 static void
483 intel_destroy_image(__DRIimage *image)
484 {
485 intel_region_release(&image->region);
486 free(image);
487 }
488
489 static __DRIimage *
490 intel_create_image(__DRIscreen *screen,
491 int width, int height, int format,
492 unsigned int use,
493 void *loaderPrivate)
494 {
495 __DRIimage *image;
496 struct intel_screen *intelScreen = screen->driverPrivate;
497 uint32_t tiling;
498 int cpp;
499
500 tiling = I915_TILING_X;
501 if (use & __DRI_IMAGE_USE_CURSOR) {
502 if (width != 64 || height != 64)
503 return NULL;
504 tiling = I915_TILING_NONE;
505 }
506
507 image = intel_allocate_image(format, loaderPrivate);
508 if (image == NULL)
509 return NULL;
510
511 cpp = _mesa_get_format_bytes(image->format);
512 image->region =
513 intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
514 if (image->region == NULL) {
515 free(image);
516 return NULL;
517 }
518
519 intel_setup_image_from_dimensions(image);
520
521 return image;
522 }
523
524 static GLboolean
525 intel_query_image(__DRIimage *image, int attrib, int *value)
526 {
527 switch (attrib) {
528 case __DRI_IMAGE_ATTRIB_STRIDE:
529 *value = image->region->pitch;
530 return true;
531 case __DRI_IMAGE_ATTRIB_HANDLE:
532 *value = image->region->bo->handle;
533 return true;
534 case __DRI_IMAGE_ATTRIB_NAME:
535 return intel_region_flink(image->region, (uint32_t *) value);
536 case __DRI_IMAGE_ATTRIB_FORMAT:
537 *value = image->dri_format;
538 return true;
539 case __DRI_IMAGE_ATTRIB_WIDTH:
540 *value = image->region->width;
541 return true;
542 case __DRI_IMAGE_ATTRIB_HEIGHT:
543 *value = image->region->height;
544 return true;
545 case __DRI_IMAGE_ATTRIB_COMPONENTS:
546 if (image->planar_format == NULL)
547 return false;
548 *value = image->planar_format->components;
549 return true;
550 case __DRI_IMAGE_ATTRIB_FD:
551 if (drm_intel_bo_gem_export_to_prime(image->region->bo, value) == 0)
552 return true;
553 return false;
554 default:
555 return false;
556 }
557 }
558
559 static __DRIimage *
560 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
561 {
562 __DRIimage *image;
563
564 image = calloc(1, sizeof *image);
565 if (image == NULL)
566 return NULL;
567
568 intel_region_reference(&image->region, orig_image->region);
569 if (image->region == NULL) {
570 free(image);
571 return NULL;
572 }
573
574 image->internal_format = orig_image->internal_format;
575 image->planar_format = orig_image->planar_format;
576 image->dri_format = orig_image->dri_format;
577 image->format = orig_image->format;
578 image->offset = orig_image->offset;
579 image->width = orig_image->width;
580 image->height = orig_image->height;
581 image->tile_x = orig_image->tile_x;
582 image->tile_y = orig_image->tile_y;
583 image->has_depthstencil = orig_image->has_depthstencil;
584 image->data = loaderPrivate;
585
586 memcpy(image->strides, orig_image->strides, sizeof(image->strides));
587 memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
588
589 return image;
590 }
591
592 static GLboolean
593 intel_validate_usage(__DRIimage *image, unsigned int use)
594 {
595 if (use & __DRI_IMAGE_USE_CURSOR) {
596 if (image->region->width != 64 || image->region->height != 64)
597 return GL_FALSE;
598 }
599
600 return GL_TRUE;
601 }
602
603 static __DRIimage *
604 intel_create_image_from_names(__DRIscreen *screen,
605 int width, int height, int fourcc,
606 int *names, int num_names,
607 int *strides, int *offsets,
608 void *loaderPrivate)
609 {
610 struct intel_image_format *f = NULL;
611 __DRIimage *image;
612 int i, index;
613
614 if (screen == NULL || names == NULL || num_names != 1)
615 return NULL;
616
617 f = intel_image_format_lookup(fourcc);
618 if (f == NULL)
619 return NULL;
620
621 image = intel_create_image_from_name(screen, width, height,
622 __DRI_IMAGE_FORMAT_NONE,
623 names[0], strides[0],
624 loaderPrivate);
625
626 if (image == NULL)
627 return NULL;
628
629 image->planar_format = f;
630 for (i = 0; i < f->nplanes; i++) {
631 index = f->planes[i].buffer_index;
632 image->offsets[index] = offsets[index];
633 image->strides[index] = strides[index];
634 }
635
636 return image;
637 }
638
639 static __DRIimage *
640 intel_create_image_from_fds(__DRIscreen *screen,
641 int width, int height, int fourcc,
642 int *fds, int num_fds, int *strides, int *offsets,
643 void *loaderPrivate)
644 {
645 struct intel_screen *intelScreen = screen->driverPrivate;
646 struct intel_image_format *f;
647 __DRIimage *image;
648 int i, index;
649
650 if (fds == NULL || num_fds != 1)
651 return NULL;
652
653 f = intel_image_format_lookup(fourcc);
654 if (f == NULL)
655 return NULL;
656
657 if (f->nplanes == 1)
658 image = intel_allocate_image(f->planes[0].dri_format, loaderPrivate);
659 else
660 image = intel_allocate_image(__DRI_IMAGE_FORMAT_NONE, loaderPrivate);
661
662 if (image == NULL)
663 return NULL;
664
665 image->region = intel_region_alloc_for_fd(intelScreen,
666 1, width, height,
667 strides[0], fds[0], "image");
668 if (image->region == NULL) {
669 free(image);
670 return NULL;
671 }
672
673 image->planar_format = f;
674 for (i = 0; i < f->nplanes; i++) {
675 index = f->planes[i].buffer_index;
676 image->offsets[index] = offsets[index];
677 image->strides[index] = strides[index];
678 }
679
680 intel_setup_image_from_dimensions(image);
681
682 return image;
683 }
684
685 static __DRIimage *
686 intel_create_image_from_dma_bufs(__DRIscreen *screen,
687 int width, int height, int fourcc,
688 int *fds, int num_fds,
689 int *strides, int *offsets,
690 enum __DRIYUVColorSpace yuv_color_space,
691 enum __DRISampleRange sample_range,
692 enum __DRIChromaSiting horizontal_siting,
693 enum __DRIChromaSiting vertical_siting,
694 unsigned *error,
695 void *loaderPrivate)
696 {
697 __DRIimage *image;
698 struct intel_image_format *f = intel_image_format_lookup(fourcc);
699
700 /* For now only packed formats that have native sampling are supported. */
701 if (!f || f->nplanes != 1) {
702 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
703 return NULL;
704 }
705
706 image = intel_create_image_from_fds(screen, width, height, fourcc, fds,
707 num_fds, strides, offsets,
708 loaderPrivate);
709
710 /*
711 * Invalid parameters and any inconsistencies between are assumed to be
712 * checked by the caller. Therefore besides unsupported formats one can fail
713 * only in allocation.
714 */
715 if (!image) {
716 *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
717 return NULL;
718 }
719
720 image->dma_buf_imported = true;
721 image->yuv_color_space = yuv_color_space;
722 image->sample_range = sample_range;
723 image->horizontal_siting = horizontal_siting;
724 image->vertical_siting = vertical_siting;
725
726 *error = __DRI_IMAGE_ERROR_SUCCESS;
727 return image;
728 }
729
730 static __DRIimage *
731 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
732 {
733 int width, height, offset, stride, dri_format, index;
734 struct intel_image_format *f;
735 uint32_t mask_x, mask_y;
736 __DRIimage *image;
737
738 if (parent == NULL || parent->planar_format == NULL)
739 return NULL;
740
741 f = parent->planar_format;
742
743 if (plane >= f->nplanes)
744 return NULL;
745
746 width = parent->region->width >> f->planes[plane].width_shift;
747 height = parent->region->height >> f->planes[plane].height_shift;
748 dri_format = f->planes[plane].dri_format;
749 index = f->planes[plane].buffer_index;
750 offset = parent->offsets[index];
751 stride = parent->strides[index];
752
753 image = intel_allocate_image(dri_format, loaderPrivate);
754 if (image == NULL)
755 return NULL;
756
757 if (offset + height * stride > parent->region->bo->size) {
758 _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
759 free(image);
760 return NULL;
761 }
762
763 image->region = calloc(sizeof(*image->region), 1);
764 if (image->region == NULL) {
765 free(image);
766 return NULL;
767 }
768
769 image->region->cpp = _mesa_get_format_bytes(image->format);
770 image->region->width = width;
771 image->region->height = height;
772 image->region->pitch = stride;
773 image->region->refcount = 1;
774 image->region->bo = parent->region->bo;
775 drm_intel_bo_reference(image->region->bo);
776 image->region->tiling = parent->region->tiling;
777 image->offset = offset;
778 intel_setup_image_from_dimensions(image);
779
780 intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
781 if (offset & mask_x)
782 _mesa_warning(NULL,
783 "intel_create_sub_image: offset not on tile boundary");
784
785 return image;
786 }
787
788 static struct __DRIimageExtensionRec intelImageExtension = {
789 .base = { __DRI_IMAGE, 8 },
790
791 .createImageFromName = intel_create_image_from_name,
792 .createImageFromRenderbuffer = intel_create_image_from_renderbuffer,
793 .destroyImage = intel_destroy_image,
794 .createImage = intel_create_image,
795 .queryImage = intel_query_image,
796 .dupImage = intel_dup_image,
797 .validateUsage = intel_validate_usage,
798 .createImageFromNames = intel_create_image_from_names,
799 .fromPlanar = intel_from_planar,
800 .createImageFromTexture = intel_create_image_from_texture,
801 .createImageFromFds = intel_create_image_from_fds,
802 .createImageFromDmaBufs = intel_create_image_from_dma_bufs
803 };
804
805 static const __DRIextension *intelScreenExtensions[] = {
806 &intelTexBufferExtension.base,
807 &intelFlushExtension.base,
808 &intelImageExtension.base,
809 &dri2ConfigQueryExtension.base,
810 NULL
811 };
812
813 static bool
814 intel_get_param(__DRIscreen *psp, int param, int *value)
815 {
816 int ret;
817 struct drm_i915_getparam gp;
818
819 memset(&gp, 0, sizeof(gp));
820 gp.param = param;
821 gp.value = value;
822
823 ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
824 if (ret) {
825 if (ret != -EINVAL)
826 _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
827 return false;
828 }
829
830 return true;
831 }
832
833 static bool
834 intel_get_boolean(__DRIscreen *psp, int param)
835 {
836 int value = 0;
837 return intel_get_param(psp, param, &value) && value;
838 }
839
840 static void
841 intelDestroyScreen(__DRIscreen * sPriv)
842 {
843 struct intel_screen *intelScreen = sPriv->driverPrivate;
844
845 dri_bufmgr_destroy(intelScreen->bufmgr);
846 driDestroyOptionInfo(&intelScreen->optionCache);
847
848 free(intelScreen);
849 sPriv->driverPrivate = NULL;
850 }
851
852
853 /**
854 * This is called when we need to set up GL rendering to a new X window.
855 */
856 static GLboolean
857 intelCreateBuffer(__DRIscreen * driScrnPriv,
858 __DRIdrawable * driDrawPriv,
859 const struct gl_config * mesaVis, GLboolean isPixmap)
860 {
861 struct intel_renderbuffer *rb;
862 struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
863 gl_format rgbFormat;
864 unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
865 struct gl_framebuffer *fb;
866
867 if (isPixmap)
868 return false;
869
870 fb = CALLOC_STRUCT(gl_framebuffer);
871 if (!fb)
872 return false;
873
874 _mesa_initialize_window_framebuffer(fb, mesaVis);
875
876 if (mesaVis->redBits == 5)
877 rgbFormat = MESA_FORMAT_RGB565;
878 else if (mesaVis->sRGBCapable)
879 rgbFormat = MESA_FORMAT_SARGB8;
880 else if (mesaVis->alphaBits == 0)
881 rgbFormat = MESA_FORMAT_XRGB8888;
882 else {
883 rgbFormat = MESA_FORMAT_SARGB8;
884 fb->Visual.sRGBCapable = true;
885 }
886
887 /* setup the hardware-based renderbuffers */
888 rb = intel_create_renderbuffer(rgbFormat, num_samples);
889 _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
890
891 if (mesaVis->doubleBufferMode) {
892 rb = intel_create_renderbuffer(rgbFormat, num_samples);
893 _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
894 }
895
896 /*
897 * Assert here that the gl_config has an expected depth/stencil bit
898 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
899 * which constructs the advertised configs.)
900 */
901 if (mesaVis->depthBits == 24) {
902 assert(mesaVis->stencilBits == 8);
903
904 if (screen->hw_has_separate_stencil) {
905 rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
906 num_samples);
907 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
908 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
909 num_samples);
910 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
911 } else {
912 /*
913 * Use combined depth/stencil. Note that the renderbuffer is
914 * attached to two attachment points.
915 */
916 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
917 num_samples);
918 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
919 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
920 }
921 }
922 else if (mesaVis->depthBits == 16) {
923 assert(mesaVis->stencilBits == 0);
924 rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
925 num_samples);
926 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
927 }
928 else {
929 assert(mesaVis->depthBits == 0);
930 assert(mesaVis->stencilBits == 0);
931 }
932
933 /* now add any/all software-based renderbuffers we may need */
934 _swrast_add_soft_renderbuffers(fb,
935 false, /* never sw color */
936 false, /* never sw depth */
937 false, /* never sw stencil */
938 mesaVis->accumRedBits > 0,
939 false, /* never sw alpha */
940 false /* never sw aux */ );
941 driDrawPriv->driverPrivate = fb;
942
943 return true;
944 }
945
946 static void
947 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
948 {
949 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
950
951 _mesa_reference_framebuffer(&fb, NULL);
952 }
953
954 static GLboolean
955 intelCreateContext(gl_api api,
956 const struct gl_config * mesaVis,
957 __DRIcontext * driContextPriv,
958 unsigned major_version,
959 unsigned minor_version,
960 uint32_t flags,
961 unsigned *error,
962 void *sharedContextPrivate)
963 {
964 bool success = false;
965
966 success = brwCreateContext(api, mesaVis,
967 driContextPriv,
968 major_version, minor_version, flags,
969 error, sharedContextPrivate);
970
971 if (success)
972 return true;
973
974 if (driContextPriv->driverPrivate != NULL)
975 intelDestroyContext(driContextPriv);
976
977 return false;
978 }
979
980 static bool
981 intel_init_bufmgr(struct intel_screen *intelScreen)
982 {
983 __DRIscreen *spriv = intelScreen->driScrnPriv;
984
985 intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
986
987 intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
988 if (intelScreen->bufmgr == NULL) {
989 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
990 __func__, __LINE__);
991 return false;
992 }
993
994 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
995
996 if (!intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA)) {
997 fprintf(stderr, "[%s: %u] Kernel 2.6.39 required.\n", __func__, __LINE__);
998 return false;
999 }
1000
1001 return true;
1002 }
1003
1004 /**
1005 * Override intel_screen.hw_has_separate_stencil with environment variable
1006 * INTEL_SEPARATE_STENCIL.
1007 *
1008 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
1009 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
1010 * is ignored.
1011 */
1012 static void
1013 intel_override_separate_stencil(struct intel_screen *screen)
1014 {
1015 const char *s = getenv("INTEL_SEPARATE_STENCIL");
1016 if (!s) {
1017 return;
1018 } else if (!strncmp("0", s, 2)) {
1019 screen->hw_has_separate_stencil = false;
1020 } else if (!strncmp("1", s, 2)) {
1021 screen->hw_has_separate_stencil = true;
1022 } else {
1023 fprintf(stderr,
1024 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
1025 "invalid value and is ignored", s);
1026 }
1027 }
1028
1029 static bool
1030 intel_detect_swizzling(struct intel_screen *screen)
1031 {
1032 drm_intel_bo *buffer;
1033 unsigned long flags = 0;
1034 unsigned long aligned_pitch;
1035 uint32_t tiling = I915_TILING_X;
1036 uint32_t swizzle_mode = 0;
1037
1038 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
1039 64, 64, 4,
1040 &tiling, &aligned_pitch, flags);
1041 if (buffer == NULL)
1042 return false;
1043
1044 drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
1045 drm_intel_bo_unreference(buffer);
1046
1047 if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
1048 return false;
1049 else
1050 return true;
1051 }
1052
1053 static __DRIconfig**
1054 intel_screen_make_configs(__DRIscreen *dri_screen)
1055 {
1056 static const gl_format formats[] = {
1057 MESA_FORMAT_RGB565,
1058 MESA_FORMAT_ARGB8888
1059 };
1060
1061 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1062 static const GLenum back_buffer_modes[] = {
1063 GLX_SWAP_UNDEFINED_OML, GLX_NONE,
1064 };
1065
1066 static const uint8_t singlesample_samples[1] = {0};
1067 static const uint8_t multisample_samples[2] = {4, 8};
1068
1069 struct intel_screen *screen = dri_screen->driverPrivate;
1070 uint8_t depth_bits[4], stencil_bits[4];
1071 __DRIconfig **configs = NULL;
1072
1073 /* Generate singlesample configs without accumulation buffer. */
1074 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1075 __DRIconfig **new_configs;
1076 int num_depth_stencil_bits = 2;
1077
1078 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1079 * buffer that has a different number of bits per pixel than the color
1080 * buffer, gen >= 6 supports this.
1081 */
1082 depth_bits[0] = 0;
1083 stencil_bits[0] = 0;
1084
1085 if (formats[i] == MESA_FORMAT_RGB565) {
1086 depth_bits[1] = 16;
1087 stencil_bits[1] = 0;
1088 if (screen->gen >= 6) {
1089 depth_bits[2] = 24;
1090 stencil_bits[2] = 8;
1091 num_depth_stencil_bits = 3;
1092 }
1093 } else {
1094 depth_bits[1] = 24;
1095 stencil_bits[1] = 8;
1096 }
1097
1098 new_configs = driCreateConfigs(formats[i],
1099 depth_bits,
1100 stencil_bits,
1101 num_depth_stencil_bits,
1102 back_buffer_modes, 2,
1103 singlesample_samples, 1,
1104 false);
1105 configs = driConcatConfigs(configs, new_configs);
1106 }
1107
1108 /* Generate the minimum possible set of configs that include an
1109 * accumulation buffer.
1110 */
1111 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1112 __DRIconfig **new_configs;
1113
1114 if (formats[i] == MESA_FORMAT_RGB565) {
1115 depth_bits[0] = 16;
1116 stencil_bits[0] = 0;
1117 } else {
1118 depth_bits[0] = 24;
1119 stencil_bits[0] = 8;
1120 }
1121
1122 new_configs = driCreateConfigs(formats[i],
1123 depth_bits, stencil_bits, 1,
1124 back_buffer_modes, 1,
1125 singlesample_samples, 1,
1126 true);
1127 configs = driConcatConfigs(configs, new_configs);
1128 }
1129
1130 /* Generate multisample configs.
1131 *
1132 * This loop breaks early, and hence is a no-op, on gen < 6.
1133 *
1134 * Multisample configs must follow the singlesample configs in order to
1135 * work around an X server bug present in 1.12. The X server chooses to
1136 * associate the first listed RGBA888-Z24S8 config, regardless of its
1137 * sample count, with the 32-bit depth visual used for compositing.
1138 *
1139 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1140 * supported. Singlebuffer configs are not supported because no one wants
1141 * them.
1142 */
1143 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1144 if (screen->gen < 6)
1145 break;
1146
1147 __DRIconfig **new_configs;
1148 const int num_depth_stencil_bits = 2;
1149 int num_msaa_modes = 0;
1150
1151 depth_bits[0] = 0;
1152 stencil_bits[0] = 0;
1153
1154 if (formats[i] == MESA_FORMAT_RGB565) {
1155 depth_bits[1] = 16;
1156 stencil_bits[1] = 0;
1157 } else {
1158 depth_bits[1] = 24;
1159 stencil_bits[1] = 8;
1160 }
1161
1162 if (screen->gen >= 7)
1163 num_msaa_modes = 2;
1164 else if (screen->gen == 6)
1165 num_msaa_modes = 1;
1166
1167 new_configs = driCreateConfigs(formats[i],
1168 depth_bits,
1169 stencil_bits,
1170 num_depth_stencil_bits,
1171 back_buffer_modes, 1,
1172 multisample_samples,
1173 num_msaa_modes,
1174 false);
1175 configs = driConcatConfigs(configs, new_configs);
1176 }
1177
1178 if (configs == NULL) {
1179 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1180 __LINE__);
1181 return NULL;
1182 }
1183
1184 return configs;
1185 }
1186
1187 static void
1188 set_max_gl_versions(struct intel_screen *screen)
1189 {
1190 int gl_version_override = _mesa_get_gl_version_override();
1191
1192 switch (screen->gen) {
1193 case 7:
1194 screen->max_gl_core_version = 31;
1195 screen->max_gl_compat_version = 30;
1196 screen->max_gl_es1_version = 11;
1197 screen->max_gl_es2_version = 30;
1198 break;
1199 case 6:
1200 screen->max_gl_core_version = 31;
1201 screen->max_gl_compat_version = 30;
1202 screen->max_gl_es1_version = 11;
1203 screen->max_gl_es2_version = 30;
1204 break;
1205 case 5:
1206 case 4:
1207 screen->max_gl_core_version = 0;
1208 screen->max_gl_compat_version = 21;
1209 screen->max_gl_es1_version = 11;
1210 screen->max_gl_es2_version = 20;
1211 break;
1212 default:
1213 assert(!"unrecognized intel_screen::gen");
1214 break;
1215 }
1216
1217 if (gl_version_override >= 31) {
1218 screen->max_gl_core_version = MAX2(screen->max_gl_core_version,
1219 gl_version_override);
1220 } else {
1221 screen->max_gl_compat_version = MAX2(screen->max_gl_compat_version,
1222 gl_version_override);
1223 }
1224
1225 #ifndef FEATURE_ES1
1226 screen->max_gl_es1_version = 0;
1227 #endif
1228
1229 #ifndef FEATURE_ES2
1230 screen->max_gl_es2_version = 0;
1231 #endif
1232 }
1233
1234 /**
1235 * This is the driver specific part of the createNewScreen entry point.
1236 * Called when using DRI2.
1237 *
1238 * \return the struct gl_config supported by this driver
1239 */
1240 static const
1241 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1242 {
1243 struct intel_screen *intelScreen;
1244
1245 if (psp->dri2.loader->base.version <= 2 ||
1246 psp->dri2.loader->getBuffersWithFormat == NULL) {
1247 fprintf(stderr,
1248 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1249 "support required\n");
1250 return false;
1251 }
1252
1253 /* Allocate the private area */
1254 intelScreen = calloc(1, sizeof *intelScreen);
1255 if (!intelScreen) {
1256 fprintf(stderr, "\nERROR! Allocating private area failed\n");
1257 return false;
1258 }
1259 /* parse information in __driConfigOptions */
1260 driParseOptionInfo(&intelScreen->optionCache, __driConfigOptions);
1261
1262 intelScreen->driScrnPriv = psp;
1263 psp->driverPrivate = (void *) intelScreen;
1264
1265 if (!intel_init_bufmgr(intelScreen))
1266 return false;
1267
1268 intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1269
1270 if (IS_GEN7(intelScreen->deviceID)) {
1271 intelScreen->gen = 7;
1272 } else if (IS_GEN6(intelScreen->deviceID)) {
1273 intelScreen->gen = 6;
1274 } else if (IS_GEN5(intelScreen->deviceID)) {
1275 intelScreen->gen = 5;
1276 } else {
1277 intelScreen->gen = 4;
1278 }
1279
1280 intelScreen->hw_has_separate_stencil = intelScreen->gen >= 6;
1281 intelScreen->hw_must_use_separate_stencil = intelScreen->gen >= 7;
1282
1283 int has_llc = 0;
1284 bool success = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_HAS_LLC,
1285 &has_llc);
1286 if (success && has_llc)
1287 intelScreen->hw_has_llc = true;
1288 else if (!success && intelScreen->gen >= 6)
1289 intelScreen->hw_has_llc = true;
1290
1291 intel_override_separate_stencil(intelScreen);
1292
1293 intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1294
1295 set_max_gl_versions(intelScreen);
1296
1297 psp->api_mask = (1 << __DRI_API_OPENGL);
1298 if (intelScreen->max_gl_core_version > 0)
1299 psp->api_mask |= (1 << __DRI_API_OPENGL_CORE);
1300 if (intelScreen->max_gl_es1_version > 0)
1301 psp->api_mask |= (1 << __DRI_API_GLES);
1302 if (intelScreen->max_gl_es2_version > 0)
1303 psp->api_mask |= (1 << __DRI_API_GLES2);
1304 if (intelScreen->max_gl_es2_version >= 30)
1305 psp->api_mask |= (1 << __DRI_API_GLES3);
1306
1307 psp->extensions = intelScreenExtensions;
1308
1309 return (const __DRIconfig**) intel_screen_make_configs(psp);
1310 }
1311
1312 struct intel_buffer {
1313 __DRIbuffer base;
1314 struct intel_region *region;
1315 };
1316
1317 static __DRIbuffer *
1318 intelAllocateBuffer(__DRIscreen *screen,
1319 unsigned attachment, unsigned format,
1320 int width, int height)
1321 {
1322 struct intel_buffer *intelBuffer;
1323 struct intel_screen *intelScreen = screen->driverPrivate;
1324
1325 assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1326 attachment == __DRI_BUFFER_BACK_LEFT);
1327
1328 intelBuffer = calloc(1, sizeof *intelBuffer);
1329 if (intelBuffer == NULL)
1330 return NULL;
1331
1332 /* The front and back buffers are color buffers, which are X tiled. */
1333 intelBuffer->region = intel_region_alloc(intelScreen,
1334 I915_TILING_X,
1335 format / 8,
1336 width,
1337 height,
1338 true);
1339
1340 if (intelBuffer->region == NULL) {
1341 free(intelBuffer);
1342 return NULL;
1343 }
1344
1345 intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1346
1347 intelBuffer->base.attachment = attachment;
1348 intelBuffer->base.cpp = intelBuffer->region->cpp;
1349 intelBuffer->base.pitch = intelBuffer->region->pitch;
1350
1351 return &intelBuffer->base;
1352 }
1353
1354 static void
1355 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1356 {
1357 struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1358
1359 intel_region_release(&intelBuffer->region);
1360 free(intelBuffer);
1361 }
1362
1363
1364 const struct __DriverAPIRec driDriverAPI = {
1365 .InitScreen = intelInitScreen2,
1366 .DestroyScreen = intelDestroyScreen,
1367 .CreateContext = intelCreateContext,
1368 .DestroyContext = intelDestroyContext,
1369 .CreateBuffer = intelCreateBuffer,
1370 .DestroyBuffer = intelDestroyBuffer,
1371 .MakeCurrent = intelMakeCurrent,
1372 .UnbindContext = intelUnbindContext,
1373 .AllocateBuffer = intelAllocateBuffer,
1374 .ReleaseBuffer = intelReleaseBuffer
1375 };
1376
1377 /* This is the table of extensions that the loader will dlsym() for. */
1378 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1379 &driCoreExtension.base,
1380 &driDRI2Extension.base,
1381 NULL
1382 };