src/mesa/drivers/dri/i965/intel_screen.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 VMware, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include <errno.h>
  29 #include <time.h>
  30 #include <unistd.h>
  31 #include "main/glheader.h"
  32 #include "main/context.h"
  33 #include "main/framebuffer.h"
  34 #include "main/renderbuffer.h"
  35 #include "main/texobj.h"
  36 #include "main/hash.h"
  37 #include "main/fbobject.h"
  38 #include "main/version.h"
  39 #include "swrast/s_renderbuffer.h"
  40
  41 #include "utils.h"
  42 #include "xmlpool.h"
  43
  44 static const __DRIconfigOptionsExtension brw_config_options = {
  45    .base = { __DRI_CONFIG_OPTIONS, 1 },
  46    .xml =
  47 DRI_CONF_BEGIN
  48    DRI_CONF_SECTION_PERFORMANCE
  49       DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
  50       /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
  51        * DRI_CONF_BO_REUSE_ALL
  52        */
  53       DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
  54          DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
  55             DRI_CONF_ENUM(0, "Disable buffer object reuse")
  56             DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
  57          DRI_CONF_DESC_END
  58       DRI_CONF_OPT_END
  59
  60       DRI_CONF_OPT_BEGIN_B(hiz, "true")
  61          DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
  62       DRI_CONF_OPT_END
  63
  64       DRI_CONF_OPT_BEGIN_B(disable_derivative_optimization, "false")
  65          DRI_CONF_DESC(en, "Derivatives with finer granularity by default")
  66       DRI_CONF_OPT_END
  67    DRI_CONF_SECTION_END
  68
  69    DRI_CONF_SECTION_QUALITY
  70       DRI_CONF_FORCE_S3TC_ENABLE("false")
  71
  72       DRI_CONF_OPT_BEGIN(clamp_max_samples, int, -1)
  73               DRI_CONF_DESC(en, "Clamp the value of GL_MAX_SAMPLES to the "
  74                             "given integer. If negative, then do not clamp.")
  75       DRI_CONF_OPT_END
  76    DRI_CONF_SECTION_END
  77
  78    DRI_CONF_SECTION_DEBUG
  79       DRI_CONF_NO_RAST("false")
  80       DRI_CONF_ALWAYS_FLUSH_BATCH("false")
  81       DRI_CONF_ALWAYS_FLUSH_CACHE("false")
  82       DRI_CONF_DISABLE_THROTTLING("false")
  83       DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
  84       DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
  85       DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
  86
  87       DRI_CONF_OPT_BEGIN_B(shader_precompile, "true")
  88          DRI_CONF_DESC(en, "Perform code generation at shader link time.")
  89       DRI_CONF_OPT_END
  90    DRI_CONF_SECTION_END
  91 DRI_CONF_END
  92 };
  93
  94 #include "intel_batchbuffer.h"
  95 #include "intel_buffers.h"
  96 #include "intel_bufmgr.h"
  97 #include "intel_chipset.h"
  98 #include "intel_fbo.h"
  99 #include "intel_mipmap_tree.h"
 100 #include "intel_screen.h"
 101 #include "intel_tex.h"
 102 #include "intel_regions.h"
 103
 104 #include "brw_context.h"
 105
 106 #include "i915_drm.h"
 107
 108 #ifdef USE_NEW_INTERFACE
 109 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
 110 #endif /*USE_NEW_INTERFACE */
 111
 112 /**
 113  * For debugging purposes, this returns a time in seconds.
 114  */
 115 double
 116 get_time(void)
 117 {
 118    struct timespec tp;
 119
 120    clock_gettime(CLOCK_MONOTONIC, &tp);
 121
 122    return tp.tv_sec + tp.tv_nsec / 1000000000.0;
 123 }
 124
 125 void
 126 aub_dump_bmp(struct gl_context *ctx)
 127 {
 128    struct gl_framebuffer *fb = ctx->DrawBuffer;
 129
 130    for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
 131       struct intel_renderbuffer *irb =
 132          intel_renderbuffer(fb->_ColorDrawBuffers[i]);
 133
 134       if (irb && irb->mt) {
 135          enum aub_dump_bmp_format format;
 136
 137          switch (irb->Base.Base.Format) {
 138          case MESA_FORMAT_B8G8R8A8_UNORM:
 139          case MESA_FORMAT_B8G8R8X8_UNORM:
 140             format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
 141             break;
 142          default:
 143             continue;
 144          }
 145
 146          assert(irb->mt->region->pitch % irb->mt->region->cpp == 0);
 147          drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
 148                                        irb->draw_x,
 149                                        irb->draw_y,
 150                                        irb->Base.Base.Width,
 151                                        irb->Base.Base.Height,
 152                                        format,
 153                                        irb->mt->region->pitch,
 154                                        0);
 155       }
 156    }
 157 }
 158
 159 static const __DRItexBufferExtension intelTexBufferExtension = {
 160    .base = { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
 161
 162    .setTexBuffer        = intelSetTexBuffer,
 163    .setTexBuffer2       = intelSetTexBuffer2,
 164    .releaseTexBuffer    = NULL,
 165 };
 166
 167 static void
 168 intel_dri2_flush_with_flags(__DRIcontext *cPriv,
 169                             __DRIdrawable *dPriv,
 170                             unsigned flags,
 171                             enum __DRI2throttleReason reason)
 172 {
 173    struct brw_context *brw = cPriv->driverPrivate;
 174
 175    if (!brw)
 176       return;
 177
 178    struct gl_context *ctx = &brw->ctx;
 179
 180    FLUSH_VERTICES(ctx, 0);
 181
 182    if (flags & __DRI2_FLUSH_DRAWABLE)
 183       intel_resolve_for_dri2_flush(brw, dPriv);
 184
 185    if (reason == __DRI2_THROTTLE_SWAPBUFFER ||
 186        reason == __DRI2_THROTTLE_FLUSHFRONT) {
 187       brw->need_throttle = true;
 188    }
 189
 190    intel_batchbuffer_flush(brw);
 191
 192    if (INTEL_DEBUG & DEBUG_AUB) {
 193       aub_dump_bmp(ctx);
 194    }
 195 }
 196
 197 /**
 198  * Provides compatibility with loaders that only support the older (version
 199  * 1-3) flush interface.
 200  *
 201  * That includes libGL up to Mesa 9.0, and the X Server at least up to 1.13.
 202  */
 203 static void
 204 intel_dri2_flush(__DRIdrawable *drawable)
 205 {
 206    intel_dri2_flush_with_flags(drawable->driContextPriv, drawable,
 207                                __DRI2_FLUSH_DRAWABLE,
 208                                __DRI2_THROTTLE_SWAPBUFFER);
 209 }
 210
 211 static const struct __DRI2flushExtensionRec intelFlushExtension = {
 212     .base = { __DRI2_FLUSH, 4 },
 213
 214     .flush              = intel_dri2_flush,
 215     .invalidate         = dri2InvalidateDrawable,
 216     .flush_with_flags   = intel_dri2_flush_with_flags,
 217 };
 218
 219 static struct intel_image_format intel_image_formats[] = {
 220    { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
 221      { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
 222
 223    { __DRI_IMAGE_FOURCC_SARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
 224      { { 0, 0, 0, __DRI_IMAGE_FORMAT_SARGB8, 4 } } },
 225
 226    { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
 227      { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
 228
 229    { __DRI_IMAGE_FOURCC_RGB565, __DRI_IMAGE_COMPONENTS_RGB, 1,
 230      { { 0, 0, 0, __DRI_IMAGE_FORMAT_RGB565, 2 } } },
 231
 232    { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 233      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 234        { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
 235        { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
 236
 237    { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 238      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 239        { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 240        { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
 241
 242    { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 243      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 244        { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
 245        { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
 246
 247    { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 248      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 249        { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 250        { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
 251
 252    { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 253      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 254        { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 255        { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
 256
 257    { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
 258      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 259        { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
 260
 261    { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
 262      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 263        { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
 264
 265    /* For YUYV buffers, we set up two overlapping DRI images and treat
 266     * them as planar buffers in the compositors.  Plane 0 is GR88 and
 267     * samples YU or YV pairs and places Y into the R component, while
 268     * plane 1 is ARGB and samples YUYV clusters and places pairs and
 269     * places U into the G component and V into A.  This lets the
 270     * texture sampler interpolate the Y components correctly when
 271     * sampling from plane 0, and interpolate U and V correctly when
 272     * sampling from plane 1. */
 273    { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
 274      { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
 275        { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
 276 };
 277
 278 static struct intel_image_format *
 279 intel_image_format_lookup(int fourcc)
 280 {
 281    struct intel_image_format *f = NULL;
 282
 283    for (unsigned i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
 284       if (intel_image_formats[i].fourcc == fourcc) {
 285          f = &intel_image_formats[i];
 286          break;
 287       }
 288    }
 289
 290    return f;
 291 }
 292
 293 static __DRIimage *
 294 intel_allocate_image(int dri_format, void *loaderPrivate)
 295 {
 296     __DRIimage *image;
 297
 298     image = calloc(1, sizeof *image);
 299     if (image == NULL)
 300         return NULL;
 301
 302     image->dri_format = dri_format;
 303     image->offset = 0;
 304
 305     image->format = driImageFormatToGLFormat(dri_format);
 306     if (dri_format != __DRI_IMAGE_FORMAT_NONE &&
 307         image->format == MESA_FORMAT_NONE) {
 308        free(image);
 309        return NULL;
 310     }
 311
 312     image->internal_format = _mesa_get_format_base_format(image->format);
 313     image->data = loaderPrivate;
 314
 315     return image;
 316 }
 317
 318 /**
 319  * Sets up a DRIImage structure to point to our shared image in a region
 320  */
 321 static void
 322 intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image,
 323                                    struct intel_mipmap_tree *mt, GLuint level,
 324                                    GLuint zoffset)
 325 {
 326    unsigned int draw_x, draw_y;
 327    uint32_t mask_x, mask_y;
 328
 329    intel_miptree_make_shareable(brw, mt);
 330
 331    intel_miptree_check_level_layer(mt, level, zoffset);
 332
 333    intel_region_get_tile_masks(mt->region, &mask_x, &mask_y, false);
 334    intel_miptree_get_image_offset(mt, level, zoffset, &draw_x, &draw_y);
 335
 336    image->width = mt->level[level].width;
 337    image->height = mt->level[level].height;
 338    image->tile_x = draw_x & mask_x;
 339    image->tile_y = draw_y & mask_y;
 340
 341    image->offset = intel_region_get_aligned_offset(mt->region,
 342                                                    draw_x & ~mask_x,
 343                                                    draw_y & ~mask_y,
 344                                                    false);
 345
 346    intel_region_reference(&image->region, mt->region);
 347 }
 348
 349 static void
 350 intel_setup_image_from_dimensions(__DRIimage *image)
 351 {
 352    image->width    = image->region->width;
 353    image->height   = image->region->height;
 354    image->tile_x = 0;
 355    image->tile_y = 0;
 356    image->has_depthstencil = false;
 357 }
 358
 359 static __DRIimage *
 360 intel_create_image_from_name(__DRIscreen *screen,
 361                              int width, int height, int format,
 362                              int name, int pitch, void *loaderPrivate)
 363 {
 364     struct intel_screen *intelScreen = screen->driverPrivate;
 365     __DRIimage *image;
 366     int cpp;
 367
 368     image = intel_allocate_image(format, loaderPrivate);
 369     if (image == NULL)
 370        return NULL;
 371
 372     if (image->format == MESA_FORMAT_NONE)
 373        cpp = 1;
 374     else
 375        cpp = _mesa_get_format_bytes(image->format);
 376     image->region = intel_region_alloc_for_handle(intelScreen,
 377                                                   cpp, width, height,
 378                                                   pitch * cpp, name, "image");
 379     if (image->region == NULL) {
 380        free(image);
 381        return NULL;
 382     }
 383
 384     intel_setup_image_from_dimensions(image);
 385
 386     return image;
 387 }
 388
 389 static __DRIimage *
 390 intel_create_image_from_renderbuffer(__DRIcontext *context,
 391                                      int renderbuffer, void *loaderPrivate)
 392 {
 393    __DRIimage *image;
 394    struct brw_context *brw = context->driverPrivate;
 395    struct gl_context *ctx = &brw->ctx;
 396    struct gl_renderbuffer *rb;
 397    struct intel_renderbuffer *irb;
 398
 399    rb = _mesa_lookup_renderbuffer(ctx, renderbuffer);
 400    if (!rb) {
 401       _mesa_error(ctx, GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
 402       return NULL;
 403    }
 404
 405    irb = intel_renderbuffer(rb);
 406    intel_miptree_make_shareable(brw, irb->mt);
 407    image = calloc(1, sizeof *image);
 408    if (image == NULL)
 409       return NULL;
 410
 411    image->internal_format = rb->InternalFormat;
 412    image->format = rb->Format;
 413    image->offset = 0;
 414    image->data = loaderPrivate;
 415    intel_region_reference(&image->region, irb->mt->region);
 416    intel_setup_image_from_dimensions(image);
 417    image->dri_format = driGLFormatToImageFormat(image->format);
 418    image->has_depthstencil = irb->mt->stencil_mt? true : false;
 419
 420    rb->NeedsFinishRenderTexture = true;
 421    return image;
 422 }
 423
 424 static __DRIimage *
 425 intel_create_image_from_texture(__DRIcontext *context, int target,
 426                                 unsigned texture, int zoffset,
 427                                 int level,
 428                                 unsigned *error,
 429                                 void *loaderPrivate)
 430 {
 431    __DRIimage *image;
 432    struct brw_context *brw = context->driverPrivate;
 433    struct gl_texture_object *obj;
 434    struct intel_texture_object *iobj;
 435    GLuint face = 0;
 436
 437    obj = _mesa_lookup_texture(&brw->ctx, texture);
 438    if (!obj || obj->Target != target) {
 439       *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
 440       return NULL;
 441    }
 442
 443    if (target == GL_TEXTURE_CUBE_MAP)
 444       face = zoffset;
 445
 446    _mesa_test_texobj_completeness(&brw->ctx, obj);
 447    iobj = intel_texture_object(obj);
 448    if (!obj->_BaseComplete || (level > 0 && !obj->_MipmapComplete)) {
 449       *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
 450       return NULL;
 451    }
 452
 453    if (level < obj->BaseLevel || level > obj->_MaxLevel) {
 454       *error = __DRI_IMAGE_ERROR_BAD_MATCH;
 455       return NULL;
 456    }
 457
 458    if (target == GL_TEXTURE_3D && obj->Image[face][level]->Depth < zoffset) {
 459       *error = __DRI_IMAGE_ERROR_BAD_MATCH;
 460       return NULL;
 461    }
 462    image = calloc(1, sizeof *image);
 463    if (image == NULL) {
 464       *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
 465       return NULL;
 466    }
 467
 468    image->internal_format = obj->Image[face][level]->InternalFormat;
 469    image->format = obj->Image[face][level]->TexFormat;
 470    image->data = loaderPrivate;
 471    intel_setup_image_from_mipmap_tree(brw, image, iobj->mt, level, zoffset);
 472    image->dri_format = driGLFormatToImageFormat(image->format);
 473    image->has_depthstencil = iobj->mt->stencil_mt? true : false;
 474    if (image->dri_format == MESA_FORMAT_NONE) {
 475       *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
 476       free(image);
 477       return NULL;
 478    }
 479
 480    *error = __DRI_IMAGE_ERROR_SUCCESS;
 481    return image;
 482 }
 483
 484 static void
 485 intel_destroy_image(__DRIimage *image)
 486 {
 487     intel_region_release(&image->region);
 488     free(image);
 489 }
 490
 491 static __DRIimage *
 492 intel_create_image(__DRIscreen *screen,
 493                    int width, int height, int format,
 494                    unsigned int use,
 495                    void *loaderPrivate)
 496 {
 497    __DRIimage *image;
 498    struct intel_screen *intelScreen = screen->driverPrivate;
 499    uint32_t tiling;
 500    int cpp;
 501
 502    tiling = I915_TILING_X;
 503    if (use & __DRI_IMAGE_USE_CURSOR) {
 504       if (width != 64 || height != 64)
 505          return NULL;
 506       tiling = I915_TILING_NONE;
 507    }
 508
 509    if (use & __DRI_IMAGE_USE_LINEAR)
 510       tiling = I915_TILING_NONE;
 511
 512    image = intel_allocate_image(format, loaderPrivate);
 513    if (image == NULL)
 514       return NULL;
 515
 516    cpp = _mesa_get_format_bytes(image->format);
 517    image->region =
 518       intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
 519    if (image->region == NULL) {
 520       free(image);
 521       return NULL;
 522    }
 523
 524    intel_setup_image_from_dimensions(image);
 525
 526    return image;
 527 }
 528
 529 static GLboolean
 530 intel_query_image(__DRIimage *image, int attrib, int *value)
 531 {
 532    switch (attrib) {
 533    case __DRI_IMAGE_ATTRIB_STRIDE:
 534       *value = image->region->pitch;
 535       return true;
 536    case __DRI_IMAGE_ATTRIB_HANDLE:
 537       *value = image->region->bo->handle;
 538       return true;
 539    case __DRI_IMAGE_ATTRIB_NAME:
 540       return intel_region_flink(image->region, (uint32_t *) value);
 541    case __DRI_IMAGE_ATTRIB_FORMAT:
 542       *value = image->dri_format;
 543       return true;
 544    case __DRI_IMAGE_ATTRIB_WIDTH:
 545       *value = image->region->width;
 546       return true;
 547    case __DRI_IMAGE_ATTRIB_HEIGHT:
 548       *value = image->region->height;
 549       return true;
 550    case __DRI_IMAGE_ATTRIB_COMPONENTS:
 551       if (image->planar_format == NULL)
 552          return false;
 553       *value = image->planar_format->components;
 554       return true;
 555    case __DRI_IMAGE_ATTRIB_FD:
 556       if (drm_intel_bo_gem_export_to_prime(image->region->bo, value) == 0)
 557          return true;
 558       return false;
 559   default:
 560       return false;
 561    }
 562 }
 563
 564 static __DRIimage *
 565 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
 566 {
 567    __DRIimage *image;
 568
 569    image = calloc(1, sizeof *image);
 570    if (image == NULL)
 571       return NULL;
 572
 573    intel_region_reference(&image->region, orig_image->region);
 574    if (image->region == NULL) {
 575       free(image);
 576       return NULL;
 577    }
 578
 579    image->internal_format = orig_image->internal_format;
 580    image->planar_format   = orig_image->planar_format;
 581    image->dri_format      = orig_image->dri_format;
 582    image->format          = orig_image->format;
 583    image->offset          = orig_image->offset;
 584    image->width           = orig_image->width;
 585    image->height          = orig_image->height;
 586    image->tile_x          = orig_image->tile_x;
 587    image->tile_y          = orig_image->tile_y;
 588    image->has_depthstencil = orig_image->has_depthstencil;
 589    image->data            = loaderPrivate;
 590
 591    memcpy(image->strides, orig_image->strides, sizeof(image->strides));
 592    memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
 593
 594    return image;
 595 }
 596
 597 static GLboolean
 598 intel_validate_usage(__DRIimage *image, unsigned int use)
 599 {
 600    if (use & __DRI_IMAGE_USE_CURSOR) {
 601       if (image->region->width != 64 || image->region->height != 64)
 602          return GL_FALSE;
 603    }
 604
 605    return GL_TRUE;
 606 }
 607
 608 static __DRIimage *
 609 intel_create_image_from_names(__DRIscreen *screen,
 610                               int width, int height, int fourcc,
 611                               int *names, int num_names,
 612                               int *strides, int *offsets,
 613                               void *loaderPrivate)
 614 {
 615     struct intel_image_format *f = NULL;
 616     __DRIimage *image;
 617     int i, index;
 618
 619     if (screen == NULL || names == NULL || num_names != 1)
 620         return NULL;
 621
 622     f = intel_image_format_lookup(fourcc);
 623     if (f == NULL)
 624         return NULL;
 625
 626     image = intel_create_image_from_name(screen, width, height,
 627                                          __DRI_IMAGE_FORMAT_NONE,
 628                                          names[0], strides[0],
 629                                          loaderPrivate);
 630
 631    if (image == NULL)
 632       return NULL;
 633
 634     image->planar_format = f;
 635     for (i = 0; i < f->nplanes; i++) {
 636         index = f->planes[i].buffer_index;
 637         image->offsets[index] = offsets[index];
 638         image->strides[index] = strides[index];
 639     }
 640
 641     return image;
 642 }
 643
 644 static __DRIimage *
 645 intel_create_image_from_fds(__DRIscreen *screen,
 646                             int width, int height, int fourcc,
 647                             int *fds, int num_fds, int *strides, int *offsets,
 648                             void *loaderPrivate)
 649 {
 650    struct intel_screen *intelScreen = screen->driverPrivate;
 651    struct intel_image_format *f;
 652    __DRIimage *image;
 653    int i, index;
 654
 655    if (fds == NULL || num_fds != 1)
 656       return NULL;
 657
 658    f = intel_image_format_lookup(fourcc);
 659    if (f == NULL)
 660       return NULL;
 661
 662    if (f->nplanes == 1)
 663       image = intel_allocate_image(f->planes[0].dri_format, loaderPrivate);
 664    else
 665       image = intel_allocate_image(__DRI_IMAGE_FORMAT_NONE, loaderPrivate);
 666
 667    if (image == NULL)
 668       return NULL;
 669
 670    image->region = intel_region_alloc_for_fd(intelScreen,
 671                                              f->planes[0].cpp, width, height, strides[0],
 672                                              height * strides[0], fds[0], "image");
 673    if (image->region == NULL) {
 674       free(image);
 675       return NULL;
 676    }
 677
 678    image->planar_format = f;
 679    for (i = 0; i < f->nplanes; i++) {
 680       index = f->planes[i].buffer_index;
 681       image->offsets[index] = offsets[index];
 682       image->strides[index] = strides[index];
 683    }
 684
 685    intel_setup_image_from_dimensions(image);
 686
 687    return image;
 688 }
 689
 690 static __DRIimage *
 691 intel_create_image_from_dma_bufs(__DRIscreen *screen,
 692                                  int width, int height, int fourcc,
 693                                  int *fds, int num_fds,
 694                                  int *strides, int *offsets,
 695                                  enum __DRIYUVColorSpace yuv_color_space,
 696                                  enum __DRISampleRange sample_range,
 697                                  enum __DRIChromaSiting horizontal_siting,
 698                                  enum __DRIChromaSiting vertical_siting,
 699                                  unsigned *error,
 700                                  void *loaderPrivate)
 701 {
 702    __DRIimage *image;
 703    struct intel_image_format *f = intel_image_format_lookup(fourcc);
 704
 705    /* For now only packed formats that have native sampling are supported. */
 706    if (!f || f->nplanes != 1) {
 707       *error = __DRI_IMAGE_ERROR_BAD_MATCH;
 708       return NULL;
 709    }
 710
 711    image = intel_create_image_from_fds(screen, width, height, fourcc, fds,
 712                                        num_fds, strides, offsets,
 713                                        loaderPrivate);
 714
 715    /*
 716     * Invalid parameters and any inconsistencies between are assumed to be
 717     * checked by the caller. Therefore besides unsupported formats one can fail
 718     * only in allocation.
 719     */
 720    if (!image) {
 721       *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
 722       return NULL;
 723    }
 724
 725    image->dma_buf_imported = true;
 726    image->yuv_color_space = yuv_color_space;
 727    image->sample_range = sample_range;
 728    image->horizontal_siting = horizontal_siting;
 729    image->vertical_siting = vertical_siting;
 730
 731    *error = __DRI_IMAGE_ERROR_SUCCESS;
 732    return image;
 733 }
 734
 735 static __DRIimage *
 736 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
 737 {
 738     int width, height, offset, stride, dri_format, index;
 739     struct intel_image_format *f;
 740     uint32_t mask_x, mask_y;
 741     __DRIimage *image;
 742
 743     if (parent == NULL || parent->planar_format == NULL)
 744         return NULL;
 745
 746     f = parent->planar_format;
 747
 748     if (plane >= f->nplanes)
 749         return NULL;
 750
 751     width = parent->region->width >> f->planes[plane].width_shift;
 752     height = parent->region->height >> f->planes[plane].height_shift;
 753     dri_format = f->planes[plane].dri_format;
 754     index = f->planes[plane].buffer_index;
 755     offset = parent->offsets[index];
 756     stride = parent->strides[index];
 757
 758     image = intel_allocate_image(dri_format, loaderPrivate);
 759     if (image == NULL)
 760        return NULL;
 761
 762     if (offset + height * stride > parent->region->bo->size) {
 763        _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
 764        free(image);
 765        return NULL;
 766     }
 767
 768     image->region = calloc(sizeof(*image->region), 1);
 769     if (image->region == NULL) {
 770        free(image);
 771        return NULL;
 772     }
 773
 774     image->region->cpp = _mesa_get_format_bytes(image->format);
 775     image->region->width = width;
 776     image->region->height = height;
 777     image->region->pitch = stride;
 778     image->region->refcount = 1;
 779     image->region->bo = parent->region->bo;
 780     drm_intel_bo_reference(image->region->bo);
 781     image->region->tiling = parent->region->tiling;
 782     image->offset = offset;
 783     intel_setup_image_from_dimensions(image);
 784
 785     intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
 786     if (offset & mask_x)
 787        _mesa_warning(NULL,
 788                      "intel_create_sub_image: offset not on tile boundary");
 789
 790     return image;
 791 }
 792
 793 static struct __DRIimageExtensionRec intelImageExtension = {
 794     .base = { __DRI_IMAGE, 8 },
 795
 796     .createImageFromName                = intel_create_image_from_name,
 797     .createImageFromRenderbuffer        = intel_create_image_from_renderbuffer,
 798     .destroyImage                       = intel_destroy_image,
 799     .createImage                        = intel_create_image,
 800     .queryImage                         = intel_query_image,
 801     .dupImage                           = intel_dup_image,
 802     .validateUsage                      = intel_validate_usage,
 803     .createImageFromNames               = intel_create_image_from_names,
 804     .fromPlanar                         = intel_from_planar,
 805     .createImageFromTexture             = intel_create_image_from_texture,
 806     .createImageFromFds                 = intel_create_image_from_fds,
 807     .createImageFromDmaBufs             = intel_create_image_from_dma_bufs
 808 };
 809
 810 static int
 811 brw_query_renderer_integer(__DRIscreen *psp, int param, unsigned int *value)
 812 {
 813    const struct intel_screen *const intelScreen =
 814       (struct intel_screen *) psp->driverPrivate;
 815
 816    switch (param) {
 817    case __DRI2_RENDERER_VENDOR_ID:
 818       value[0] = 0x8086;
 819       return 0;
 820    case __DRI2_RENDERER_DEVICE_ID:
 821       value[0] = intelScreen->deviceID;
 822       return 0;
 823    case __DRI2_RENDERER_ACCELERATED:
 824       value[0] = 1;
 825       return 0;
 826    case __DRI2_RENDERER_VIDEO_MEMORY: {
 827       /* Once a batch uses more than 75% of the maximum mappable size, we
 828        * assume that there's some fragmentation, and we start doing extra
 829        * flushing, etc.  That's the big cliff apps will care about.
 830        */
 831       size_t aper_size;
 832       size_t mappable_size;
 833
 834       drm_intel_get_aperture_sizes(psp->fd, &mappable_size, &aper_size);
 835
 836       const unsigned gpu_mappable_megabytes =
 837          (aper_size / (1024 * 1024)) * 3 / 4;
 838
 839       const long system_memory_pages = sysconf(_SC_PHYS_PAGES);
 840       const long system_page_size = sysconf(_SC_PAGE_SIZE);
 841
 842       if (system_memory_pages <= 0 || system_page_size <= 0)
 843          return -1;
 844
 845       const uint64_t system_memory_bytes = (uint64_t) system_memory_pages
 846          * (uint64_t) system_page_size;
 847
 848       const unsigned system_memory_megabytes =
 849          (unsigned) (system_memory_bytes / 1024);
 850
 851       value[0] = MIN2(system_memory_megabytes, gpu_mappable_megabytes);
 852       return 0;
 853    }
 854    case __DRI2_RENDERER_UNIFIED_MEMORY_ARCHITECTURE:
 855       value[0] = 1;
 856       return 0;
 857    case __DRI2_RENDERER_PREFERRED_PROFILE:
 858       value[0] = (psp->max_gl_core_version != 0)
 859          ? (1U << __DRI_API_OPENGL_CORE) : (1U << __DRI_API_OPENGL);
 860       return 0;
 861    default:
 862       return driQueryRendererIntegerCommon(psp, param, value);
 863    }
 864
 865    return -1;
 866 }
 867
 868 static int
 869 brw_query_renderer_string(__DRIscreen *psp, int param, const char **value)
 870 {
 871    const struct intel_screen *intelScreen =
 872       (struct intel_screen *) psp->driverPrivate;
 873
 874    switch (param) {
 875    case __DRI2_RENDERER_VENDOR_ID:
 876       value[0] = brw_vendor_string;
 877       return 0;
 878    case __DRI2_RENDERER_DEVICE_ID:
 879       value[0] = brw_get_renderer_string(intelScreen->deviceID);
 880       return 0;
 881    default:
 882       break;
 883    }
 884
 885    return -1;
 886 }
 887
 888 static struct __DRI2rendererQueryExtensionRec intelRendererQueryExtension = {
 889    .base = { __DRI2_RENDERER_QUERY, 1 },
 890
 891    .queryInteger = brw_query_renderer_integer,
 892    .queryString = brw_query_renderer_string
 893 };
 894
 895 static const struct __DRIrobustnessExtensionRec dri2Robustness = {
 896    { __DRI2_ROBUSTNESS, 1 }
 897 };
 898
 899 static const __DRIextension *intelScreenExtensions[] = {
 900     &intelTexBufferExtension.base,
 901     &intelFlushExtension.base,
 902     &intelImageExtension.base,
 903     &intelRendererQueryExtension.base,
 904     &dri2ConfigQueryExtension.base,
 905     NULL
 906 };
 907
 908 static const __DRIextension *intelRobustScreenExtensions[] = {
 909     &intelTexBufferExtension.base,
 910     &intelFlushExtension.base,
 911     &intelImageExtension.base,
 912     &intelRendererQueryExtension.base,
 913     &dri2ConfigQueryExtension.base,
 914     &dri2Robustness.base,
 915     NULL
 916 };
 917
 918 static bool
 919 intel_get_param(__DRIscreen *psp, int param, int *value)
 920 {
 921    int ret;
 922    struct drm_i915_getparam gp;
 923
 924    memset(&gp, 0, sizeof(gp));
 925    gp.param = param;
 926    gp.value = value;
 927
 928    ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
 929    if (ret) {
 930       if (ret != -EINVAL)
 931          _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
 932       return false;
 933    }
 934
 935    return true;
 936 }
 937
 938 static bool
 939 intel_get_boolean(__DRIscreen *psp, int param)
 940 {
 941    int value = 0;
 942    return intel_get_param(psp, param, &value) && value;
 943 }
 944
 945 static void
 946 intelDestroyScreen(__DRIscreen * sPriv)
 947 {
 948    struct intel_screen *intelScreen = sPriv->driverPrivate;
 949
 950    dri_bufmgr_destroy(intelScreen->bufmgr);
 951    driDestroyOptionInfo(&intelScreen->optionCache);
 952
 953    free(intelScreen);
 954    sPriv->driverPrivate = NULL;
 955 }
 956
 957
 958 /**
 959  * This is called when we need to set up GL rendering to a new X window.
 960  */
 961 static GLboolean
 962 intelCreateBuffer(__DRIscreen * driScrnPriv,
 963                   __DRIdrawable * driDrawPriv,
 964                   const struct gl_config * mesaVis, GLboolean isPixmap)
 965 {
 966    struct intel_renderbuffer *rb;
 967    struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
 968    mesa_format rgbFormat;
 969    unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
 970    struct gl_framebuffer *fb;
 971
 972    if (isPixmap)
 973       return false;
 974
 975    fb = CALLOC_STRUCT(gl_framebuffer);
 976    if (!fb)
 977       return false;
 978
 979    _mesa_initialize_window_framebuffer(fb, mesaVis);
 980
 981    if (mesaVis->redBits == 5)
 982       rgbFormat = MESA_FORMAT_B5G6R5_UNORM;
 983    else if (mesaVis->sRGBCapable)
 984       rgbFormat = MESA_FORMAT_B8G8R8A8_SRGB;
 985    else if (mesaVis->alphaBits == 0)
 986       rgbFormat = MESA_FORMAT_B8G8R8X8_UNORM;
 987    else {
 988       rgbFormat = MESA_FORMAT_B8G8R8A8_SRGB;
 989       fb->Visual.sRGBCapable = true;
 990    }
 991
 992    /* setup the hardware-based renderbuffers */
 993    rb = intel_create_renderbuffer(rgbFormat, num_samples);
 994    _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
 995
 996    if (mesaVis->doubleBufferMode) {
 997       rb = intel_create_renderbuffer(rgbFormat, num_samples);
 998       _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
 999    }
1000
1001    /*
1002     * Assert here that the gl_config has an expected depth/stencil bit
1003     * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
1004     * which constructs the advertised configs.)
1005     */
1006    if (mesaVis->depthBits == 24) {
1007       assert(mesaVis->stencilBits == 8);
1008
1009       if (screen->devinfo->has_hiz_and_separate_stencil) {
1010          rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT,
1011                                                 num_samples);
1012          _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
1013          rb = intel_create_private_renderbuffer(MESA_FORMAT_S_UINT8,
1014                                                 num_samples);
1015          _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
1016       } else {
1017          /*
1018           * Use combined depth/stencil. Note that the renderbuffer is
1019           * attached to two attachment points.
1020           */
1021          rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT,
1022                                                 num_samples);
1023          _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
1024          _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
1025       }
1026    }
1027    else if (mesaVis->depthBits == 16) {
1028       assert(mesaVis->stencilBits == 0);
1029       rb = intel_create_private_renderbuffer(MESA_FORMAT_Z_UNORM16,
1030                                              num_samples);
1031       _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
1032    }
1033    else {
1034       assert(mesaVis->depthBits == 0);
1035       assert(mesaVis->stencilBits == 0);
1036    }
1037
1038    /* now add any/all software-based renderbuffers we may need */
1039    _swrast_add_soft_renderbuffers(fb,
1040                                   false, /* never sw color */
1041                                   false, /* never sw depth */
1042                                   false, /* never sw stencil */
1043                                   mesaVis->accumRedBits > 0,
1044                                   false, /* never sw alpha */
1045                                   false  /* never sw aux */ );
1046    driDrawPriv->driverPrivate = fb;
1047
1048    return true;
1049 }
1050
1051 static void
1052 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
1053 {
1054     struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
1055
1056     _mesa_reference_framebuffer(&fb, NULL);
1057 }
1058
1059 static bool
1060 intel_init_bufmgr(struct intel_screen *intelScreen)
1061 {
1062    __DRIscreen *spriv = intelScreen->driScrnPriv;
1063
1064    intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
1065
1066    intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
1067    if (intelScreen->bufmgr == NULL) {
1068       fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
1069               __func__, __LINE__);
1070       return false;
1071    }
1072
1073    drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
1074
1075    if (!intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA)) {
1076       fprintf(stderr, "[%s: %u] Kernel 2.6.39 required.\n", __func__, __LINE__);
1077       return false;
1078    }
1079
1080    return true;
1081 }
1082
1083 static bool
1084 intel_detect_swizzling(struct intel_screen *screen)
1085 {
1086    drm_intel_bo *buffer;
1087    unsigned long flags = 0;
1088    unsigned long aligned_pitch;
1089    uint32_t tiling = I915_TILING_X;
1090    uint32_t swizzle_mode = 0;
1091
1092    buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
1093                                      64, 64, 4,
1094                                      &tiling, &aligned_pitch, flags);
1095    if (buffer == NULL)
1096       return false;
1097
1098    drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
1099    drm_intel_bo_unreference(buffer);
1100
1101    if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
1102       return false;
1103    else
1104       return true;
1105 }
1106
1107 /**
1108  * Return array of MSAA modes supported by the hardware. The array is
1109  * zero-terminated and sorted in decreasing order.
1110  */
1111 const int*
1112 intel_supported_msaa_modes(const struct intel_screen  *screen)
1113 {
1114    static const int gen7_modes[] = {8, 4, 0, -1};
1115    static const int gen6_modes[] = {4, 0, -1};
1116    static const int gen4_modes[] = {0, -1};
1117
1118    if (screen->devinfo->gen >= 7) {
1119       return gen7_modes;
1120    } else if (screen->devinfo->gen == 6) {
1121       return gen6_modes;
1122    } else {
1123       return gen4_modes;
1124    }
1125 }
1126
1127 static __DRIconfig**
1128 intel_screen_make_configs(__DRIscreen *dri_screen)
1129 {
1130    static const mesa_format formats[] = {
1131       MESA_FORMAT_B5G6R5_UNORM,
1132       MESA_FORMAT_B8G8R8A8_UNORM
1133    };
1134
1135    /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1136    static const GLenum back_buffer_modes[] = {
1137        GLX_SWAP_UNDEFINED_OML, GLX_NONE,
1138    };
1139
1140    static const uint8_t singlesample_samples[1] = {0};
1141    static const uint8_t multisample_samples[2]  = {4, 8};
1142
1143    struct intel_screen *screen = dri_screen->driverPrivate;
1144    const struct brw_device_info *devinfo = screen->devinfo;
1145    uint8_t depth_bits[4], stencil_bits[4];
1146    __DRIconfig **configs = NULL;
1147
1148    /* Generate singlesample configs without accumulation buffer. */
1149    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1150       __DRIconfig **new_configs;
1151       int num_depth_stencil_bits = 2;
1152
1153       /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1154        * buffer that has a different number of bits per pixel than the color
1155        * buffer, gen >= 6 supports this.
1156        */
1157       depth_bits[0] = 0;
1158       stencil_bits[0] = 0;
1159
1160       if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) {
1161          depth_bits[1] = 16;
1162          stencil_bits[1] = 0;
1163          if (devinfo->gen >= 6) {
1164              depth_bits[2] = 24;
1165              stencil_bits[2] = 8;
1166              num_depth_stencil_bits = 3;
1167          }
1168       } else {
1169          depth_bits[1] = 24;
1170          stencil_bits[1] = 8;
1171       }
1172
1173       new_configs = driCreateConfigs(formats[i],
1174                                      depth_bits,
1175                                      stencil_bits,
1176                                      num_depth_stencil_bits,
1177                                      back_buffer_modes, 2,
1178                                      singlesample_samples, 1,
1179                                      false);
1180       configs = driConcatConfigs(configs, new_configs);
1181    }
1182
1183    /* Generate the minimum possible set of configs that include an
1184     * accumulation buffer.
1185     */
1186    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1187       __DRIconfig **new_configs;
1188
1189       if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) {
1190          depth_bits[0] = 16;
1191          stencil_bits[0] = 0;
1192       } else {
1193          depth_bits[0] = 24;
1194          stencil_bits[0] = 8;
1195       }
1196
1197       new_configs = driCreateConfigs(formats[i],
1198                                      depth_bits, stencil_bits, 1,
1199                                      back_buffer_modes, 1,
1200                                      singlesample_samples, 1,
1201                                      true);
1202       configs = driConcatConfigs(configs, new_configs);
1203    }
1204
1205    /* Generate multisample configs.
1206     *
1207     * This loop breaks early, and hence is a no-op, on gen < 6.
1208     *
1209     * Multisample configs must follow the singlesample configs in order to
1210     * work around an X server bug present in 1.12. The X server chooses to
1211     * associate the first listed RGBA888-Z24S8 config, regardless of its
1212     * sample count, with the 32-bit depth visual used for compositing.
1213     *
1214     * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1215     * supported.  Singlebuffer configs are not supported because no one wants
1216     * them.
1217     */
1218    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1219       if (devinfo->gen < 6)
1220          break;
1221
1222       __DRIconfig **new_configs;
1223       const int num_depth_stencil_bits = 2;
1224       int num_msaa_modes = 0;
1225
1226       depth_bits[0] = 0;
1227       stencil_bits[0] = 0;
1228
1229       if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) {
1230          depth_bits[1] = 16;
1231          stencil_bits[1] = 0;
1232       } else {
1233          depth_bits[1] = 24;
1234          stencil_bits[1] = 8;
1235       }
1236
1237       if (devinfo->gen >= 7)
1238          num_msaa_modes = 2;
1239       else if (devinfo->gen == 6)
1240          num_msaa_modes = 1;
1241
1242       new_configs = driCreateConfigs(formats[i],
1243                                      depth_bits,
1244                                      stencil_bits,
1245                                      num_depth_stencil_bits,
1246                                      back_buffer_modes, 1,
1247                                      multisample_samples,
1248                                      num_msaa_modes,
1249                                      false);
1250       configs = driConcatConfigs(configs, new_configs);
1251    }
1252
1253    if (configs == NULL) {
1254       fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1255               __LINE__);
1256       return NULL;
1257    }
1258
1259    return configs;
1260 }
1261
1262 static void
1263 set_max_gl_versions(struct intel_screen *screen)
1264 {
1265    __DRIscreen *psp = screen->driScrnPriv;
1266
1267    switch (screen->devinfo->gen) {
1268    case 8:
1269    case 7:
1270       psp->max_gl_core_version = 33;
1271       psp->max_gl_compat_version = 30;
1272       psp->max_gl_es1_version = 11;
1273       psp->max_gl_es2_version = 30;
1274       break;
1275    case 6:
1276       psp->max_gl_core_version = 31;
1277       psp->max_gl_compat_version = 30;
1278       psp->max_gl_es1_version = 11;
1279       psp->max_gl_es2_version = 30;
1280       break;
1281    case 5:
1282    case 4:
1283       psp->max_gl_core_version = 0;
1284       psp->max_gl_compat_version = 21;
1285       psp->max_gl_es1_version = 11;
1286       psp->max_gl_es2_version = 20;
1287       break;
1288    default:
1289       assert(!"unrecognized intel_screen::gen");
1290       break;
1291    }
1292 }
1293
1294 /**
1295  * This is the driver specific part of the createNewScreen entry point.
1296  * Called when using DRI2.
1297  *
1298  * \return the struct gl_config supported by this driver
1299  */
1300 static const
1301 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1302 {
1303    struct intel_screen *intelScreen;
1304
1305    if (psp->image.loader) {
1306    } else if (psp->dri2.loader->base.version <= 2 ||
1307        psp->dri2.loader->getBuffersWithFormat == NULL) {
1308       fprintf(stderr,
1309               "\nERROR!  DRI2 loader with getBuffersWithFormat() "
1310               "support required\n");
1311       return false;
1312    }
1313
1314    /* Allocate the private area */
1315    intelScreen = calloc(1, sizeof *intelScreen);
1316    if (!intelScreen) {
1317       fprintf(stderr, "\nERROR!  Allocating private area failed\n");
1318       return false;
1319    }
1320    /* parse information in __driConfigOptions */
1321    driParseOptionInfo(&intelScreen->optionCache, brw_config_options.xml);
1322
1323    intelScreen->driScrnPriv = psp;
1324    psp->driverPrivate = (void *) intelScreen;
1325
1326    if (!intel_init_bufmgr(intelScreen))
1327        return false;
1328
1329    intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1330    intelScreen->devinfo = brw_get_device_info(intelScreen->deviceID);
1331
1332    intelScreen->hw_must_use_separate_stencil = intelScreen->devinfo->gen >= 7;
1333
1334    intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1335
1336    set_max_gl_versions(intelScreen);
1337
1338    /* Notification of GPU resets requires hardware contexts and a kernel new
1339     * enough to support DRM_IOCTL_I915_GET_RESET_STATS.  If the ioctl is
1340     * supported, calling it with a context of 0 will either generate EPERM or
1341     * no error.  If the ioctl is not supported, it always generate EINVAL.
1342     * Use this to determine whether to advertise the __DRI2_ROBUSTNESS
1343     * extension to the loader.
1344     */
1345    struct drm_i915_reset_stats stats;
1346    memset(&stats, 0, sizeof(stats));
1347
1348    const int ret = drmIoctl(psp->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats);
1349
1350    intelScreen->has_context_reset_notification = (ret != -1 || errno != EINVAL);
1351
1352    psp->extensions = !intelScreen->has_context_reset_notification
1353       ? intelScreenExtensions : intelRobustScreenExtensions;
1354
1355    return (const __DRIconfig**) intel_screen_make_configs(psp);
1356 }
1357
1358 struct intel_buffer {
1359    __DRIbuffer base;
1360    struct intel_region *region;
1361 };
1362
1363 static __DRIbuffer *
1364 intelAllocateBuffer(__DRIscreen *screen,
1365                     unsigned attachment, unsigned format,
1366                     int width, int height)
1367 {
1368    struct intel_buffer *intelBuffer;
1369    struct intel_screen *intelScreen = screen->driverPrivate;
1370
1371    assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1372           attachment == __DRI_BUFFER_BACK_LEFT);
1373
1374    intelBuffer = calloc(1, sizeof *intelBuffer);
1375    if (intelBuffer == NULL)
1376       return NULL;
1377
1378    /* The front and back buffers are color buffers, which are X tiled. */
1379    intelBuffer->region = intel_region_alloc(intelScreen,
1380                                             I915_TILING_X,
1381                                             format / 8,
1382                                             width,
1383                                             height,
1384                                             true);
1385
1386    if (intelBuffer->region == NULL) {
1387            free(intelBuffer);
1388            return NULL;
1389    }
1390
1391    intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1392
1393    intelBuffer->base.attachment = attachment;
1394    intelBuffer->base.cpp = intelBuffer->region->cpp;
1395    intelBuffer->base.pitch = intelBuffer->region->pitch;
1396
1397    return &intelBuffer->base;
1398 }
1399
1400 static void
1401 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1402 {
1403    struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1404
1405    intel_region_release(&intelBuffer->region);
1406    free(intelBuffer);
1407 }
1408
1409 static const struct __DriverAPIRec brw_driver_api = {
1410    .InitScreen           = intelInitScreen2,
1411    .DestroyScreen        = intelDestroyScreen,
1412    .CreateContext        = brwCreateContext,
1413    .DestroyContext       = intelDestroyContext,
1414    .CreateBuffer         = intelCreateBuffer,
1415    .DestroyBuffer        = intelDestroyBuffer,
1416    .MakeCurrent          = intelMakeCurrent,
1417    .UnbindContext        = intelUnbindContext,
1418    .AllocateBuffer       = intelAllocateBuffer,
1419    .ReleaseBuffer        = intelReleaseBuffer
1420 };
1421
1422 static const struct __DRIDriverVtableExtensionRec brw_vtable = {
1423    .base = { __DRI_DRIVER_VTABLE, 1 },
1424    .vtable = &brw_driver_api,
1425 };
1426
1427 static const __DRIextension *brw_driver_extensions[] = {
1428     &driCoreExtension.base,
1429     &driImageDriverExtension.base,
1430     &driDRI2Extension.base,
1431     &brw_vtable.base,
1432     &brw_config_options.base,
1433     NULL
1434 };
1435
1436 PUBLIC const __DRIextension **__driDriverGetExtensions_i965(void)
1437 {
1438    globalDriverAPI = &brw_driver_api;
1439
1440    return brw_driver_extensions;
1441 }